Commit 8f2e5e2c by Enrico Pozzobon

Merge branch 'master' of lab.las3.de:lwc/compare

parents 1f4c059d d1739748
...@@ -10,7 +10,7 @@ import subprocess ...@@ -10,7 +10,7 @@ import subprocess
def build(algo_dir, template_dir, build_dir): def build(algo_dir, template_dir, build_dir):
if os.path.isdir(build_dir): if os.path.isdir(build_dir):
return None raise Exception("Directory %s doesn't exist" % build_dir)
print("Building in %s" % build_dir) print("Building in %s" % build_dir)
...@@ -18,9 +18,12 @@ def build(algo_dir, template_dir, build_dir): ...@@ -18,9 +18,12 @@ def build(algo_dir, template_dir, build_dir):
shutil.copytree(algo_dir, build_dir) shutil.copytree(algo_dir, build_dir)
# remove the test vectors generator if it is there # remove the test vectors generator if it is there
c = os.path.join(build_dir, "genkat_aead.c") for r, d, f in os.walk(build_dir):
if os.path.exists(c): for file in f:
os.remove(c) with open(os.path.join(r, file), 'r') as o:
is_generator = 'generate_test_vectors' in o.read()
if is_generator:
os.remove(os.path.join(r, file))
# find all c and h files, since they will be added to the makefile # find all c and h files, since they will be added to the makefile
hfiles = [] hfiles = []
...@@ -74,7 +77,7 @@ def build(algo_dir, template_dir, build_dir): ...@@ -74,7 +77,7 @@ def build(algo_dir, template_dir, build_dir):
os.chdir(wd) os.chdir(wd)
# if execution arrives here, the build was successful # if execution arrives here, the build was successful
return build_dir return True
# Find test vectors in directory or one of the parent directories # Find test vectors in directory or one of the parent directories
...@@ -198,18 +201,15 @@ def main(argv): ...@@ -198,18 +201,15 @@ def main(argv):
print() print()
# Build all found algorithms # Build all found algorithms
for i, (t, d, name, st_mtime) in enumerate(files): for t, d, name, st_mtime in files:
print() print()
print(d) print(d)
try: try:
build_dir = os.path.join(build_root_dir, name) build_dir = os.path.join(build_root_dir, name)
b = build(d, template_dir, build_dir) build(d, template_dir, build_dir)
if b is None:
continue
shutil.copyfile(t, os.path.join(b, 'LWC_AEAD_KAT.txt')) shutil.copyfile(t, os.path.join(build_dir, 'LWC_AEAD_KAT.txt'))
mdate_path = os.path.join(build_dir, 'cipher_mtime.txt') mdate_path = os.path.join(build_dir, 'cipher_mtime.txt')
with open(mdate_path, 'wt') as mdate_file: with open(mdate_path, 'wt') as mdate_file:
......
...@@ -219,9 +219,11 @@ function showJobMenu(event, jobId) { ...@@ -219,9 +219,11 @@ function showJobMenu(event, jobId) {
const st = schedule[jobId].state; const st = schedule[jobId].state;
if (st == 'SUCCESSFUL' || st == 'FAILED') { if (st == 'SUCCESSFUL' || st == 'FAILED') {
menuView.appendChild(makeEntry('↺ Retry', () => restartJob(jobId))); menuView.appendChild(makeEntry('↺ Retry', () => restartJob(jobId)));
}
if (st == 'SUCCESSFUL' || st == 'FAILED' || st == 'SCHEDULED') {
menuView.appendChild(makeEntry('🗑️ Delete', () => deleteJob(jobId))); menuView.appendChild(makeEntry('🗑️ Delete', () => deleteJob(jobId)));
} }
if (st == 'RUNNING' || st == 'SCHEDULED') { if (st == 'RUNNING') {
menuView.appendChild(makeEntry('🗴 Cancel', () => cancelJob(jobId))); menuView.appendChild(makeEntry('🗴 Cancel', () => cancelJob(jobId)));
} }
menuView.appendChild(makeEntry('🗎 View Logs', () => viewJobLogs(jobId))); menuView.appendChild(makeEntry('🗎 View Logs', () => viewJobLogs(jobId)));
......
...@@ -17,7 +17,7 @@ ftdi_layout_signal nSRST -data 0x0020 ...@@ -17,7 +17,7 @@ ftdi_layout_signal nSRST -data 0x0020
set WORKAREASIZE 0x2000 set WORKAREASIZE 0x2000
source [find target/stm32f1x.cfg] source [find target/stm32f103c8t6_128k.cfg]
#tpiu config internal swodump.stm32f103-generic.log uart off 72000000 #tpiu config internal swodump.stm32f103-generic.log uart off 72000000
......
...@@ -2,9 +2,10 @@ ...@@ -2,9 +2,10 @@
platform = ststm32 platform = ststm32
framework = arduino framework = arduino
board = bluepill_f103c8_128k board = bluepill_f103c8_128k
platform_packages = toolchain-gccarmnoneeabi@1.90201.191206 platform_packages =
toolchain-gccarmnoneeabi @ 1.90201.191206
upload_protocol = jlink upload_protocol = jlink
build_flags = -O2 -UDEBUG -DNDEBUG build_flags = -O3 -UDEBUG -DNDEBUG
-D NUM_ANALOG_INPUTS=10 -D NUM_ANALOG_INPUTS=10
-D NUM_ANALOG_FIRST=20 -D NUM_ANALOG_FIRST=20
build_unflags = -Os build_unflags = -Os
......
[env:esp32dev] [env:esp32dev]
platform = espressif32 platform = espressif32
framework = arduino platform_packages =
toolchain-xtensa32 @ 2.50200.80
board = esp32dev board = esp32dev
build_flags = -O2 -UDEBUG -DNDEBUG board_build.f_cpu = 240000000L
build_unflags = -Os framework = arduino
build_type = release build_type = release
build_flags =
-O3
-UDEBUG
-DNDEBUG
-DCORE_DEBUG_LEVEL=0
-DBOARD_HAS_PSRAM
-mfix-esp32-psram-cache-issue
build_unflags = -Os
...@@ -5,10 +5,10 @@ SourcePath=/home/enrico/Projects/lwc-compare/templates/f7/Src ...@@ -5,10 +5,10 @@ SourcePath=/home/enrico/Projects/lwc-compare/templates/f7/Src
SourceFiles=stm32f7xx_it.c;stm32f7xx_hal_msp.c;main.c; SourceFiles=stm32f7xx_it.c;stm32f7xx_hal_msp.c;main.c;
[PreviousLibFiles] [PreviousLibFiles]
LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dmamux.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dmamux.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm3.h; LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dmamux.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dmamux.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/mpu_armv7.h;
[PreviousUsedMakefileFiles] [PreviousUsedMakefileFiles]
SourceFiles=Src/main.c;Src/stm32f7xx_it.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Src/system_stm32f7xx.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;; SourceFiles=Src/main.c;Src/stm32f7xx_it.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Src/system_stm32f7xx.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;;
HeaderPath=Drivers/STM32F7xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32F7xx/Include;Drivers/CMSIS/Include;Inc; HeaderPath=Drivers/STM32F7xx_HAL_Driver/Inc;Drivers/CMSIS/Device/ST/STM32F7xx/Include;Drivers/CMSIS/Include;Inc;
CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;ART_ACCLERATOR_ENABLE:0;STM32F746xx;USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;ART_ACCLERATOR_ENABLE:0; CDefines=USE_FULL_LL_DRIVER;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;PREFETCH_ENABLE:0;ART_ACCLERATOR_ENABLE:0;STM32F746xx;HSE_VALUE:8000000;HSE_STARTUP_TIMEOUT:100;LSE_STARTUP_TIMEOUT:5000;LSE_VALUE:32768;EXTERNAL_CLOCK_VALUE:12288000;HSI_VALUE:16000000;LSI_VALUE:32000;VDD_VALUE:3300;
This source diff could not be displayed because it is too large. You can view the blob instead.
...@@ -16,29 +16,13 @@ ...@@ -16,29 +16,13 @@
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
* All rights reserved.</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * This software component is licensed by ST under BSD 3-Clause license,
* are permitted provided that the following conditions are met: * the "License"; You may not use this file except in compliance with the
* 1. Redistributions of source code must retain the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer. * opensource.org/licenses/BSD-3-Clause
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
...@@ -72,10 +56,10 @@ ...@@ -72,10 +56,10 @@
/* Uncomment the line below according to the target STM32 device used in your /* Uncomment the line below according to the target STM32 device used in your
application application
*/ */
#if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F767xx) && \ #if !defined (STM32F756xx) && !defined (STM32F746xx) && !defined (STM32F745xx) && !defined (STM32F765xx) && \
!defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && !defined (STM32F722xx) && \ !defined (STM32F767xx) && !defined (STM32F769xx) && !defined (STM32F777xx) && !defined (STM32F779xx) && \
!defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx) && !defined (STM32F730xx) && \ !defined (STM32F722xx) && !defined (STM32F723xx) && !defined (STM32F732xx) && !defined (STM32F733xx) && \
!defined (STM32F750xx) !defined (STM32F730xx) && !defined (STM32F750xx)
/* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG, /* #define STM32F756xx */ /*!< STM32F756VG, STM32F756ZG, STM32F756ZG, STM32F756IG, STM32F756BG,
STM32F756NG Devices */ STM32F756NG Devices */
...@@ -113,11 +97,11 @@ ...@@ -113,11 +97,11 @@
#endif /* USE_HAL_DRIVER */ #endif /* USE_HAL_DRIVER */
/** /**
* @brief CMSIS Device version number V1.2.4 * @brief CMSIS Device version number V1.2.5
*/ */
#define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */ #define __STM32F7_CMSIS_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */ #define __STM32F7_CMSIS_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32F7_CMSIS_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */ #define __STM32F7_CMSIS_VERSION_SUB2 (0x05) /*!< [15:8] sub2 version */
#define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32F7_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\ #define __STM32F7_CMSIS_VERSION ((__STM32F7_CMSIS_VERSION_MAIN << 24)\
|(__STM32F7_CMSIS_VERSION_SUB1 << 16)\ |(__STM32F7_CMSIS_VERSION_SUB1 << 16)\
......
...@@ -262,7 +262,7 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); ...@@ -262,7 +262,7 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
* @{ * @{
*/ */
#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
#define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00)) #define IS_GPIO_PIN(__PIN__) ((((uint32_t)(__PIN__) & GPIO_PIN_MASK) != 0x00U))
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\
((MODE) == GPIO_MODE_OUTPUT_PP) ||\ ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
((MODE) == GPIO_MODE_OUTPUT_OD) ||\ ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
......
...@@ -167,6 +167,9 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); ...@@ -167,6 +167,9 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
(((__CONFIG__) & I2C_FASTMODEPLUS_PB9) == I2C_FASTMODEPLUS_PB9) || \ (((__CONFIG__) & I2C_FASTMODEPLUS_PB9) == I2C_FASTMODEPLUS_PB9) || \
(((__CONFIG__) & I2C_FASTMODEPLUS_I2C1) == I2C_FASTMODEPLUS_I2C1)) (((__CONFIG__) & I2C_FASTMODEPLUS_I2C1) == I2C_FASTMODEPLUS_I2C1))
#endif /* SYSCFG_PMC_I2C1_FMP && SYSCFG_PMC_I2C2_FMP && SYSCFG_PMC_I2C3_FMP && SYSCFG_PMC_I2C4_FMP */ #endif /* SYSCFG_PMC_I2C1_FMP && SYSCFG_PMC_I2C2_FMP && SYSCFG_PMC_I2C3_FMP && SYSCFG_PMC_I2C4_FMP */
/** /**
* @} * @}
*/ */
......
...@@ -96,16 +96,16 @@ typedef struct __PCD_HandleTypeDef ...@@ -96,16 +96,16 @@ typedef struct __PCD_HandleTypeDef
typedef struct typedef struct
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{ {
PCD_TypeDef *Instance; /*!< Register base address */ PCD_TypeDef *Instance; /*!< Register base address */
PCD_InitTypeDef Init; /*!< PCD required parameters */ PCD_InitTypeDef Init; /*!< PCD required parameters */
__IO uint8_t USB_Address; /*!< USB Address */ __IO uint8_t USB_Address; /*!< USB Address */
PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
HAL_LockTypeDef Lock; /*!< PCD peripheral status */ HAL_LockTypeDef Lock; /*!< PCD peripheral status */
__IO PCD_StateTypeDef State; /*!< PCD communication state */ __IO PCD_StateTypeDef State; /*!< PCD communication state */
__IO uint32_t ErrorCode; /*!< PCD Error code */ __IO uint32_t ErrorCode; /*!< PCD Error code */
uint32_t Setup[12]; /*!< Setup packet buffer */ uint32_t Setup[12]; /*!< Setup packet buffer */
PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
uint32_t BESL; uint32_t BESL;
...@@ -148,9 +148,9 @@ typedef struct ...@@ -148,9 +148,9 @@ typedef struct
/** @defgroup PCD_Speed PCD Speed /** @defgroup PCD_Speed PCD Speed
* @{ * @{
*/ */
#define PCD_SPEED_HIGH 0U #define PCD_SPEED_HIGH USBD_HS_SPEED
#define PCD_SPEED_HIGH_IN_FULL 1U #define PCD_SPEED_HIGH_IN_FULL USBD_HSINFS_SPEED
#define PCD_SPEED_FULL 2U #define PCD_SPEED_FULL USBD_FS_SPEED
/** /**
* @} * @}
*/ */
...@@ -207,20 +207,20 @@ typedef struct ...@@ -207,20 +207,20 @@ typedef struct
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_HS_WAKEUP_EXTI_LINE) #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_HS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE) #define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
do { \ do { \
EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE); \ EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE; \ EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE; \
} while(0U) } while(0U)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE) #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
do { \ do { \
EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \
EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE; \
} while(0U) } while(0U)
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
...@@ -256,7 +256,7 @@ typedef enum ...@@ -256,7 +256,7 @@ typedef enum
HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
...@@ -371,14 +371,6 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); ...@@ -371,14 +371,6 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
* @{ * @{
*/ */
#if defined (USB_OTG_FS) || defined (USB_OTG_HS) #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U
#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
#define USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE 0x08U
#define USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE 0x0CU
#define USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U
#define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ #define USB_OTG_FS_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
#define USB_OTG_HS_WAKEUP_EXTI_LINE (0x1U << 20) /*!< USB HS EXTI Line WakeUp Interrupt */ #define USB_OTG_HS_WAKEUP_EXTI_LINE (0x1U << 20) /*!< USB HS EXTI Line WakeUp Interrupt */
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
......
...@@ -201,9 +201,9 @@ TIMEx_BreakInputConfigTypeDef; ...@@ -201,9 +201,9 @@ TIMEx_BreakInputConfigTypeDef;
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
* @brief Timer Hall Sensor functions * @brief Timer Hall Sensor functions
* @{ * @{
*/ */
/* Timer Hall Sensor functions **********************************************/ /* Timer Hall Sensor functions **********************************************/
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig); HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
...@@ -225,9 +225,9 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); ...@@ -225,9 +225,9 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
* @brief Timer Complementary Output Compare functions * @brief Timer Complementary Output Compare functions
* @{ * @{
*/ */
/* Timer Complementary Output Compare functions *****************************/ /* Timer Complementary Output Compare functions *****************************/
/* Blocking mode: Polling */ /* Blocking mode: Polling */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
...@@ -245,9 +245,9 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann ...@@ -245,9 +245,9 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
* @brief Timer Complementary PWM functions * @brief Timer Complementary PWM functions
* @{ * @{
*/ */
/* Timer Complementary PWM functions ****************************************/ /* Timer Complementary PWM functions ****************************************/
/* Blocking mode: Polling */ /* Blocking mode: Polling */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
...@@ -264,9 +264,9 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chan ...@@ -264,9 +264,9 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
* @brief Timer Complementary One Pulse functions * @brief Timer Complementary One Pulse functions
* @{ * @{
*/ */
/* Timer Complementary One Pulse functions **********************************/ /* Timer Complementary One Pulse functions **********************************/
/* Blocking mode: Polling */ /* Blocking mode: Polling */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
...@@ -280,17 +280,23 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t ...@@ -280,17 +280,23 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t
*/ */
/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
* @brief Peripheral Control functions * @brief Peripheral Control functions
* @{ * @{
*/ */
/* Extended Control functions ************************************************/ /* Extended Control functions ************************************************/
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig); uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
TIM_MasterConfigTypeDef *sMasterConfig);
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
#if defined(TIM_BREAK_INPUT_SUPPORT) #if defined(TIM_BREAK_INPUT_SUPPORT)
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
#endif /* TIM_BREAK_INPUT_SUPPORT */ #endif /* TIM_BREAK_INPUT_SUPPORT */
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
...@@ -327,7 +333,7 @@ HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); ...@@ -327,7 +333,7 @@ HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
/* End of exported functions -------------------------------------------------*/ /* End of exported functions -------------------------------------------------*/
/* Private functions----------------------------------------------------------*/ /* Private functions----------------------------------------------------------*/
/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions /** @addtogroup TIMEx_Private_Functions TIMEx Private Functions
* @{ * @{
*/ */
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
......
...@@ -155,7 +155,7 @@ typedef struct ...@@ -155,7 +155,7 @@ typedef struct
typedef struct typedef struct
{ {
uint8_t dev_addr ; /*!< USB device address. uint8_t dev_addr; /*!< USB device address.
This parameter must be a number between Min_Data = 1 and Max_Data = 255 */ This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
uint8_t ch_num; /*!< Host channel number. uint8_t ch_num; /*!< Host channel number.
...@@ -199,10 +199,10 @@ typedef struct ...@@ -199,10 +199,10 @@ typedef struct
uint32_t ErrCnt; /*!< Host channel error count.*/ uint32_t ErrCnt; /*!< Host channel error count.*/
USB_OTG_URBStateTypeDef urb_state; /*!< URB state. USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
This parameter can be any value of @ref USB_OTG_URBStateTypeDef */ This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
USB_OTG_HCStateTypeDef state; /*!< Host Channel state. USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
This parameter can be any value of @ref USB_OTG_HCStateTypeDef */ This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
} USB_OTG_HCTypeDef; } USB_OTG_HCTypeDef;
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
...@@ -234,6 +234,18 @@ typedef struct ...@@ -234,6 +234,18 @@ typedef struct
* @} * @}
*/ */
/** @defgroup USB_LL Device Speed
* @{
*/
#define USBD_HS_SPEED 0U
#define USBD_HSINFS_SPEED 1U
#define USBH_HS_SPEED 0U
#define USBD_FS_SPEED 2U
#define USBH_FSLS_SPEED 1U
/**
* @}
*/
/** @defgroup USB_LL_Core_Speed USB Low Layer Core Speed /** @defgroup USB_LL_Core_Speed USB Low Layer Core Speed
* @{ * @{
*/ */
...@@ -252,7 +264,7 @@ typedef struct ...@@ -252,7 +264,7 @@ typedef struct
#define USB_OTG_HS_EMBEDDED_PHY 3U #define USB_OTG_HS_EMBEDDED_PHY 3U
#if !defined (USB_HS_PHYC_TUNE_VALUE) #if !defined (USB_HS_PHYC_TUNE_VALUE)
#define USB_HS_PHYC_TUNE_VALUE 0x00000F13U /*!< Value of USB HS PHY Tune */ #define USB_HS_PHYC_TUNE_VALUE 0x00000F13U /*!< Value of USB HS PHY Tune */
#endif /* USB_HS_PHYC_TUNE_VALUE */ #endif /* USB_HS_PHYC_TUNE_VALUE */
/** /**
* @} * @}
...@@ -262,11 +274,11 @@ typedef struct ...@@ -262,11 +274,11 @@ typedef struct
* @{ * @{
*/ */
#ifndef USBD_HS_TRDT_VALUE #ifndef USBD_HS_TRDT_VALUE
#define USBD_HS_TRDT_VALUE 9U #define USBD_HS_TRDT_VALUE 9U
#endif /* USBD_HS_TRDT_VALUE */ #endif /* USBD_HS_TRDT_VALUE */
#ifndef USBD_FS_TRDT_VALUE #ifndef USBD_FS_TRDT_VALUE
#define USBD_FS_TRDT_VALUE 5U #define USBD_FS_TRDT_VALUE 5U
#define USBD_DEFAULT_TRDT_VALUE 9U #define USBD_DEFAULT_TRDT_VALUE 9U
#endif /* USBD_HS_TRDT_VALUE */ #endif /* USBD_HS_TRDT_VALUE */
/** /**
* @} * @}
...@@ -275,9 +287,9 @@ typedef struct ...@@ -275,9 +287,9 @@ typedef struct
/** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS /** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS
* @{ * @{
*/ */
#define USB_OTG_HS_MAX_PACKET_SIZE 512U #define USB_OTG_HS_MAX_PACKET_SIZE 512U
#define USB_OTG_FS_MAX_PACKET_SIZE 64U #define USB_OTG_FS_MAX_PACKET_SIZE 64U
#define USB_OTG_MAX_EP0_SIZE 64U #define USB_OTG_MAX_EP0_SIZE 64U
/** /**
* @} * @}
*/ */
...@@ -287,7 +299,6 @@ typedef struct ...@@ -287,7 +299,6 @@ typedef struct
*/ */
#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1) #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1)
#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1) #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1)
#define DSTS_ENUMSPD_LS_PHY_6MHZ (2U << 1)
#define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1) #define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1)
/** /**
* @} * @}
...@@ -397,7 +408,7 @@ typedef struct ...@@ -397,7 +408,7 @@ typedef struct
#define USBPHYC ((USBPHYC_GlobalTypeDef *)((uint32_t )USB_PHY_HS_CONTROLLER_BASE)) #define USBPHYC ((USBPHYC_GlobalTypeDef *)((uint32_t )USB_PHY_HS_CONTROLLER_BASE))
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
#define EP_ADDR_MSK 0xFU #define EP_ADDR_MSK 0xFU
/** /**
* @} * @}
*/ */
...@@ -462,13 +473,9 @@ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx); ...@@ -462,13 +473,9 @@ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state); HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state);
uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx); uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx);
uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx); uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
uint8_t ch_num, uint8_t epnum, uint8_t dev_address, uint8_t speed,
uint8_t epnum, uint8_t ep_type, uint16_t mps);
uint8_t dev_address,
uint8_t speed,
uint8_t ep_type,
uint16_t mps);
HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma); HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx); uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx);
HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num); HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num);
......
...@@ -50,11 +50,11 @@ ...@@ -50,11 +50,11 @@
* @{ * @{
*/ */
/** /**
* @brief STM32F7xx HAL Driver version number V1.2.7 * @brief STM32F7xx HAL Driver version number V1.2.8
*/ */
#define __STM32F7xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */ #define __STM32F7xx_HAL_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32F7xx_HAL_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */ #define __STM32F7xx_HAL_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
#define __STM32F7xx_HAL_VERSION_SUB2 (0x07) /*!< [15:8] sub2 version */ #define __STM32F7xx_HAL_VERSION_SUB2 (0x08) /*!< [15:8] sub2 version */
#define __STM32F7xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32F7xx_HAL_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F7xx_HAL_VERSION ((__STM32F7xx_HAL_VERSION_MAIN << 24)\ #define __STM32F7xx_HAL_VERSION ((__STM32F7xx_HAL_VERSION_MAIN << 24)\
|(__STM32F7xx_HAL_VERSION_SUB1 << 16)\ |(__STM32F7xx_HAL_VERSION_SUB1 << 16)\
...@@ -319,14 +319,26 @@ uint32_t HAL_GetTickPrio(void) ...@@ -319,14 +319,26 @@ uint32_t HAL_GetTickPrio(void)
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq) HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
{ {
HAL_StatusTypeDef status = HAL_OK; HAL_StatusTypeDef status = HAL_OK;
HAL_TickFreqTypeDef prevTickFreq;
assert_param(IS_TICKFREQ(Freq)); assert_param(IS_TICKFREQ(Freq));
if (uwTickFreq != Freq) if (uwTickFreq != Freq)
{ {
/* Back up uwTickFreq frequency */
prevTickFreq = uwTickFreq;
/* Update uwTickFreq global variable used by HAL_InitTick() */
uwTickFreq = Freq; uwTickFreq = Freq;
/* Apply the new tick Freq */ /* Apply the new tick Freq */
status = HAL_InitTick(uwTickPrio); status = HAL_InitTick(uwTickPrio);
if (status != HAL_OK)
{
/* Restore previous tick frequency */
uwTickFreq = prevTickFreq;
}
} }
return status; return status;
......
...@@ -190,25 +190,6 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) ...@@ -190,25 +190,6 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
if(iocurrent == ioposition) if(iocurrent == ioposition)
{ {
/*--------------------- GPIO Mode Configuration ------------------------*/ /*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3];
temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
GPIOx->AFR[position >> 3] = temp;
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
temp &= ~(GPIO_MODER_MODER0 << (position * 2));
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
GPIOx->MODER = temp;
/* In case of Output or Alternate function mode selection */ /* In case of Output or Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
...@@ -234,6 +215,25 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) ...@@ -234,6 +215,25 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
temp |= ((GPIO_Init->Pull) << (position * 2)); temp |= ((GPIO_Init->Pull) << (position * 2));
GPIOx->PUPDR = temp; GPIOx->PUPDR = temp;
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3];
temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4));
GPIOx->AFR[position >> 3] = temp;
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
temp &= ~(GPIO_MODER_MODER0 << (position * 2));
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2));
GPIOx->MODER = temp;
/*--------------------- EXTI Mode Configuration ------------------------*/ /*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */ /* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
...@@ -300,7 +300,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) ...@@ -300,7 +300,7 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
/* Check the parameters */ /* Check the parameters */
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
/* Configure the port pins */ /* Configure the port pins */
for(position = 0; position < GPIO_NUMBER; position++) for(position = 0; position < GPIO_NUMBER; position++)
{ {
...@@ -316,10 +316,6 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) ...@@ -316,10 +316,6 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03)));
if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)))) if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))))
{ {
/* Configure the External Interrupt or event for the current IO */
tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
SYSCFG->EXTICR[position >> 2] &= ~tmp;
/* Clear EXTI line configuration */ /* Clear EXTI line configuration */
EXTI->IMR &= ~((uint32_t)iocurrent); EXTI->IMR &= ~((uint32_t)iocurrent);
EXTI->EMR &= ~((uint32_t)iocurrent); EXTI->EMR &= ~((uint32_t)iocurrent);
...@@ -327,6 +323,10 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) ...@@ -327,6 +323,10 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
/* Clear Rising Falling edge configuration */ /* Clear Rising Falling edge configuration */
EXTI->RTSR &= ~((uint32_t)iocurrent); EXTI->RTSR &= ~((uint32_t)iocurrent);
EXTI->FTSR &= ~((uint32_t)iocurrent); EXTI->FTSR &= ~((uint32_t)iocurrent);
/* Configure the External Interrupt or event for the current IO */
tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
SYSCFG->EXTICR[position >> 2] &= ~tmp;
} }
/*------------------------- GPIO Mode Configuration --------------------*/ /*------------------------- GPIO Mode Configuration --------------------*/
/* Configure IO Direction in Input Floating Mode */ /* Configure IO Direction in Input Floating Mode */
...@@ -335,14 +335,14 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) ...@@ -335,14 +335,14 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
/* Configure the default Alternate Function in current IO */ /* Configure the default Alternate Function in current IO */
GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; GPIOx->AFR[position >> 3] &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
/* Configure the default value for IO Speed */ /* Deactivate the Pull-up and Pull-down resistor for the current IO */
GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
/* Configure the default value IO Output Type */ /* Configure the default value IO Output Type */
GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
/* Deactivate the Pull-up and Pull-down resistor for the current IO */ /* Configure the default value for IO Speed */
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2)); GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
} }
} }
} }
...@@ -431,13 +431,13 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) ...@@ -431,13 +431,13 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
/* Check the parameters */ /* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->ODR & GPIO_Pin) == GPIO_Pin) if ((GPIOx->ODR & GPIO_Pin) != 0X00u)
{ {
GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER; GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
} }
else else
{ {
GPIOx->BSRR = GPIO_Pin; GPIOx->BSRR = (uint32_t)GPIO_Pin;
} }
} }
...@@ -467,10 +467,11 @@ HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) ...@@ -467,10 +467,11 @@ HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
GPIOx->LCKR = GPIO_Pin; GPIOx->LCKR = GPIO_Pin;
/* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
GPIOx->LCKR = tmp; GPIOx->LCKR = tmp;
/* Read LCKK bit*/ /* Read LCKR register. This read is mandatory to complete key lock sequence */
tmp = GPIOx->LCKR; tmp = GPIOx->LCKR;
if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) /* Read again in order to confirm lock is active */
if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
{ {
return HAL_OK; return HAL_OK;
} }
......
...@@ -223,12 +223,12 @@ ...@@ -223,12 +223,12 @@
*** Callback registration *** *** Callback registration ***
============================================= =============================================
[..]
The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1 The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1
allows the user to configure dynamically the driver callbacks. allows the user to configure dynamically the driver callbacks.
Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback() Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback()
to register an interrupt callback. to register an interrupt callback.
[..]
Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks: Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks:
(+) MasterTxCpltCallback : callback for Master transmission end of transfer. (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
(+) MasterRxCpltCallback : callback for Master reception end of transfer. (+) MasterRxCpltCallback : callback for Master reception end of transfer.
...@@ -243,9 +243,9 @@ ...@@ -243,9 +243,9 @@
(+) MspDeInitCallback : callback for Msp DeInit. (+) MspDeInitCallback : callback for Msp DeInit.
This function takes as parameters the HAL peripheral handle, the Callback ID This function takes as parameters the HAL peripheral handle, the Callback ID
and a pointer to the user callback function. and a pointer to the user callback function.
[..]
For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback(). For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback().
[..]
Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default
weak function. weak function.
@ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle, @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
...@@ -262,9 +262,9 @@ ...@@ -262,9 +262,9 @@
(+) AbortCpltCallback : callback for abort completion process. (+) AbortCpltCallback : callback for abort completion process.
(+) MspInitCallback : callback for Msp Init. (+) MspInitCallback : callback for Msp Init.
(+) MspDeInitCallback : callback for Msp DeInit. (+) MspDeInitCallback : callback for Msp DeInit.
[..]
For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback(). For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback().
[..]
By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET
all callbacks are set to the corresponding weak functions: all callbacks are set to the corresponding weak functions:
examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback(). examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback().
...@@ -273,7 +273,7 @@ ...@@ -273,7 +273,7 @@
these callbacks are null (not registered beforehand). these callbacks are null (not registered beforehand).
If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit()
keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
[..]
Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only. Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only.
Exception done MspInit/MspDeInit functions that can be registered/unregistered Exception done MspInit/MspDeInit functions that can be registered/unregistered
in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state, in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state,
...@@ -281,7 +281,7 @@ ...@@ -281,7 +281,7 @@
Then, the user first registers the MspInit/MspDeInit user callbacks Then, the user first registers the MspInit/MspDeInit user callbacks
using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit() using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit()
or @ref HAL_I2C_Init() function. or @ref HAL_I2C_Init() function.
[..]
When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or
not defined, the callback registration feature is not available and all callbacks not defined, the callback registration feature is not available and all callbacks
are set to the corresponding weak functions. are set to the corresponding weak functions.
...@@ -4737,6 +4737,13 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint ...@@ -4737,6 +4737,13 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint
/* Process locked */ /* Process locked */
__HAL_LOCK(hi2c); __HAL_LOCK(hi2c);
/* Check if STOPF is set */
if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
{
/* Call I2C Slave complete process */
I2C_ITSlaveCplt(hi2c, tmpITFlags);
}
if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
{ {
/* Check that I2C transfer finished */ /* Check that I2C transfer finished */
...@@ -4788,9 +4795,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint ...@@ -4788,9 +4795,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint
{ {
if (hi2c->XferCount > 0U) if (hi2c->XferCount > 0U)
{ {
/* Remove RXNE flag on temporary variable as read done */
tmpITFlags &= ~I2C_FLAG_RXNE;
/* Read data from RXDR */ /* Read data from RXDR */
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;
...@@ -4844,13 +4848,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint ...@@ -4844,13 +4848,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint
/* Nothing to do */ /* Nothing to do */
} }
/* Check if STOPF is set */
if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
{
/* Call I2C Slave complete process */
I2C_ITSlaveCplt(hi2c, tmpITFlags);
}
/* Process Unlocked */ /* Process Unlocked */
__HAL_UNLOCK(hi2c); __HAL_UNLOCK(hi2c);
...@@ -5008,6 +5005,13 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin ...@@ -5008,6 +5005,13 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin
/* Process locked */ /* Process locked */
__HAL_LOCK(hi2c); __HAL_LOCK(hi2c);
/* Check if STOPF is set */
if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
{
/* Call I2C Slave complete process */
I2C_ITSlaveCplt(hi2c, ITFlags);
}
if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
{ {
/* Check that I2C transfer finished */ /* Check that I2C transfer finished */
...@@ -5092,11 +5096,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin ...@@ -5092,11 +5096,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin
{ {
I2C_ITAddrCplt(hi2c, ITFlags); I2C_ITAddrCplt(hi2c, ITFlags);
} }
else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
{
/* Call I2C Slave complete process */
I2C_ITSlaveCplt(hi2c, ITFlags);
}
else else
{ {
/* Nothing to do */ /* Nothing to do */
......
...@@ -73,7 +73,7 @@ ...@@ -73,7 +73,7 @@
* opensource.org/licenses/BSD-3-Clause * opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*/ */
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f7xx_hal.h" #include "stm32f7xx_hal.h"
...@@ -397,11 +397,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32 ...@@ -397,11 +397,11 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
if ((htim->State == HAL_TIM_STATE_BUSY)) if (htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if ((htim->State == HAL_TIM_STATE_READY)) else if (htim->State == HAL_TIM_STATE_READY)
{ {
if (((uint32_t)pData == 0U) && (Length > 0U)) if (((uint32_t)pData == 0U) && (Length > 0U))
{ {
...@@ -709,11 +709,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan ...@@ -709,11 +709,11 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
if ((htim->State == HAL_TIM_STATE_BUSY)) if (htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if ((htim->State == HAL_TIM_STATE_READY)) else if (htim->State == HAL_TIM_STATE_READY)
{ {
if (((uint32_t)pData == 0U) && (Length > 0U)) if (((uint32_t)pData == 0U) && (Length > 0U))
{ {
...@@ -1117,11 +1117,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha ...@@ -1117,11 +1117,11 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
if ((htim->State == HAL_TIM_STATE_BUSY)) if (htim->State == HAL_TIM_STATE_BUSY)
{ {
return HAL_BUSY; return HAL_BUSY;
} }
else if ((htim->State == HAL_TIM_STATE_READY)) else if (htim->State == HAL_TIM_STATE_READY)
{ {
if (((uint32_t)pData == 0U) && (Length > 0U)) if (((uint32_t)pData == 0U) && (Length > 0U))
{ {
...@@ -1466,7 +1466,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t ...@@ -1466,7 +1466,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t
* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
* @retval HAL status * @retval HAL status
*/ */
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
uint32_t CommutationSource)
{ {
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
...@@ -1521,7 +1522,8 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t ...@@ -1521,7 +1522,8 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t
* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
* @retval HAL status * @retval HAL status
*/ */
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
uint32_t CommutationSource)
{ {
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
...@@ -1577,7 +1579,8 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32 ...@@ -1577,7 +1579,8 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32
* @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
* @retval HAL status * @retval HAL status
*/ */
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
uint32_t CommutationSource)
{ {
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
...@@ -1632,7 +1635,7 @@ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, ...@@ -1632,7 +1635,7 @@ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
uint32_t tmpsmcr; uint32_t tmpsmcr;
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
...@@ -1665,16 +1668,19 @@ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, ...@@ -1665,16 +1668,19 @@ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
/* Select the TRGO source */ /* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger; tmpcr2 |= sMasterConfig->MasterOutputTrigger;
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
/* Update TIMx CR2 */ /* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2; htim->Instance->CR2 = tmpcr2;
/* Update TIMx SMCR */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
htim->Instance->SMCR = tmpsmcr; {
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
}
/* Change the htim state */ /* Change the htim state */
htim->State = HAL_TIM_STATE_READY; htim->State = HAL_TIM_STATE_READY;
...@@ -1690,6 +1696,9 @@ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, ...@@ -1690,6 +1696,9 @@ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
* @param htim TIM handle * @param htim TIM handle
* @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
* contains the BDTR Register configuration information for the TIM peripheral. * contains the BDTR Register configuration information for the TIM peripheral.
* @note Interrupts can be generated when an active level is detected on the
* break input, the break 2 input or the system break input. Break
* interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
* @retval HAL status * @retval HAL status
*/ */
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
...@@ -1763,10 +1772,10 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, ...@@ -1763,10 +1772,10 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
{ {
uint32_t tmporx; uint32_t tmporx;
uint32_t bkin_enable_mask = 0U; uint32_t bkin_enable_mask;
uint32_t bkin_polarity_mask = 0U; uint32_t bkin_polarity_mask;
uint32_t bkin_enable_bitpos = 0U; uint32_t bkin_enable_bitpos;
uint32_t bkin_polarity_bitpos = 0U; uint32_t bkin_polarity_bitpos;
/* Check the parameters */ /* Check the parameters */
assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
...@@ -1800,11 +1809,19 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, ...@@ -1800,11 +1809,19 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
{ {
bkin_enable_mask = TIM1_AF1_BKDF1BKE; bkin_enable_mask = TIM1_AF1_BKDF1BKE;
bkin_enable_bitpos = 8; bkin_enable_bitpos = 8;
bkin_polarity_mask = 0U;
bkin_polarity_bitpos = 0U;
break; break;
} }
default: default:
{
bkin_enable_mask = 0U;
bkin_polarity_mask = 0U;
bkin_enable_bitpos = 0U;
bkin_polarity_bitpos = 0U;
break; break;
}
} }
switch (BreakInput) switch (BreakInput)
...@@ -2054,7 +2071,7 @@ HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) ...@@ -2054,7 +2071,7 @@ HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
*/ */
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
* @{ * @{
*/ */
......
...@@ -220,9 +220,6 @@ ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStru ...@@ -220,9 +220,6 @@ ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStru
if (currentpin) if (currentpin)
{ {
/* Pin Mode configuration */
LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
{ {
/* Check Speed mode parameters */ /* Check Speed mode parameters */
...@@ -230,6 +227,12 @@ ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStru ...@@ -230,6 +227,12 @@ ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStru
/* Speed mode configuration */ /* Speed mode configuration */
LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
/* Check Output mode parameters */
assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
/* Output mode configuration*/
LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
} }
/* Pull-up Pull down resistor configuration*/ /* Pull-up Pull down resistor configuration*/
...@@ -250,19 +253,11 @@ ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStru ...@@ -250,19 +253,11 @@ ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStru
LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
} }
} }
/* Pin Mode configuration */
LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
} }
pinpos++; pinpos++;
} }
if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
{
/* Check Output mode parameters */
assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
/* Output mode configuration*/
LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
}
return (SUCCESS); return (SUCCESS);
} }
......
...@@ -163,7 +163,7 @@ uint32_t RCC_PLLI2S_GetFreqDomain_SPDIFRX(void); ...@@ -163,7 +163,7 @@ uint32_t RCC_PLLI2S_GetFreqDomain_SPDIFRX(void);
*/ */
ErrorStatus LL_RCC_DeInit(void) ErrorStatus LL_RCC_DeInit(void)
{ {
uint32_t vl_mask = 0xFFFFFFFFU; __IO uint32_t vl_mask;
/* Set HSION bit */ /* Set HSION bit */
LL_RCC_HSI_Enable(); LL_RCC_HSI_Enable();
...@@ -175,10 +175,13 @@ ErrorStatus LL_RCC_DeInit(void) ...@@ -175,10 +175,13 @@ ErrorStatus LL_RCC_DeInit(void)
/* Reset CFGR register */ /* Reset CFGR register */
LL_RCC_WriteReg(CFGR, 0x00000000U); LL_RCC_WriteReg(CFGR, 0x00000000U);
/* Read CR register */
vl_mask = LL_RCC_ReadReg(CR);
/* Reset HSEON, HSEBYP, PLLON, CSSON, PLLI2SON and PLLSAION bits */ /* Reset HSEON, HSEBYP, PLLON, CSSON, PLLI2SON and PLLSAION bits */
CLEAR_BIT(vl_mask, (RCC_CR_HSEON | RCC_CR_HSEBYP | RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_PLLSAION | RCC_CR_PLLI2SON)); CLEAR_BIT(vl_mask, (RCC_CR_HSEON | RCC_CR_HSEBYP | RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_PLLSAION | RCC_CR_PLLI2SON));
/* Write new mask in CR register */ /* Write new value in CR register */
LL_RCC_WriteReg(CR, vl_mask); LL_RCC_WriteReg(CR, vl_mask);
/* Set HSITRIM bits to the reset value*/ /* Set HSITRIM bits to the reset value*/
......
...@@ -22,11 +22,11 @@ ...@@ -22,11 +22,11 @@
#include "stm32f7xx_ll_usart.h" #include "stm32f7xx_ll_usart.h"
#include "stm32f7xx_ll_rcc.h" #include "stm32f7xx_ll_rcc.h"
#include "stm32f7xx_ll_bus.h" #include "stm32f7xx_ll_bus.h"
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
#include "stm32_assert.h" #include "stm32_assert.h"
#else #else
#define assert_param(expr) ((void)0U) #define assert_param(expr) ((void)0U)
#endif #endif /* USE_FULL_ASSERT */
/** @addtogroup STM32F7xx_LL_Driver /** @addtogroup STM32F7xx_LL_Driver
* @{ * @{
...@@ -41,14 +41,6 @@ ...@@ -41,14 +41,6 @@
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/** @addtogroup USART_LL_Private_Constants
* @{
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @addtogroup USART_LL_Private_Macros /** @addtogroup USART_LL_Private_Macros
* @{ * @{
...@@ -65,42 +57,42 @@ ...@@ -65,42 +57,42 @@
#define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU) #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
#define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
|| ((__VALUE__) == LL_USART_DIRECTION_RX) \ || ((__VALUE__) == LL_USART_DIRECTION_RX) \
|| ((__VALUE__) == LL_USART_DIRECTION_TX) \ || ((__VALUE__) == LL_USART_DIRECTION_TX) \
|| ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
#define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
|| ((__VALUE__) == LL_USART_PARITY_EVEN) \ || ((__VALUE__) == LL_USART_PARITY_EVEN) \
|| ((__VALUE__) == LL_USART_PARITY_ODD)) || ((__VALUE__) == LL_USART_PARITY_ODD))
#define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \ #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
|| ((__VALUE__) == LL_USART_DATAWIDTH_8B) \ || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
|| ((__VALUE__) == LL_USART_DATAWIDTH_9B)) || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
#define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
|| ((__VALUE__) == LL_USART_OVERSAMPLING_8)) || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
#define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
|| ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT)) || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
#define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
|| ((__VALUE__) == LL_USART_PHASE_2EDGE)) || ((__VALUE__) == LL_USART_PHASE_2EDGE))
#define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
|| ((__VALUE__) == LL_USART_POLARITY_HIGH)) || ((__VALUE__) == LL_USART_POLARITY_HIGH))
#define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
|| ((__VALUE__) == LL_USART_CLOCK_ENABLE)) || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
#define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
|| ((__VALUE__) == LL_USART_STOPBITS_1) \ || ((__VALUE__) == LL_USART_STOPBITS_1) \
|| ((__VALUE__) == LL_USART_STOPBITS_1_5) \ || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
|| ((__VALUE__) == LL_USART_STOPBITS_2)) || ((__VALUE__) == LL_USART_STOPBITS_2))
#define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \ #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS) \ || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
|| ((__VALUE__) == LL_USART_HWCONTROL_CTS) \ || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
|| ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS)) || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
/** /**
* @} * @}
......
...@@ -3,9 +3,9 @@ ...@@ -3,9 +3,9 @@
* @file stm32_assert.h * @file stm32_assert.h
* @brief STM32 assert file. * @brief STM32 assert file.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.</center></h2>
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software component is licensed by ST under BSD 3-Clause license,
......
########################################################################################################################## ##########################################################################################################################
# File automatically-generated by tool: [projectgenerator] version: [3.5.2] date: [Sat Nov 02 10:20:31 CET 2019] # File automatically-generated by tool: [projectgenerator] version: [3.7.1] date: [Fri May 01 19:54:41 CEST 2020]
########################################################################################################################## ##########################################################################################################################
# ------------------------------------------------ # ------------------------------------------------
...@@ -22,7 +22,7 @@ TARGET = f7 ...@@ -22,7 +22,7 @@ TARGET = f7
# debug build? # debug build?
DEBUG = 0 DEBUG = 0
# optimization # optimization
OPT = -O2 OPT = -O3
####################################### #######################################
...@@ -39,7 +39,6 @@ C_SOURCES = \ ...@@ -39,7 +39,6 @@ C_SOURCES = \
Src/main.c \ Src/main.c \
Src/stm32f7xx_it.c \ Src/stm32f7xx_it.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c \ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c \ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c \ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c \ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c \
...@@ -48,7 +47,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c \ ...@@ -48,7 +47,7 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c \
Src/system_stm32f7xx.c \ Src/system_stm32f7xx.c \
Src/test.c \ Src/test.c \
Src/uartp.c \ Src/uartp.c \
$(SRC_FILES) $(SRC_FILES)
# ASM sources # ASM sources
ASM_SOURCES = \ ASM_SOURCES = \
...@@ -75,7 +74,7 @@ SZ = $(PREFIX)size ...@@ -75,7 +74,7 @@ SZ = $(PREFIX)size
endif endif
HEX = $(CP) -O ihex HEX = $(CP) -O ihex
BIN = $(CP) -O binary -S BIN = $(CP) -O binary -S
####################################### #######################################
# CFLAGS # CFLAGS
####################################### #######################################
...@@ -121,7 +120,6 @@ C_INCLUDES = \ ...@@ -121,7 +120,6 @@ C_INCLUDES = \
-IInc \ -IInc \
-IDrivers/STM32F7xx_HAL_Driver/Inc \ -IDrivers/STM32F7xx_HAL_Driver/Inc \
-IDrivers/CMSIS/Device/ST/STM32F7xx/Include \ -IDrivers/CMSIS/Device/ST/STM32F7xx/Include \
-IDrivers/CMSIS/Include \
-IDrivers/CMSIS/Include -IDrivers/CMSIS/Include
......
...@@ -71,7 +71,6 @@ int main(void) ...@@ -71,7 +71,6 @@ int main(void)
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/ /* MCU Configuration--------------------------------------------------------*/
...@@ -157,7 +156,6 @@ void SystemClock_Config(void) ...@@ -157,7 +156,6 @@ void SystemClock_Config(void)
} }
LL_Init1msTick(216000000); LL_Init1msTick(216000000);
LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);
LL_SetSystemCoreClock(216000000); LL_SetSystemCoreClock(216000000);
LL_RCC_SetUSARTClockSource(LL_RCC_USART2_CLKSOURCE_PCLK1); LL_RCC_SetUSARTClockSource(LL_RCC_USART2_CLKSOURCE_PCLK1);
LL_RCC_SetUSARTClockSource(LL_RCC_USART3_CLKSOURCE_PCLK1); LL_RCC_SetUSARTClockSource(LL_RCC_USART3_CLKSOURCE_PCLK1);
......
#!/bin/bash #!/bin/bash
mv -n *.dat *.inc *.h Inc/ mv -n *.dat *.inc *.h Inc/
sed -i src/encrypt.c -e "s/\(\s\)init(/\1_init(/g" [ -f ./build ] && rm ./build
[ -f src/encrypt.c ] && sed -i src/encrypt.c -e "s/\(\s\)init(/\1_init(/g"
mkdir -p /tmp/f7/Drivers mkdir -p /tmp/f7/Drivers
ln -s /tmp/f7/Drivers Drivers ln -s /tmp/f7/Drivers Drivers
exit 0 exit 0
...@@ -2,17 +2,11 @@ ...@@ -2,17 +2,11 @@
platform = kendryte210 platform = kendryte210
board = sipeed-maixduino board = sipeed-maixduino
framework = arduino framework = arduino
platform_packages =
; change microcontroller toolchain-kendryte210 @ 8.2.0
board_build.mcu = K210 board_build.mcu = K210
; change MCU frequency
board_build.f_cpu = 600000000L board_build.f_cpu = 600000000L
; upload speed
upload_speed = 750000 upload_speed = 750000
; compiler optimizations to favour speed over size
build_flags = -O3 -UDEBUG -DNDEBUG build_flags = -O3 -UDEBUG -DNDEBUG
build_unflags = -Os build_unflags = -Os
build_type = release build_type = release
[env:uno] [env:uno]
platform = atmelavr platform = atmelavr
platform_packages =
toolchain-atmelavr @ 1.70300.191015
framework = arduino framework = arduino
board = uno board = uno
build_flags = -Os -UDEBUG -DNDEBUG build_flags = -Os -UDEBUG -DNDEBUG
......
...@@ -8,6 +8,7 @@ import signal ...@@ -8,6 +8,7 @@ import signal
import datetime import datetime
import threading import threading
import subprocess import subprocess
import json
from flask import Flask, request, Response from flask import Flask, request, Response
from flask_restful import Resource, Api from flask_restful import Resource, Api
from flask_jsonpify import jsonify from flask_jsonpify import jsonify
...@@ -34,12 +35,13 @@ class ScheduledTest: ...@@ -34,12 +35,13 @@ class ScheduledTest:
_next_id = 1 _next_id = 1
def __init__(self, **kwargs): def __init__(self, **kwargs):
self.path = kwargs['build_dir'] if len(kwargs) > 0:
self.cipher = kwargs['cipher'] self.path = kwargs['build_dir']
self.cipher_timestamp = kwargs['cipher_timestamp'] self.cipher = kwargs['cipher']
self.template_timestamp = kwargs['template_timestamp'] self.cipher_timestamp = kwargs['cipher_timestamp']
self.template = kwargs['template'] self.template_timestamp = kwargs['template_timestamp']
self.template_commit = kwargs['template_commit'] self.template = kwargs['template']
self.template_commit = kwargs['template_commit']
self.id = str(ScheduledTest._next_id) self.id = str(ScheduledTest._next_id)
ScheduledTest._next_id += 1 ScheduledTest._next_id += 1
...@@ -60,7 +62,10 @@ class ScheduledTest: ...@@ -60,7 +62,10 @@ class ScheduledTest:
a = ScheduledTest() a = ScheduledTest()
for k in ScheduledTest.__slots__: for k in ScheduledTest.__slots__:
if k not in ScheduledTest._unserialized_slots: if k not in ScheduledTest._unserialized_slots:
setattr(a, k, dict[k]) if k != 'id':
setattr(a, k, dict[k])
if a.state == 'RUNNING':
a.state = 'SCHEDULED'
return a return a
...@@ -78,8 +83,13 @@ class Runner(threading.Thread): ...@@ -78,8 +83,13 @@ class Runner(threading.Thread):
self.program = program self.program = program
self.process = None self.process = None
self.job = None self.job = None
# Event used for stopping the runner
self.stop_event = threading.Event() self.stop_event = threading.Event()
# Event used to abort only the current job
self.abort_event = threading.Event()
threading.Thread.__init__(self) threading.Thread.__init__(self)
self.name += "-%s" % template self.name += "-%s" % template
self.start() self.start()
...@@ -93,8 +103,12 @@ class Runner(threading.Thread): ...@@ -93,8 +103,12 @@ class Runner(threading.Thread):
} }
def stop(self): def stop(self):
self.abort_event.set()
self.stop_event.set() self.stop_event.set()
def abort_current_job(self):
self.abort_event.set()
def lock_new_job(self): def lock_new_job(self):
my_queue = [ my_queue = [
s for s in schedule s for s in schedule
...@@ -121,6 +135,7 @@ class Runner(threading.Thread): ...@@ -121,6 +135,7 @@ class Runner(threading.Thread):
def do_job(self): def do_job(self):
self.job.time_started = int(time.time()) self.job.time_started = int(time.time())
self.abort_event.clear()
cmd = [] cmd = []
cmd += self.program cmd += self.program
...@@ -136,7 +151,7 @@ class Runner(threading.Thread): ...@@ -136,7 +151,7 @@ class Runner(threading.Thread):
stderr=err_fd stderr=err_fd
) )
while self.process.poll() is None: while self.process.poll() is None:
if self.stop_event.wait(timeout=1): if self.abort_event.wait(timeout=1):
self.process.send_signal(signal.SIGINT) self.process.send_signal(signal.SIGINT)
try: try:
self.process.wait(timeout=1) self.process.wait(timeout=1)
...@@ -198,6 +213,27 @@ class DeleteJob(Resource): ...@@ -198,6 +213,27 @@ class DeleteJob(Resource):
return 'Job is already running', 400 return 'Job is already running', 400
class CancelJob(Resource):
def get(self, job_id):
job = [job for job in schedule if job.id == job_id]
job = job[0] if len(job) > 0 else None
if job is None:
return 'Job not found', 404
with job.lock:
if job.state == 'RUNNING':
r = [r for r in runners if r if r.job == job]
if len(r) == 0:
return 'Job runner not found', 404
process = r[0].process
if process is None:
return 'Job runner process not found', 404
process.send_signal(signal.SIGINT)
return jsonify({'success': True})
else:
return 'Job is not running', 400
class RestartJob(Resource): class RestartJob(Resource):
def get(self, job_id): def get(self, job_id):
job = [job for job in schedule if job.id == job_id] job = [job for job in schedule if job.id == job_id]
...@@ -235,6 +271,7 @@ class ScheduleJob(Resource): ...@@ -235,6 +271,7 @@ class ScheduleJob(Resource):
api.add_resource(Status, '/status') api.add_resource(Status, '/status')
api.add_resource(ScheduleJob, '/schedule_test') api.add_resource(ScheduleJob, '/schedule_test')
api.add_resource(CancelJob, '/cancel_test/<string:job_id>')
api.add_resource(RestartJob, '/restart_test/<string:job_id>') api.add_resource(RestartJob, '/restart_test/<string:job_id>')
api.add_resource(DeleteJob, '/delete_test/<string:job_id>') api.add_resource(DeleteJob, '/delete_test/<string:job_id>')
...@@ -303,4 +340,10 @@ if __name__ == '__main__': ...@@ -303,4 +340,10 @@ if __name__ == '__main__':
sys.exit(0) sys.exit(0)
signal.signal(signal.SIGINT, signal_handler) signal.signal(signal.SIGINT, signal_handler)
if len(sys.argv) > 1:
with open(sys.argv[1], 'r') as fin:
saved = json.load(fin)
for job in saved['schedule']:
schedule.append(ScheduledTest.from_dict(job))
app.run(port='5002') app.run(port='5002')
...@@ -170,8 +170,9 @@ def run_nist_aead_test_line(dut, i, m, ad, k, npub, c): ...@@ -170,8 +170,9 @@ def run_nist_aead_test_line(dut, i, m, ad, k, npub, c):
output = dut.obtain_var(ord('C')) output = dut.obtain_var(ord('C'))
print(" c = %s" % output.hex()) print(" c = %s" % output.hex())
if c != output: if c != output:
raise Exception("output of encryption is different from " + raise Exception(
"expected ciphertext") ("output of encryption (%s) is different from " +
"expected ciphertext (%s)") % (output.hex(), c.hex()))
dut.send_var(ord('m'), b"\0" * len(c)) dut.send_var(ord('m'), b"\0" * len(c))
dut.send_var(ord('s'), b"") dut.send_var(ord('s'), b"")
...@@ -185,8 +186,9 @@ def run_nist_aead_test_line(dut, i, m, ad, k, npub, c): ...@@ -185,8 +186,9 @@ def run_nist_aead_test_line(dut, i, m, ad, k, npub, c):
output = dut.obtain_var(ord('M')) output = dut.obtain_var(ord('M'))
print(" m = %s" % output.hex()) print(" m = %s" % output.hex())
if m != output: if m != output:
raise Exception("output of encryption is different from " + raise Exception(
"expected ciphertext") ("output of decryption (%s) is different from " +
"expected plaintext (%s)") % (output.hex(), m.hex()))
def parse_nist_aead_test_vectors(test_file_path): def parse_nist_aead_test_vectors(test_file_path):
......
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