#if defined(__AVR__)
#include <avr/io.h>
/* Automatically generated - do not edit */

	.section	.progmem.data,"a",@progbits
	.p2align	8
	.type	table_0, @object
	.size	table_0, 256
table_0:
	.byte	46
	.byte	28
	.byte	109
	.byte	43
	.byte	53
	.byte	7
	.byte	127
	.byte	59
	.byte	40
	.byte	8
	.byte	11
	.byte	95
	.byte	49
	.byte	17
	.byte	27
	.byte	77
	.byte	110
	.byte	84
	.byte	13
	.byte	9
	.byte	31
	.byte	69
	.byte	117
	.byte	83
	.byte	106
	.byte	93
	.byte	97
	.byte	0
	.byte	4
	.byte	120
	.byte	6
	.byte	30
	.byte	55
	.byte	111
	.byte	47
	.byte	73
	.byte	100
	.byte	52
	.byte	125
	.byte	25
	.byte	57
	.byte	51
	.byte	67
	.byte	87
	.byte	96
	.byte	98
	.byte	19
	.byte	5
	.byte	119
	.byte	71
	.byte	79
	.byte	75
	.byte	29
	.byte	45
	.byte	36
	.byte	72
	.byte	116
	.byte	88
	.byte	37
	.byte	94
	.byte	90
	.byte	118
	.byte	65
	.byte	66
	.byte	39
	.byte	62
	.byte	108
	.byte	1
	.byte	44
	.byte	60
	.byte	78
	.byte	26
	.byte	33
	.byte	42
	.byte	10
	.byte	85
	.byte	58
	.byte	56
	.byte	24
	.byte	126
	.byte	12
	.byte	99
	.byte	103
	.byte	86
	.byte	80
	.byte	124
	.byte	50
	.byte	122
	.byte	104
	.byte	2
	.byte	107
	.byte	23
	.byte	123
	.byte	89
	.byte	113
	.byte	15
	.byte	48
	.byte	16
	.byte	34
	.byte	61
	.byte	64
	.byte	105
	.byte	82
	.byte	20
	.byte	54
	.byte	68
	.byte	70
	.byte	3
	.byte	22
	.byte	101
	.byte	102
	.byte	114
	.byte	18
	.byte	14
	.byte	41
	.byte	74
	.byte	76
	.byte	112
	.byte	21
	.byte	38
	.byte	121
	.byte	81
	.byte	35
	.byte	63
	.byte	115
	.byte	91
	.byte	32
	.byte	92
	.byte	0
	.byte	18
	.byte	10
	.byte	75
	.byte	102
	.byte	12
	.byte	72
	.byte	115
	.byte	121
	.byte	62
	.byte	97
	.byte	81
	.byte	1
	.byte	21
	.byte	23
	.byte	14
	.byte	126
	.byte	51
	.byte	104
	.byte	54
	.byte	66
	.byte	53
	.byte	55
	.byte	94
	.byte	83
	.byte	76
	.byte	63
	.byte	84
	.byte	88
	.byte	110
	.byte	86
	.byte	42
	.byte	29
	.byte	37
	.byte	109
	.byte	101
	.byte	91
	.byte	113
	.byte	47
	.byte	32
	.byte	6
	.byte	24
	.byte	41
	.byte	58
	.byte	13
	.byte	122
	.byte	108
	.byte	27
	.byte	25
	.byte	67
	.byte	112
	.byte	65
	.byte	73
	.byte	34
	.byte	119
	.byte	96
	.byte	79
	.byte	69
	.byte	85
	.byte	2
	.byte	99
	.byte	71
	.byte	117
	.byte	45
	.byte	64
	.byte	70
	.byte	125
	.byte	92
	.byte	124
	.byte	89
	.byte	38
	.byte	11
	.byte	9
	.byte	3
	.byte	87
	.byte	93
	.byte	39
	.byte	120
	.byte	48
	.byte	46
	.byte	68
	.byte	82
	.byte	59
	.byte	8
	.byte	103
	.byte	44
	.byte	5
	.byte	107
	.byte	43
	.byte	26
	.byte	33
	.byte	56
	.byte	7
	.byte	15
	.byte	74
	.byte	17
	.byte	80
	.byte	106
	.byte	40
	.byte	49
	.byte	16
	.byte	77
	.byte	95
	.byte	114
	.byte	57
	.byte	22
	.byte	90
	.byte	19
	.byte	4
	.byte	60
	.byte	52
	.byte	31
	.byte	118
	.byte	30
	.byte	20
	.byte	35
	.byte	28
	.byte	50
	.byte	78
	.byte	123
	.byte	36
	.byte	116
	.byte	127
	.byte	61
	.byte	105
	.byte	100
	.byte	98
	.byte	111

	.section	.progmem.data,"a",@progbits
	.p2align	8
	.type	table_1, @object
	.size	table_1, 222
table_1:
	.byte	127
	.byte	63
	.byte	31
	.byte	15
	.byte	7
	.byte	3
	.byte	1
	.byte	64
	.byte	32
	.byte	16
	.byte	8
	.byte	4
	.byte	2
	.byte	65
	.byte	96
	.byte	48
	.byte	24
	.byte	12
	.byte	6
	.byte	67
	.byte	33
	.byte	80
	.byte	40
	.byte	20
	.byte	10
	.byte	69
	.byte	98
	.byte	113
	.byte	120
	.byte	60
	.byte	30
	.byte	79
	.byte	39
	.byte	19
	.byte	9
	.byte	68
	.byte	34
	.byte	81
	.byte	104
	.byte	52
	.byte	26
	.byte	77
	.byte	102
	.byte	115
	.byte	57
	.byte	92
	.byte	46
	.byte	87
	.byte	43
	.byte	21
	.byte	74
	.byte	101
	.byte	114
	.byte	121
	.byte	124
	.byte	62
	.byte	95
	.byte	47
	.byte	23
	.byte	11
	.byte	5
	.byte	66
	.byte	97
	.byte	112
	.byte	56
	.byte	28
	.byte	14
	.byte	71
	.byte	35
	.byte	17
	.byte	72
	.byte	36
	.byte	18
	.byte	73
	.byte	100
	.byte	50
	.byte	89
	.byte	108
	.byte	54
	.byte	91
	.byte	45
	.byte	86
	.byte	107
	.byte	53
	.byte	90
	.byte	109
	.byte	118
	.byte	123
	.byte	61
	.byte	94
	.byte	111
	.byte	55
	.byte	27
	.byte	13
	.byte	70
	.byte	99
	.byte	49
	.byte	88
	.byte	44
	.byte	22
	.byte	75
	.byte	37
	.byte	82
	.byte	105
	.byte	116
	.byte	58
	.byte	93
	.byte	110
	.byte	119
	.byte	59
	.byte	29
	.byte	78
	.byte	103
	.byte	51
	.byte	25
	.byte	76
	.byte	38
	.byte	83
	.byte	41
	.byte	84
	.byte	42
	.byte	85
	.byte	106
	.byte	117
	.byte	122
	.byte	125
	.byte	126
	.byte	127
	.byte	63
	.byte	31
	.byte	15
	.byte	7
	.byte	3
	.byte	1
	.byte	64
	.byte	32
	.byte	16
	.byte	8
	.byte	4
	.byte	2
	.byte	65
	.byte	96
	.byte	48
	.byte	24
	.byte	12
	.byte	6
	.byte	67
	.byte	33
	.byte	80
	.byte	40
	.byte	20
	.byte	10
	.byte	69
	.byte	98
	.byte	113
	.byte	120
	.byte	60
	.byte	30
	.byte	79
	.byte	39
	.byte	19
	.byte	9
	.byte	68
	.byte	34
	.byte	81
	.byte	104
	.byte	52
	.byte	26
	.byte	77
	.byte	102
	.byte	115
	.byte	57
	.byte	92
	.byte	46
	.byte	87
	.byte	43
	.byte	21
	.byte	74
	.byte	101
	.byte	114
	.byte	121
	.byte	124
	.byte	62
	.byte	95
	.byte	47
	.byte	23
	.byte	11
	.byte	5
	.byte	66
	.byte	97
	.byte	112
	.byte	56
	.byte	28
	.byte	14
	.byte	71
	.byte	35
	.byte	17
	.byte	72
	.byte	36
	.byte	18
	.byte	73
	.byte	100
	.byte	50
	.byte	89
	.byte	108
	.byte	54
	.byte	91
	.byte	45
	.byte	86
	.byte	107
	.byte	53
	.byte	90
	.byte	109
	.byte	118
	.byte	123
	.byte	61
	.byte	94
	.byte	111
	.byte	55
	.byte	27
	.byte	13
	.byte	70

	.text
.global wage_permute
	.type wage_permute, @function
wage_permute:
	push r28
	push r29
	push r2
	push r3
	push r4
	push r5
	push r6
	push r7
	push r8
	push r9
	push r10
	push r11
	push r12
	push r13
	push r14
	push r15
	push r16
	push r17
	movw r30,r24
	in r28,0x3d
	in r29,0x3e
	sbiw r28,37
	in r0,0x3f
	cli
	out 0x3e,r29
	out 0x3f,r0
	out 0x3d,r28
.L__stack_usage = 55
	ld r20,Z
	ldd r21,Z+1
	ldd r22,Z+2
	std Y+1,r20
	std Y+2,r21
	std Y+3,r22
	ldd r20,Z+3
	ldd r21,Z+4
	ldd r22,Z+5
	std Y+4,r20
	std Y+5,r21
	std Y+6,r22
	ldd r20,Z+6
	ldd r21,Z+7
	ldd r22,Z+8
	std Y+7,r20
	std Y+8,r21
	std Y+9,r22
	ldd r20,Z+9
	ldd r21,Z+10
	ldd r22,Z+11
	std Y+10,r20
	std Y+11,r21
	std Y+12,r22
	ldd r20,Z+12
	ldd r21,Z+13
	ldd r22,Z+14
	std Y+13,r20
	std Y+14,r21
	std Y+15,r22
	ldd r20,Z+15
	ldd r21,Z+16
	ldd r22,Z+17
	std Y+16,r20
	std Y+17,r21
	std Y+18,r22
	ldd r20,Z+18
	ldd r21,Z+19
	ldd r22,Z+20
	std Y+19,r20
	std Y+20,r21
	std Y+21,r22
	ldd r20,Z+21
	ldd r21,Z+22
	ldd r22,Z+23
	std Y+22,r20
	std Y+23,r21
	std Y+24,r22
	ldd r20,Z+24
	ldd r21,Z+25
	ldd r22,Z+26
	std Y+25,r20
	std Y+26,r21
	std Y+27,r22
	ldd r20,Z+27
	ldd r21,Z+28
	ldd r22,Z+29
	std Y+28,r20
	std Y+29,r21
	std Y+30,r22
	ldd r20,Z+30
	ldd r21,Z+31
	ldd r22,Z+32
	std Y+31,r20
	std Y+32,r21
	std Y+33,r22
	ldd r20,Z+33
	ldd r21,Z+34
	ldd r22,Z+35
	std Y+34,r20
	std Y+35,r21
	std Y+36,r22
	ldd r20,Z+36
	std Y+37,r20
	push r31
	push r30
	ldi r30,lo8(table_0)
	ldi r31,hi8(table_0)
#if defined(RAMPZ)
	ldi r23,hh8(table_0)
	in r0,_SFR_IO_ADDR(RAMPZ)
	push r0
	out _SFR_IO_ADDR(RAMPZ),r23
#endif
	mov r19,r1
78:
	ldd r20,Y+1
	mov r18,r1
	lsr r20
	sbc r18,r1
	andi r18,120
	eor r20,r18
	ldd r23,Y+7
	eor r20,r23
	ldd r26,Y+9
	eor r20,r26
	ldd r27,Y+13
	eor r20,r27
	ldd r2,Y+14
	eor r20,r2
	ldd r3,Y+20
	eor r20,r3
	ldd r4,Y+25
	eor r20,r4
	ldd r5,Y+27
	eor r20,r5
	ldd r6,Y+31
	eor r20,r6
	ldd r7,Y+32
	eor r20,r7
	ldd r21,Y+2
	mov r18,r1
	lsr r21
	sbc r18,r1
	andi r18,120
	eor r21,r18
	ldd r8,Y+8
	eor r21,r8
	ldd r9,Y+10
	eor r21,r9
	eor r21,r2
	ldd r10,Y+15
	eor r21,r10
	ldd r11,Y+21
	eor r21,r11
	ldd r12,Y+26
	eor r21,r12
	ldd r13,Y+28
	eor r21,r13
	eor r21,r7
	ldd r14,Y+33
	eor r21,r14
	ldd r22,Y+3
	mov r18,r1
	lsr r22
	sbc r18,r1
	andi r18,120
	eor r22,r18
	eor r22,r26
	ldd r15,Y+11
	eor r22,r15
	eor r22,r10
	ldd r24,Y+16
	eor r22,r24
	ldd r25,Y+22
	eor r22,r25
	eor r22,r5
	ldd r16,Y+29
	eor r22,r16
	eor r22,r14
	ldd r17,Y+34
	eor r22,r17
	mov r30,r26
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r23,Y+6
	eor r23,r18
	mov r30,r9
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r27,Y+7
	eor r27,r18
	mov r30,r15
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	eor r8,r18
	mov r30,r24
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r3,Y+12
	eor r3,r18
	ldd r4,Y+17
	mov r30,r4
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r6,Y+13
	eor r6,r18
	ldd r2,Y+18
	mov r30,r2
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r11,Y+14
	eor r11,r18
	mov r30,r13
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r12,Y+25
	eor r12,r18
	mov r30,r16
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r7,Y+26
	eor r7,r18
	ldd r10,Y+30
	mov r30,r10
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	eor r5,r18
	ldd r25,Y+35
	mov r30,r25
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r14,Y+31
	eor r14,r18
	ldd r17,Y+36
	mov r30,r17
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r26,Y+32
	eor r26,r18
	ldd r9,Y+37
	mov r30,r9
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r15,Y+33
	eor r15,r18
	ldi r30,lo8(table_1)
	ldi r31,hi8(table_1)
#if defined(RAMPZ)
	ldi r24,hh8(table_1)
	out _SFR_IO_ADDR(RAMPZ),r24
#endif
	mov r30,r19
#if defined(RAMPZ)
	elpm r2,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r2,Z
#elif defined(__AVR_TINY__)
	ld r2,Z
#else
	lpm
	mov r2,r0
#endif
	inc r19
	mov r30,r19
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	eor r20,r18
	inc r19
	mov r30,r19
#if defined(RAMPZ)
	elpm r4,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r4,Z
#elif defined(__AVR_TINY__)
	ld r4,Z
#else
	lpm
	mov r4,r0
#endif
	inc r19
	mov r30,r19
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	eor r21,r18
	inc r19
	mov r30,r19
#if defined(RAMPZ)
	elpm r24,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r24,Z
#elif defined(__AVR_TINY__)
	ld r24,Z
#else
	lpm
	mov r24,r0
#endif
	inc r19
	mov r30,r19
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	eor r22,r18
	inc r19
	ldi r30,lo8(table_0)
	ldi r31,hi8(table_0)
#if defined(RAMPZ)
	ldi r16,hh8(table_0)
	out _SFR_IO_ADDR(RAMPZ),r16
#endif
	ldd r16,Y+19
	mov r30,r16
	ori r30,128
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r13,Y+20
	eor r13,r18
	eor r13,r2
	mov r30,r13
	ori r30,128
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r2,Y+21
	eor r2,r18
	eor r2,r4
	mov r30,r2
	ori r30,128
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	ldd r4,Y+22
	eor r4,r18
	eor r4,r24
	mov r30,r9
	ori r30,128
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	eor r20,r18
	mov r30,r20
	ori r30,128
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	eor r21,r18
	mov r30,r21
	ori r30,128
#if defined(RAMPZ)
	elpm r18,Z
#elif defined(__AVR_HAVE_LPMX__)
	lpm r18,Z
#elif defined(__AVR_TINY__)
	ld r18,Z
#else
	lpm
	mov r18,r0
#endif
	eor r22,r18
	ldd r18,Y+4
	std Y+1,r18
	ldd r18,Y+5
	std Y+2,r18
	std Y+3,r23
	std Y+4,r27
	std Y+5,r8
	ldd r18,Y+9
	std Y+6,r18
	ldd r18,Y+10
	std Y+7,r18
	ldd r18,Y+11
	std Y+8,r18
	std Y+9,r3
	std Y+10,r6
	std Y+11,r11
	ldd r18,Y+15
	std Y+12,r18
	ldd r18,Y+16
	std Y+13,r18
	ldd r18,Y+17
	std Y+14,r18
	ldd r18,Y+18
	std Y+15,r18
	std Y+16,r16
	std Y+17,r13
	std Y+18,r2
	std Y+19,r4
	ldd r18,Y+23
	std Y+20,r18
	ldd r18,Y+24
	std Y+21,r18
	std Y+22,r12
	std Y+23,r7
	std Y+24,r5
	ldd r18,Y+28
	std Y+25,r18
	ldd r18,Y+29
	std Y+26,r18
	std Y+27,r10
	std Y+28,r14
	std Y+29,r26
	std Y+30,r15
	ldd r18,Y+34
	std Y+31,r18
	std Y+32,r25
	std Y+33,r17
	std Y+34,r9
	std Y+35,r20
	std Y+36,r21
	std Y+37,r22
	ldi r27,222
	cpse r19,r27
	rjmp 78b
#if defined(RAMPZ)
	pop r0
	out _SFR_IO_ADDR(RAMPZ),r0
#endif
	pop r30
	pop r31
	ldd r20,Y+1
	ldd r21,Y+2
	ldd r22,Y+3
	st Z,r20
	std Z+1,r21
	std Z+2,r22
	ldd r20,Y+4
	ldd r21,Y+5
	ldd r22,Y+6
	std Z+3,r20
	std Z+4,r21
	std Z+5,r22
	ldd r20,Y+7
	ldd r21,Y+8
	ldd r22,Y+9
	std Z+6,r20
	std Z+7,r21
	std Z+8,r22
	ldd r20,Y+10
	ldd r21,Y+11
	ldd r22,Y+12
	std Z+9,r20
	std Z+10,r21
	std Z+11,r22
	ldd r20,Y+13
	ldd r21,Y+14
	ldd r22,Y+15
	std Z+12,r20
	std Z+13,r21
	std Z+14,r22
	ldd r20,Y+16
	ldd r21,Y+17
	ldd r22,Y+18
	std Z+15,r20
	std Z+16,r21
	std Z+17,r22
	ldd r20,Y+19
	ldd r21,Y+20
	ldd r22,Y+21
	std Z+18,r20
	std Z+19,r21
	std Z+20,r22
	ldd r20,Y+22
	ldd r21,Y+23
	ldd r22,Y+24
	std Z+21,r20
	std Z+22,r21
	std Z+23,r22
	ldd r20,Y+25
	ldd r21,Y+26
	ldd r22,Y+27
	std Z+24,r20
	std Z+25,r21
	std Z+26,r22
	ldd r20,Y+28
	ldd r21,Y+29
	ldd r22,Y+30
	std Z+27,r20
	std Z+28,r21
	std Z+29,r22
	ldd r20,Y+31
	ldd r21,Y+32
	ldd r22,Y+33
	std Z+30,r20
	std Z+31,r21
	std Z+32,r22
	ldd r20,Y+34
	ldd r21,Y+35
	ldd r22,Y+36
	std Z+33,r20
	std Z+34,r21
	std Z+35,r22
	ldd r20,Y+37
	std Z+36,r20
	adiw r28,37
	in r0,0x3f
	cli
	out 0x3e,r29
	out 0x3f,r0
	out 0x3d,r28
	pop r17
	pop r16
	pop r15
	pop r14
	pop r13
	pop r12
	pop r11
	pop r10
	pop r9
	pop r8
	pop r7
	pop r6
	pop r5
	pop r4
	pop r3
	pop r2
	pop r29
	pop r28
	ret
	.size wage_permute, .-wage_permute

	.text
.global wage_absorb
	.type wage_absorb, @function
wage_absorb:
	movw r30,r24
	movw r26,r22
.L__stack_usage = 2
	ld r22,X+
	ld r21,X+
	ld r20,X+
	ld r19,X+
	mov r18,r1
	lsr r22
	ror r21
	ror r20
	ror r19
	ror r18
	ldd r0,Z+8
	eor r0,r22
	std Z+8,r0
	lsr r21
	ror r20
	ror r19
	ror r18
	ldd r0,Z+9
	eor r0,r21
	std Z+9,r0
	lsr r20
	ror r19
	ror r18
	ldd r0,Z+15
	eor r0,r20
	std Z+15,r0
	lsr r19
	ror r18
	ldd r0,Z+16
	eor r0,r19
	std Z+16,r0
	lsr r18
	ldd r0,Z+18
	eor r0,r18
	std Z+18,r0
	ld r22,X+
	ld r21,X+
	ld r20,X+
	ld r19,X+
	mov r23,r1
	mov r18,r1
	lsl r19
	rol r20
	rol r21
	rol r22
	rol r23
	lsl r19
	rol r20
	rol r21
	rol r22
	rol r23
	lsl r19
	rol r20
	rol r21
	rol r22
	rol r23
	ldd r0,Z+18
	eor r0,r23
	std Z+18,r0
	lsr r22
	ror r21
	ror r20
	ror r19
	ldd r0,Z+27
	eor r0,r22
	std Z+27,r0
	lsr r21
	ror r20
	ror r19
	ldd r0,Z+28
	eor r0,r21
	std Z+28,r0
	lsr r20
	ror r19
	ldd r0,Z+34
	eor r0,r20
	std Z+34,r0
	lsr r19
	ror r18
	ldd r0,Z+35
	eor r0,r19
	std Z+35,r0
	lsr r18
	ldd r0,Z+36
	eor r0,r18
	std Z+36,r0
	ret
	.size wage_absorb, .-wage_absorb

	.text
.global wage_get_rate
	.type wage_get_rate, @function
wage_get_rate:
	movw r30,r24
	movw r26,r22
.L__stack_usage = 2
	ldd r21,Z+8
	ldd r20,Z+9
	ldd r19,Z+15
	ldd r18,Z+16
	lsl r18
	lsl r18
	rol r19
	lsl r18
	rol r19
	rol r20
	lsl r18
	rol r19
	rol r20
	rol r21
	ldd r22,Z+18
	lsr r22
	lsr r22
	lsr r22
	or r18,r22
	st X+,r21
	st X+,r20
	st X+,r19
	st X+,r18
	ldd r21,Z+18
	ldd r20,Z+27
	ldd r19,Z+28
	ldd r18,Z+34
	lsl r18
	lsl r18
	rol r19
	lsl r18
	rol r19
	rol r20
	lsr r21
	ror r20
	ror r19
	ror r18
	lsr r21
	ror r20
	ror r19
	ror r18
	lsr r21
	ror r20
	ror r19
	ror r18
	st X+,r20
	st X+,r19
	st X+,r18
	ldd r19,Z+35
	ldd r18,Z+36
	lsl r18
	lsl r18
	rol r19
	st X+,r19
	ret
	.size wage_get_rate, .-wage_get_rate

	.text
.global wage_set_rate
	.type wage_set_rate, @function
wage_set_rate:
	movw r30,r24
	movw r26,r22
.L__stack_usage = 2
	ld r22,X+
	ld r21,X+
	ld r20,X+
	ld r19,X+
	mov r18,r1
	lsr r22
	ror r21
	ror r20
	ror r19
	ror r18
	std Z+8,r22
	lsr r21
	ror r20
	ror r19
	ror r18
	std Z+9,r21
	lsr r20
	ror r19
	ror r18
	std Z+15,r20
	lsr r19
	ror r18
	std Z+16,r19
	lsr r18
	std Z+18,r18
	ld r22,X+
	ld r21,X+
	ld r20,X+
	ld r19,X+
	mov r23,r1
	mov r18,r1
	lsl r19
	rol r20
	rol r21
	rol r22
	rol r23
	lsl r19
	rol r20
	rol r21
	rol r22
	rol r23
	lsl r19
	rol r20
	rol r21
	rol r22
	rol r23
	ldd r0,Z+18
	eor r0,r23
	std Z+18,r0
	lsr r22
	ror r21
	ror r20
	ror r19
	std Z+27,r22
	lsr r21
	ror r20
	ror r19
	std Z+28,r21
	lsr r20
	ror r19
	std Z+34,r20
	lsr r19
	ror r18
	std Z+35,r19
	lsr r18
	ldd r24,Z+36
	andi r24,63
	eor r24,r18
	std Z+36,r24
	ret
	.size wage_set_rate, .-wage_set_rate

#endif