#if defined(__AVR__) #include /* Automatically generated - do not edit */ .section .progmem.data,"a",@progbits .p2align 8 .type table_0, @object .size table_0, 40 table_0: .byte 1 .byte 3 .byte 7 .byte 15 .byte 31 .byte 62 .byte 61 .byte 59 .byte 55 .byte 47 .byte 30 .byte 60 .byte 57 .byte 51 .byte 39 .byte 14 .byte 29 .byte 58 .byte 53 .byte 43 .byte 22 .byte 44 .byte 24 .byte 48 .byte 33 .byte 2 .byte 5 .byte 11 .byte 23 .byte 46 .byte 28 .byte 56 .byte 49 .byte 35 .byte 6 .byte 13 .byte 27 .byte 54 .byte 45 .byte 26 .text .global gift128b_init .type gift128b_init, @function gift128b_init: movw r30,r24 movw r26,r22 .L__stack_usage = 2 ld r21,X+ ld r20,X+ ld r19,X+ ld r18,X+ st Z,r18 std Z+1,r19 std Z+2,r20 std Z+3,r21 ld r21,X+ ld r20,X+ ld r19,X+ ld r18,X+ std Z+4,r18 std Z+5,r19 std Z+6,r20 std Z+7,r21 ld r21,X+ ld r20,X+ ld r19,X+ ld r18,X+ std Z+8,r18 std Z+9,r19 std Z+10,r20 std Z+11,r21 ld r21,X+ ld r20,X+ ld r19,X+ ld r18,X+ std Z+12,r18 std Z+13,r19 std Z+14,r20 std Z+15,r21 ret .size gift128b_init, .-gift128b_init .text .global gift128b_encrypt .type gift128b_encrypt, @function gift128b_encrypt: push r28 push r29 push r2 push r3 push r4 push r5 push r6 push r7 push r8 push r9 push r10 push r11 push r12 push r13 push r14 push r15 push r16 push r17 push r23 push r22 movw r30,r24 movw r26,r20 in r28,0x3d in r29,0x3e sbiw r28,16 in r0,0x3f cli out 0x3e,r29 out 0x3f,r0 out 0x3d,r28 .L__stack_usage = 36 ld r3,X+ ld r2,X+ ld r23,X+ ld r22,X+ ld r7,X+ ld r6,X+ ld r5,X+ ld r4,X+ ld r11,X+ ld r10,X+ ld r9,X+ ld r8,X+ ld r15,X+ ld r14,X+ ld r13,X+ ld r12,X+ ld r26,Z ldd r27,Z+1 ldd r24,Z+2 ldd r25,Z+3 std Y+1,r26 std Y+2,r27 std Y+3,r24 std Y+4,r25 ldd r26,Z+4 ldd r27,Z+5 ldd r24,Z+6 ldd r25,Z+7 std Y+5,r26 std Y+6,r27 std Y+7,r24 std Y+8,r25 ldd r26,Z+8 ldd r27,Z+9 ldd r24,Z+10 ldd r25,Z+11 std Y+9,r26 std Y+10,r27 std Y+11,r24 std Y+12,r25 ldd r26,Z+12 ldd r27,Z+13 ldd r24,Z+14 ldd r25,Z+15 ldi r30,lo8(table_0) ldi r31,hi8(table_0) #if defined(RAMPZ) ldi r17,hh8(table_0) in r0,_SFR_IO_ADDR(RAMPZ) push r0 out _SFR_IO_ADDR(RAMPZ),r17 #endif mov r16,r1 46: rcall 199f ldd r0,Y+5 eor r8,r0 ldd r0,Y+6 eor r9,r0 ldd r0,Y+7 eor r10,r0 ldd r0,Y+8 eor r11,r0 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+13,r26 std Y+14,r27 std Y+15,r24 std Y+16,r25 ldd r26,Y+9 ldd r27,Y+10 ldd r24,Y+11 ldd r25,Y+12 rcall 199f ldd r0,Y+1 eor r8,r0 ldd r0,Y+2 eor r9,r0 ldd r0,Y+3 eor r10,r0 ldd r0,Y+4 eor r11,r0 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+9,r26 std Y+10,r27 std Y+11,r24 std Y+12,r25 ldd r26,Y+5 ldd r27,Y+6 ldd r24,Y+7 ldd r25,Y+8 rcall 199f ldd r0,Y+13 eor r8,r0 ldd r0,Y+14 eor r9,r0 ldd r0,Y+15 eor r10,r0 ldd r0,Y+16 eor r11,r0 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+5,r26 std Y+6,r27 std Y+7,r24 std Y+8,r25 ldd r26,Y+1 ldd r27,Y+2 ldd r24,Y+3 ldd r25,Y+4 rcall 199f ldd r0,Y+9 eor r8,r0 ldd r0,Y+10 eor r9,r0 ldd r0,Y+11 eor r10,r0 ldd r0,Y+12 eor r11,r0 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+1,r26 std Y+2,r27 std Y+3,r24 std Y+4,r25 ldd r26,Y+13 ldd r27,Y+14 ldd r24,Y+15 ldd r25,Y+16 ldi r17,40 cpse r16,r17 rjmp 46b rjmp 548f 199: mov r0,r22 and r0,r8 eor r4,r0 mov r0,r23 and r0,r9 eor r5,r0 mov r0,r2 and r0,r10 eor r6,r0 mov r0,r3 and r0,r11 eor r7,r0 mov r0,r4 and r0,r12 eor r22,r0 mov r0,r5 and r0,r13 eor r23,r0 mov r0,r6 and r0,r14 eor r2,r0 mov r0,r7 and r0,r15 eor r3,r0 mov r0,r22 or r0,r4 eor r8,r0 mov r0,r23 or r0,r5 eor r9,r0 mov r0,r2 or r0,r6 eor r10,r0 mov r0,r3 or r0,r7 eor r11,r0 eor r12,r8 eor r13,r9 eor r14,r10 eor r15,r11 eor r4,r12 eor r5,r13 eor r6,r14 eor r7,r15 com r12 com r13 com r14 com r15 movw r18,r22 movw r20,r2 mov r0,r4 and r0,r18 eor r8,r0 mov r0,r5 and r0,r19 eor r9,r0 mov r0,r6 and r0,r20 eor r10,r0 mov r0,r7 and r0,r21 eor r11,r0 movw r22,r12 movw r2,r14 movw r12,r18 movw r14,r20 bst r22,1 bld r0,0 bst r22,4 bld r22,1 bst r2,0 bld r22,4 bst r22,2 bld r2,0 bst r23,0 bld r22,2 bst r22,3 bld r23,0 bst r23,4 bld r22,3 bst r2,3 bld r23,4 bst r23,6 bld r2,3 bst r3,3 bld r23,6 bst r23,5 bld r3,3 bst r2,7 bld r23,5 bst r3,6 bld r2,7 bst r3,1 bld r3,6 bst r22,5 bld r3,1 bst r2,4 bld r22,5 bst r2,2 bld r2,4 bst r23,2 bld r2,2 bst r23,3 bld r23,2 bst r23,7 bld r23,3 bst r3,7 bld r23,7 bst r3,5 bld r3,7 bst r2,5 bld r3,5 bst r2,6 bld r2,5 bst r3,2 bld r2,6 bst r23,1 bld r3,2 bst r22,7 bld r23,1 bst r3,4 bld r22,7 bst r2,1 bld r3,4 bst r22,6 bld r2,1 bst r3,0 bld r22,6 bst r0,0 bld r3,0 bst r4,0 bld r0,0 bst r4,1 bld r4,0 bst r4,5 bld r4,1 bst r6,5 bld r4,5 bst r6,7 bld r6,5 bst r7,7 bld r6,7 bst r7,6 bld r7,7 bst r7,2 bld r7,6 bst r5,2 bld r7,2 bst r5,0 bld r5,2 bst r0,0 bld r5,0 bst r4,2 bld r0,0 bst r5,1 bld r4,2 bst r4,4 bld r5,1 bst r6,1 bld r4,4 bst r4,7 bld r6,1 bst r7,5 bld r4,7 bst r6,6 bld r7,5 bst r7,3 bld r6,6 bst r5,6 bld r7,3 bst r7,0 bld r5,6 bst r0,0 bld r7,0 bst r4,3 bld r0,0 bst r5,5 bld r4,3 bst r6,4 bld r5,5 bst r6,3 bld r6,4 bst r5,7 bld r6,3 bst r7,4 bld r5,7 bst r6,2 bld r7,4 bst r5,3 bld r6,2 bst r5,4 bld r5,3 bst r6,0 bld r5,4 bst r0,0 bld r6,0 bst r4,6 bld r0,0 bst r7,1 bld r4,6 bst r0,0 bld r7,1 bst r8,0 bld r0,0 bst r8,2 bld r8,0 bst r9,2 bld r8,2 bst r9,1 bld r9,2 bst r8,5 bld r9,1 bst r10,6 bld r8,5 bst r11,0 bld r10,6 bst r8,3 bld r11,0 bst r9,6 bld r8,3 bst r11,1 bld r9,6 bst r8,7 bld r11,1 bst r11,6 bld r8,7 bst r11,3 bld r11,6 bst r9,7 bld r11,3 bst r11,5 bld r9,7 bst r10,7 bld r11,5 bst r11,4 bld r10,7 bst r10,3 bld r11,4 bst r9,4 bld r10,3 bst r10,1 bld r9,4 bst r8,4 bld r10,1 bst r10,2 bld r8,4 bst r9,0 bld r10,2 bst r8,1 bld r9,0 bst r8,6 bld r8,1 bst r11,2 bld r8,6 bst r9,3 bld r11,2 bst r9,5 bld r9,3 bst r10,5 bld r9,5 bst r10,4 bld r10,5 bst r10,0 bld r10,4 bst r0,0 bld r10,0 bst r12,0 bld r0,0 bst r12,3 bld r12,0 bst r13,7 bld r12,3 bst r15,6 bld r13,7 bst r15,0 bld r15,6 bst r0,0 bld r15,0 bst r12,1 bld r0,0 bst r12,7 bld r12,1 bst r15,7 bld r12,7 bst r15,4 bld r15,7 bst r14,0 bld r15,4 bst r0,0 bld r14,0 bst r12,2 bld r0,0 bst r13,3 bld r12,2 bst r13,6 bld r13,3 bst r15,2 bld r13,6 bst r13,0 bld r15,2 bst r0,0 bld r13,0 bst r12,4 bld r0,0 bst r14,3 bld r12,4 bst r13,5 bld r14,3 bst r14,6 bld r13,5 bst r15,1 bld r14,6 bst r0,0 bld r15,1 bst r12,5 bld r0,0 bst r14,7 bld r12,5 bst r15,5 bld r14,7 bst r14,4 bld r15,5 bst r14,1 bld r14,4 bst r0,0 bld r14,1 bst r12,6 bld r0,0 bst r15,3 bld r12,6 bst r13,4 bld r15,3 bst r14,2 bld r13,4 bst r13,1 bld r14,2 bst r0,0 bld r13,1 eor r4,r26 eor r5,r27 eor r6,r24 eor r7,r25 ldi r18,128 eor r15,r18 mov r30,r16 #if defined(RAMPZ) elpm r18,Z #elif defined(__AVR_HAVE_LPMX__) lpm r18,Z #elif defined(__AVR_TINY__) ld r18,Z #else lpm mov r18,r0 #endif eor r12,r18 inc r16 ret 548: #if defined(RAMPZ) pop r0 out _SFR_IO_ADDR(RAMPZ),r0 #endif ldd r26,Y+17 ldd r27,Y+18 st X+,r3 st X+,r2 st X+,r23 st X+,r22 st X+,r7 st X+,r6 st X+,r5 st X+,r4 st X+,r11 st X+,r10 st X+,r9 st X+,r8 st X+,r15 st X+,r14 st X+,r13 st X+,r12 adiw r28,18 in r0,0x3f cli out 0x3e,r29 out 0x3f,r0 out 0x3d,r28 pop r17 pop r16 pop r15 pop r14 pop r13 pop r12 pop r11 pop r10 pop r9 pop r8 pop r7 pop r6 pop r5 pop r4 pop r3 pop r2 pop r29 pop r28 ret .size gift128b_encrypt, .-gift128b_encrypt .text .global gift128b_encrypt_preloaded .type gift128b_encrypt_preloaded, @function gift128b_encrypt_preloaded: push r28 push r29 push r2 push r3 push r4 push r5 push r6 push r7 push r8 push r9 push r10 push r11 push r12 push r13 push r14 push r15 push r16 push r17 push r23 push r22 movw r30,r24 movw r26,r20 in r28,0x3d in r29,0x3e sbiw r28,16 in r0,0x3f cli out 0x3e,r29 out 0x3f,r0 out 0x3d,r28 .L__stack_usage = 36 ld r22,X+ ld r23,X+ ld r2,X+ ld r3,X+ ld r4,X+ ld r5,X+ ld r6,X+ ld r7,X+ ld r8,X+ ld r9,X+ ld r10,X+ ld r11,X+ ld r12,X+ ld r13,X+ ld r14,X+ ld r15,X+ ld r26,Z ldd r27,Z+1 ldd r24,Z+2 ldd r25,Z+3 std Y+1,r26 std Y+2,r27 std Y+3,r24 std Y+4,r25 ldd r26,Z+4 ldd r27,Z+5 ldd r24,Z+6 ldd r25,Z+7 std Y+5,r26 std Y+6,r27 std Y+7,r24 std Y+8,r25 ldd r26,Z+8 ldd r27,Z+9 ldd r24,Z+10 ldd r25,Z+11 std Y+9,r26 std Y+10,r27 std Y+11,r24 std Y+12,r25 ldd r26,Z+12 ldd r27,Z+13 ldd r24,Z+14 ldd r25,Z+15 ldi r30,lo8(table_0) ldi r31,hi8(table_0) #if defined(RAMPZ) ldi r17,hh8(table_0) in r0,_SFR_IO_ADDR(RAMPZ) push r0 out _SFR_IO_ADDR(RAMPZ),r17 #endif mov r16,r1 46: rcall 199f ldd r0,Y+5 eor r8,r0 ldd r0,Y+6 eor r9,r0 ldd r0,Y+7 eor r10,r0 ldd r0,Y+8 eor r11,r0 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+13,r26 std Y+14,r27 std Y+15,r24 std Y+16,r25 ldd r26,Y+9 ldd r27,Y+10 ldd r24,Y+11 ldd r25,Y+12 rcall 199f ldd r0,Y+1 eor r8,r0 ldd r0,Y+2 eor r9,r0 ldd r0,Y+3 eor r10,r0 ldd r0,Y+4 eor r11,r0 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+9,r26 std Y+10,r27 std Y+11,r24 std Y+12,r25 ldd r26,Y+5 ldd r27,Y+6 ldd r24,Y+7 ldd r25,Y+8 rcall 199f ldd r0,Y+13 eor r8,r0 ldd r0,Y+14 eor r9,r0 ldd r0,Y+15 eor r10,r0 ldd r0,Y+16 eor r11,r0 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+5,r26 std Y+6,r27 std Y+7,r24 std Y+8,r25 ldd r26,Y+1 ldd r27,Y+2 ldd r24,Y+3 ldd r25,Y+4 rcall 199f ldd r0,Y+9 eor r8,r0 ldd r0,Y+10 eor r9,r0 ldd r0,Y+11 eor r10,r0 ldd r0,Y+12 eor r11,r0 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 lsl r26 rol r27 adc r26,r1 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+1,r26 std Y+2,r27 std Y+3,r24 std Y+4,r25 ldd r26,Y+13 ldd r27,Y+14 ldd r24,Y+15 ldd r25,Y+16 ldi r17,40 cpse r16,r17 rjmp 46b rjmp 548f 199: mov r0,r22 and r0,r8 eor r4,r0 mov r0,r23 and r0,r9 eor r5,r0 mov r0,r2 and r0,r10 eor r6,r0 mov r0,r3 and r0,r11 eor r7,r0 mov r0,r4 and r0,r12 eor r22,r0 mov r0,r5 and r0,r13 eor r23,r0 mov r0,r6 and r0,r14 eor r2,r0 mov r0,r7 and r0,r15 eor r3,r0 mov r0,r22 or r0,r4 eor r8,r0 mov r0,r23 or r0,r5 eor r9,r0 mov r0,r2 or r0,r6 eor r10,r0 mov r0,r3 or r0,r7 eor r11,r0 eor r12,r8 eor r13,r9 eor r14,r10 eor r15,r11 eor r4,r12 eor r5,r13 eor r6,r14 eor r7,r15 com r12 com r13 com r14 com r15 movw r18,r22 movw r20,r2 mov r0,r4 and r0,r18 eor r8,r0 mov r0,r5 and r0,r19 eor r9,r0 mov r0,r6 and r0,r20 eor r10,r0 mov r0,r7 and r0,r21 eor r11,r0 movw r22,r12 movw r2,r14 movw r12,r18 movw r14,r20 bst r22,1 bld r0,0 bst r22,4 bld r22,1 bst r2,0 bld r22,4 bst r22,2 bld r2,0 bst r23,0 bld r22,2 bst r22,3 bld r23,0 bst r23,4 bld r22,3 bst r2,3 bld r23,4 bst r23,6 bld r2,3 bst r3,3 bld r23,6 bst r23,5 bld r3,3 bst r2,7 bld r23,5 bst r3,6 bld r2,7 bst r3,1 bld r3,6 bst r22,5 bld r3,1 bst r2,4 bld r22,5 bst r2,2 bld r2,4 bst r23,2 bld r2,2 bst r23,3 bld r23,2 bst r23,7 bld r23,3 bst r3,7 bld r23,7 bst r3,5 bld r3,7 bst r2,5 bld r3,5 bst r2,6 bld r2,5 bst r3,2 bld r2,6 bst r23,1 bld r3,2 bst r22,7 bld r23,1 bst r3,4 bld r22,7 bst r2,1 bld r3,4 bst r22,6 bld r2,1 bst r3,0 bld r22,6 bst r0,0 bld r3,0 bst r4,0 bld r0,0 bst r4,1 bld r4,0 bst r4,5 bld r4,1 bst r6,5 bld r4,5 bst r6,7 bld r6,5 bst r7,7 bld r6,7 bst r7,6 bld r7,7 bst r7,2 bld r7,6 bst r5,2 bld r7,2 bst r5,0 bld r5,2 bst r0,0 bld r5,0 bst r4,2 bld r0,0 bst r5,1 bld r4,2 bst r4,4 bld r5,1 bst r6,1 bld r4,4 bst r4,7 bld r6,1 bst r7,5 bld r4,7 bst r6,6 bld r7,5 bst r7,3 bld r6,6 bst r5,6 bld r7,3 bst r7,0 bld r5,6 bst r0,0 bld r7,0 bst r4,3 bld r0,0 bst r5,5 bld r4,3 bst r6,4 bld r5,5 bst r6,3 bld r6,4 bst r5,7 bld r6,3 bst r7,4 bld r5,7 bst r6,2 bld r7,4 bst r5,3 bld r6,2 bst r5,4 bld r5,3 bst r6,0 bld r5,4 bst r0,0 bld r6,0 bst r4,6 bld r0,0 bst r7,1 bld r4,6 bst r0,0 bld r7,1 bst r8,0 bld r0,0 bst r8,2 bld r8,0 bst r9,2 bld r8,2 bst r9,1 bld r9,2 bst r8,5 bld r9,1 bst r10,6 bld r8,5 bst r11,0 bld r10,6 bst r8,3 bld r11,0 bst r9,6 bld r8,3 bst r11,1 bld r9,6 bst r8,7 bld r11,1 bst r11,6 bld r8,7 bst r11,3 bld r11,6 bst r9,7 bld r11,3 bst r11,5 bld r9,7 bst r10,7 bld r11,5 bst r11,4 bld r10,7 bst r10,3 bld r11,4 bst r9,4 bld r10,3 bst r10,1 bld r9,4 bst r8,4 bld r10,1 bst r10,2 bld r8,4 bst r9,0 bld r10,2 bst r8,1 bld r9,0 bst r8,6 bld r8,1 bst r11,2 bld r8,6 bst r9,3 bld r11,2 bst r9,5 bld r9,3 bst r10,5 bld r9,5 bst r10,4 bld r10,5 bst r10,0 bld r10,4 bst r0,0 bld r10,0 bst r12,0 bld r0,0 bst r12,3 bld r12,0 bst r13,7 bld r12,3 bst r15,6 bld r13,7 bst r15,0 bld r15,6 bst r0,0 bld r15,0 bst r12,1 bld r0,0 bst r12,7 bld r12,1 bst r15,7 bld r12,7 bst r15,4 bld r15,7 bst r14,0 bld r15,4 bst r0,0 bld r14,0 bst r12,2 bld r0,0 bst r13,3 bld r12,2 bst r13,6 bld r13,3 bst r15,2 bld r13,6 bst r13,0 bld r15,2 bst r0,0 bld r13,0 bst r12,4 bld r0,0 bst r14,3 bld r12,4 bst r13,5 bld r14,3 bst r14,6 bld r13,5 bst r15,1 bld r14,6 bst r0,0 bld r15,1 bst r12,5 bld r0,0 bst r14,7 bld r12,5 bst r15,5 bld r14,7 bst r14,4 bld r15,5 bst r14,1 bld r14,4 bst r0,0 bld r14,1 bst r12,6 bld r0,0 bst r15,3 bld r12,6 bst r13,4 bld r15,3 bst r14,2 bld r13,4 bst r13,1 bld r14,2 bst r0,0 bld r13,1 eor r4,r26 eor r5,r27 eor r6,r24 eor r7,r25 ldi r18,128 eor r15,r18 mov r30,r16 #if defined(RAMPZ) elpm r18,Z #elif defined(__AVR_HAVE_LPMX__) lpm r18,Z #elif defined(__AVR_TINY__) ld r18,Z #else lpm mov r18,r0 #endif eor r12,r18 inc r16 ret 548: #if defined(RAMPZ) pop r0 out _SFR_IO_ADDR(RAMPZ),r0 #endif ldd r26,Y+17 ldd r27,Y+18 st X+,r22 st X+,r23 st X+,r2 st X+,r3 st X+,r4 st X+,r5 st X+,r6 st X+,r7 st X+,r8 st X+,r9 st X+,r10 st X+,r11 st X+,r12 st X+,r13 st X+,r14 st X+,r15 adiw r28,18 in r0,0x3f cli out 0x3e,r29 out 0x3f,r0 out 0x3d,r28 pop r17 pop r16 pop r15 pop r14 pop r13 pop r12 pop r11 pop r10 pop r9 pop r8 pop r7 pop r6 pop r5 pop r4 pop r3 pop r2 pop r29 pop r28 ret .size gift128b_encrypt_preloaded, .-gift128b_encrypt_preloaded .text .global gift128b_decrypt .type gift128b_decrypt, @function gift128b_decrypt: push r28 push r29 push r2 push r3 push r4 push r5 push r6 push r7 push r8 push r9 push r10 push r11 push r12 push r13 push r14 push r15 push r16 push r23 push r22 movw r30,r24 movw r26,r20 in r28,0x3d in r29,0x3e sbiw r28,16 in r0,0x3f cli out 0x3e,r29 out 0x3f,r0 out 0x3d,r28 .L__stack_usage = 35 ld r3,X+ ld r2,X+ ld r23,X+ ld r22,X+ ld r7,X+ ld r6,X+ ld r5,X+ ld r4,X+ ld r11,X+ ld r10,X+ ld r9,X+ ld r8,X+ ld r15,X+ ld r14,X+ ld r13,X+ ld r12,X+ ld r26,Z ldd r27,Z+1 ldd r24,Z+2 ldd r25,Z+3 mov r0,r27 mov r27,r26 mov r26,r0 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+1,r26 std Y+2,r27 std Y+3,r24 std Y+4,r25 ldd r26,Z+4 ldd r27,Z+5 ldd r24,Z+6 ldd r25,Z+7 mov r0,r27 mov r27,r26 mov r26,r0 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+5,r26 std Y+6,r27 std Y+7,r24 std Y+8,r25 ldd r26,Z+8 ldd r27,Z+9 ldd r24,Z+10 ldd r25,Z+11 mov r0,r27 mov r27,r26 mov r26,r0 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 std Y+9,r26 std Y+10,r27 std Y+11,r24 std Y+12,r25 ldd r26,Z+12 ldd r27,Z+13 ldd r24,Z+14 ldd r25,Z+15 mov r0,r27 mov r27,r26 mov r26,r0 mov r0,r1 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 lsr r25 ror r24 ror r0 or r25,r0 ldi r30,lo8(table_0) ldi r31,hi8(table_0) #if defined(RAMPZ) ldi r17,hh8(table_0) in r0,_SFR_IO_ADDR(RAMPZ) push r0 out _SFR_IO_ADDR(RAMPZ),r17 #endif ldi r16,40 114: ldd r0,Y+9 eor r8,r0 ldd r0,Y+10 eor r9,r0 ldd r0,Y+11 eor r10,r0 ldd r0,Y+12 eor r11,r0 std Y+13,r26 std Y+14,r27 std Y+15,r24 std Y+16,r25 ldd r26,Y+1 ldd r27,Y+2 ldd r24,Y+3 ldd r25,Y+4 mov r0,r1 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 or r27,r0 lsl r24 rol r25 adc r24,r1 lsl r24 rol r25 adc r24,r1 rcall 266f ldd r0,Y+13 eor r8,r0 ldd r0,Y+14 eor r9,r0 ldd r0,Y+15 eor r10,r0 ldd r0,Y+16 eor r11,r0 std Y+1,r26 std Y+2,r27 std Y+3,r24 std Y+4,r25 ldd r26,Y+5 ldd r27,Y+6 ldd r24,Y+7 ldd r25,Y+8 mov r0,r1 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 or r27,r0 lsl r24 rol r25 adc r24,r1 lsl r24 rol r25 adc r24,r1 rcall 266f ldd r0,Y+1 eor r8,r0 ldd r0,Y+2 eor r9,r0 ldd r0,Y+3 eor r10,r0 ldd r0,Y+4 eor r11,r0 std Y+5,r26 std Y+6,r27 std Y+7,r24 std Y+8,r25 ldd r26,Y+9 ldd r27,Y+10 ldd r24,Y+11 ldd r25,Y+12 mov r0,r1 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 or r27,r0 lsl r24 rol r25 adc r24,r1 lsl r24 rol r25 adc r24,r1 rcall 266f ldd r0,Y+5 eor r8,r0 ldd r0,Y+6 eor r9,r0 ldd r0,Y+7 eor r10,r0 ldd r0,Y+8 eor r11,r0 std Y+9,r26 std Y+10,r27 std Y+11,r24 std Y+12,r25 ldd r26,Y+13 ldd r27,Y+14 ldd r24,Y+15 ldd r25,Y+16 mov r0,r1 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 lsr r27 ror r26 ror r0 or r27,r0 lsl r24 rol r25 adc r24,r1 lsl r24 rol r25 adc r24,r1 rcall 266f cpse r16,r1 rjmp 114b rjmp 611f 266: eor r4,r26 eor r5,r27 eor r6,r24 eor r7,r25 ldi r18,128 eor r15,r18 dec r16 mov r30,r16 #if defined(RAMPZ) elpm r18,Z #elif defined(__AVR_HAVE_LPMX__) lpm r18,Z #elif defined(__AVR_TINY__) ld r18,Z #else lpm mov r18,r0 #endif eor r12,r18 bst r22,1 bld r0,0 bst r3,0 bld r22,1 bst r22,6 bld r3,0 bst r2,1 bld r22,6 bst r3,4 bld r2,1 bst r22,7 bld r3,4 bst r23,1 bld r22,7 bst r3,2 bld r23,1 bst r2,6 bld r3,2 bst r2,5 bld r2,6 bst r3,5 bld r2,5 bst r3,7 bld r3,5 bst r23,7 bld r3,7 bst r23,3 bld r23,7 bst r23,2 bld r23,3 bst r2,2 bld r23,2 bst r2,4 bld r2,2 bst r22,5 bld r2,4 bst r3,1 bld r22,5 bst r3,6 bld r3,1 bst r2,7 bld r3,6 bst r23,5 bld r2,7 bst r3,3 bld r23,5 bst r23,6 bld r3,3 bst r2,3 bld r23,6 bst r23,4 bld r2,3 bst r22,3 bld r23,4 bst r23,0 bld r22,3 bst r22,2 bld r23,0 bst r2,0 bld r22,2 bst r22,4 bld r2,0 bst r0,0 bld r22,4 bst r4,0 bld r0,0 bst r5,0 bld r4,0 bst r5,2 bld r5,0 bst r7,2 bld r5,2 bst r7,6 bld r7,2 bst r7,7 bld r7,6 bst r6,7 bld r7,7 bst r6,5 bld r6,7 bst r4,5 bld r6,5 bst r4,1 bld r4,5 bst r0,0 bld r4,1 bst r4,2 bld r0,0 bst r7,0 bld r4,2 bst r5,6 bld r7,0 bst r7,3 bld r5,6 bst r6,6 bld r7,3 bst r7,5 bld r6,6 bst r4,7 bld r7,5 bst r6,1 bld r4,7 bst r4,4 bld r6,1 bst r5,1 bld r4,4 bst r0,0 bld r5,1 bst r4,3 bld r0,0 bst r6,0 bld r4,3 bst r5,4 bld r6,0 bst r5,3 bld r5,4 bst r6,2 bld r5,3 bst r7,4 bld r6,2 bst r5,7 bld r7,4 bst r6,3 bld r5,7 bst r6,4 bld r6,3 bst r5,5 bld r6,4 bst r0,0 bld r5,5 bst r4,6 bld r0,0 bst r7,1 bld r4,6 bst r0,0 bld r7,1 bst r8,0 bld r0,0 bst r10,0 bld r8,0 bst r10,4 bld r10,0 bst r10,5 bld r10,4 bst r9,5 bld r10,5 bst r9,3 bld r9,5 bst r11,2 bld r9,3 bst r8,6 bld r11,2 bst r8,1 bld r8,6 bst r9,0 bld r8,1 bst r10,2 bld r9,0 bst r8,4 bld r10,2 bst r10,1 bld r8,4 bst r9,4 bld r10,1 bst r10,3 bld r9,4 bst r11,4 bld r10,3 bst r10,7 bld r11,4 bst r11,5 bld r10,7 bst r9,7 bld r11,5 bst r11,3 bld r9,7 bst r11,6 bld r11,3 bst r8,7 bld r11,6 bst r11,1 bld r8,7 bst r9,6 bld r11,1 bst r8,3 bld r9,6 bst r11,0 bld r8,3 bst r10,6 bld r11,0 bst r8,5 bld r10,6 bst r9,1 bld r8,5 bst r9,2 bld r9,1 bst r8,2 bld r9,2 bst r0,0 bld r8,2 bst r12,0 bld r0,0 bst r15,0 bld r12,0 bst r15,6 bld r15,0 bst r13,7 bld r15,6 bst r12,3 bld r13,7 bst r0,0 bld r12,3 bst r12,1 bld r0,0 bst r14,0 bld r12,1 bst r15,4 bld r14,0 bst r15,7 bld r15,4 bst r12,7 bld r15,7 bst r0,0 bld r12,7 bst r12,2 bld r0,0 bst r13,0 bld r12,2 bst r15,2 bld r13,0 bst r13,6 bld r15,2 bst r13,3 bld r13,6 bst r0,0 bld r13,3 bst r12,4 bld r0,0 bst r15,1 bld r12,4 bst r14,6 bld r15,1 bst r13,5 bld r14,6 bst r14,3 bld r13,5 bst r0,0 bld r14,3 bst r12,5 bld r0,0 bst r14,1 bld r12,5 bst r14,4 bld r14,1 bst r15,5 bld r14,4 bst r14,7 bld r15,5 bst r0,0 bld r14,7 bst r12,6 bld r0,0 bst r13,1 bld r12,6 bst r14,2 bld r13,1 bst r13,4 bld r14,2 bst r15,3 bld r13,4 bst r0,0 bld r15,3 movw r18,r12 movw r20,r14 movw r12,r22 movw r14,r2 movw r22,r18 movw r2,r20 and r18,r4 and r19,r5 and r20,r6 and r21,r7 eor r8,r18 eor r9,r19 eor r10,r20 eor r11,r21 com r12 com r13 com r14 com r15 eor r4,r12 eor r5,r13 eor r6,r14 eor r7,r15 eor r12,r8 eor r13,r9 eor r14,r10 eor r15,r11 mov r0,r22 or r0,r4 eor r8,r0 mov r0,r23 or r0,r5 eor r9,r0 mov r0,r2 or r0,r6 eor r10,r0 mov r0,r3 or r0,r7 eor r11,r0 mov r0,r4 and r0,r12 eor r22,r0 mov r0,r5 and r0,r13 eor r23,r0 mov r0,r6 and r0,r14 eor r2,r0 mov r0,r7 and r0,r15 eor r3,r0 mov r0,r22 and r0,r8 eor r4,r0 mov r0,r23 and r0,r9 eor r5,r0 mov r0,r2 and r0,r10 eor r6,r0 mov r0,r3 and r0,r11 eor r7,r0 ret 611: #if defined(RAMPZ) pop r0 out _SFR_IO_ADDR(RAMPZ),r0 #endif ldd r26,Y+17 ldd r27,Y+18 st X+,r3 st X+,r2 st X+,r23 st X+,r22 st X+,r7 st X+,r6 st X+,r5 st X+,r4 st X+,r11 st X+,r10 st X+,r9 st X+,r8 st X+,r15 st X+,r14 st X+,r13 st X+,r12 adiw r28,18 in r0,0x3f cli out 0x3e,r29 out 0x3f,r0 out 0x3d,r28 pop r16 pop r15 pop r14 pop r13 pop r12 pop r11 pop r10 pop r9 pop r8 pop r7 pop r6 pop r5 pop r4 pop r3 pop r2 pop r29 pop r28 ret .size gift128b_decrypt, .-gift128b_decrypt #endif