#if defined(__AVR__) #include /* Automatically generated - do not edit */ .text .global simp_256_permute .type simp_256_permute, @function simp_256_permute: push r28 push r29 push r2 push r3 push r4 push r5 push r6 push r7 push r8 push r9 push r10 push r11 push r12 push r13 push r14 push r15 push r16 push r17 movw r30,r24 .L__stack_usage = 18 ldi r23,245 mov r10,r23 ldi r17,14 mov r11,r17 ldi r16,44 mov r12,r16 ldi r23,25 mov r13,r23 ldi r23,133 mov r14,r23 ldi r23,248 mov r15,r23 ldi r24,105 ldi r25,51 14: ldi r23,17 16: ldd r29,Z+16 ldd r28,Z+17 ldd r27,Z+18 ldd r26,Z+19 ldd r21,Z+20 ldd r20,Z+21 ldd r19,Z+22 ldd r18,Z+23 mov r2,r29 mov r3,r18 mov r4,r19 mov r5,r20 mov r6,r21 mov r7,r26 mov r8,r27 mov r9,r28 lsl r18 rol r19 rol r20 rol r21 rol r26 rol r27 rol r28 rol r29 adc r18,r1 and r2,r18 and r3,r19 and r4,r20 and r5,r21 and r6,r26 and r7,r27 and r8,r28 and r9,r29 lsl r18 rol r19 rol r20 rol r21 rol r26 rol r27 rol r28 rol r29 adc r18,r1 eor r2,r18 eor r3,r19 eor r4,r20 eor r5,r21 eor r6,r26 eor r7,r27 eor r8,r28 eor r9,r29 ldd r0,Z+8 eor r9,r0 ldd r0,Z+9 eor r8,r0 ldd r0,Z+10 eor r7,r0 ldd r0,Z+11 eor r6,r0 ldd r0,Z+12 eor r5,r0 ldd r0,Z+13 eor r4,r0 ldd r0,Z+14 eor r3,r0 ldd r0,Z+15 eor r2,r0 ldd r0,Z+24 eor r0,r9 std Z+24,r0 ldd r0,Z+25 eor r0,r8 std Z+25,r0 ldd r0,Z+26 eor r0,r7 std Z+26,r0 ldd r0,Z+27 eor r0,r6 std Z+27,r0 ldd r0,Z+28 eor r0,r5 std Z+28,r0 ldd r0,Z+29 eor r0,r4 std Z+29,r0 ldd r0,Z+30 eor r0,r3 std Z+30,r0 ldd r0,Z+31 eor r0,r2 std Z+31,r0 ld r29,Z ldd r28,Z+1 ldd r27,Z+2 ldd r26,Z+3 ldd r21,Z+4 ldd r20,Z+5 ldd r19,Z+6 ldd r18,Z+7 mov r0,r1 lsr r29 ror r28 ror r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 lsr r29 ror r28 ror r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 lsr r29 ror r28 ror r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 or r29,r0 movw r2,r18 movw r4,r20 movw r6,r26 movw r8,r28 bst r2,0 lsr r9 ror r8 ror r7 ror r6 ror r5 ror r4 ror r3 ror r2 bld r9,7 eor r18,r2 eor r19,r3 eor r20,r4 eor r21,r5 eor r26,r6 eor r27,r7 eor r28,r8 eor r29,r9 ldi r17,252 eor r18,r17 com r19 com r20 com r21 com r26 com r27 com r28 com r29 mov r0,r1 bst r10,0 lsr r25 ror r24 ror r15 ror r14 ror r13 ror r12 ror r11 ror r10 bld r25,5 bld r0,0 eor r18,r0 ldd r0,Z+8 eor r0,r29 std Z+8,r0 ldd r0,Z+9 eor r0,r28 std Z+9,r0 ldd r0,Z+10 eor r0,r27 std Z+10,r0 ldd r0,Z+11 eor r0,r26 std Z+11,r0 ldd r0,Z+12 eor r0,r21 std Z+12,r0 ldd r0,Z+13 eor r0,r20 std Z+13,r0 ldd r0,Z+14 eor r0,r19 std Z+14,r0 ldd r0,Z+15 eor r0,r18 std Z+15,r0 ldd r9,Z+24 ldd r8,Z+25 ldd r7,Z+26 ldd r6,Z+27 ldd r5,Z+28 ldd r4,Z+29 ldd r3,Z+30 ldd r2,Z+31 mov r18,r9 mov r19,r2 mov r20,r3 mov r21,r4 mov r26,r5 mov r27,r6 mov r28,r7 mov r29,r8 lsl r2 rol r3 rol r4 rol r5 rol r6 rol r7 rol r8 rol r9 adc r2,r1 and r18,r2 and r19,r3 and r20,r4 and r21,r5 and r26,r6 and r27,r7 and r28,r8 and r29,r9 lsl r2 rol r3 rol r4 rol r5 rol r6 rol r7 rol r8 rol r9 adc r2,r1 eor r18,r2 eor r19,r3 eor r20,r4 eor r21,r5 eor r26,r6 eor r27,r7 eor r28,r8 eor r29,r9 ld r0,Z eor r29,r0 ldd r0,Z+1 eor r28,r0 ldd r0,Z+2 eor r27,r0 ldd r0,Z+3 eor r26,r0 ldd r0,Z+4 eor r21,r0 ldd r0,Z+5 eor r20,r0 ldd r0,Z+6 eor r19,r0 ldd r0,Z+7 eor r18,r0 ldd r0,Z+16 eor r0,r29 std Z+16,r0 ldd r0,Z+17 eor r0,r28 std Z+17,r0 ldd r0,Z+18 eor r0,r27 std Z+18,r0 ldd r0,Z+19 eor r0,r26 std Z+19,r0 ldd r0,Z+20 eor r0,r21 std Z+20,r0 ldd r0,Z+21 eor r0,r20 std Z+21,r0 ldd r0,Z+22 eor r0,r19 std Z+22,r0 ldd r0,Z+23 eor r0,r18 std Z+23,r0 ldd r29,Z+8 ldd r28,Z+9 ldd r27,Z+10 ldd r26,Z+11 ldd r21,Z+12 ldd r20,Z+13 ldd r19,Z+14 ldd r18,Z+15 mov r0,r1 lsr r29 ror r28 ror r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 lsr r29 ror r28 ror r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 lsr r29 ror r28 ror r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 or r29,r0 movw r2,r18 movw r4,r20 movw r6,r26 movw r8,r28 bst r18,0 lsr r29 ror r28 ror r27 ror r26 ror r21 ror r20 ror r19 ror r18 bld r29,7 eor r2,r18 eor r3,r19 eor r4,r20 eor r5,r21 eor r6,r26 eor r7,r27 eor r8,r28 eor r9,r29 eor r2,r17 com r3 com r4 com r5 com r6 com r7 com r8 com r9 mov r0,r1 bst r10,0 lsr r25 ror r24 ror r15 ror r14 ror r13 ror r12 ror r11 ror r10 bld r25,5 bld r0,0 eor r2,r0 ld r0,Z eor r0,r9 st Z,r0 ldd r0,Z+1 eor r0,r8 std Z+1,r0 ldd r0,Z+2 eor r0,r7 std Z+2,r0 ldd r0,Z+3 eor r0,r6 std Z+3,r0 ldd r0,Z+4 eor r0,r5 std Z+4,r0 ldd r0,Z+5 eor r0,r4 std Z+5,r0 ldd r0,Z+6 eor r0,r3 std Z+6,r0 ldd r0,Z+7 eor r0,r2 std Z+7,r0 dec r23 breq 5407f rjmp 16b 5407: dec r22 brne 5409f rjmp 475f 5409: ld r18,Z ldd r19,Z+1 ldd r20,Z+2 ldd r21,Z+3 ldd r26,Z+4 ldd r27,Z+5 ldd r28,Z+6 ldd r29,Z+7 ldd r2,Z+16 ldd r3,Z+17 ldd r4,Z+18 ldd r5,Z+19 ldd r6,Z+20 ldd r7,Z+21 ldd r8,Z+22 ldd r9,Z+23 st Z,r2 std Z+1,r3 std Z+2,r4 std Z+3,r5 std Z+4,r6 std Z+5,r7 std Z+6,r8 std Z+7,r9 std Z+16,r18 std Z+17,r19 std Z+18,r20 std Z+19,r21 std Z+20,r26 std Z+21,r27 std Z+22,r28 std Z+23,r29 ldd r18,Z+8 ldd r19,Z+9 ldd r20,Z+10 ldd r21,Z+11 ldd r26,Z+12 ldd r27,Z+13 ldd r28,Z+14 ldd r29,Z+15 ldd r2,Z+24 ldd r3,Z+25 ldd r4,Z+26 ldd r5,Z+27 ldd r6,Z+28 ldd r7,Z+29 ldd r8,Z+30 ldd r9,Z+31 std Z+8,r2 std Z+9,r3 std Z+10,r4 std Z+11,r5 std Z+12,r6 std Z+13,r7 std Z+14,r8 std Z+15,r9 std Z+24,r18 std Z+25,r19 std Z+26,r20 std Z+27,r21 std Z+28,r26 std Z+29,r27 std Z+30,r28 std Z+31,r29 rjmp 14b 475: pop r17 pop r16 pop r15 pop r14 pop r13 pop r12 pop r11 pop r10 pop r9 pop r8 pop r7 pop r6 pop r5 pop r4 pop r3 pop r2 pop r29 pop r28 ret .size simp_256_permute, .-simp_256_permute .text .global simp_192_permute .type simp_192_permute, @function simp_192_permute: push r2 push r3 push r4 push r5 push r6 push r7 push r8 push r9 push r10 push r11 push r12 push r13 push r14 push r15 push r16 push r17 movw r30,r24 .L__stack_usage = 18 ldi r25,245 mov r8,r25 ldi r24,14 mov r9,r24 ldi r23,44 mov r10,r23 ldi r17,25 mov r11,r17 ldi r16,133 mov r12,r16 ldi r23,248 mov r13,r23 ldi r23,105 mov r14,r23 ldi r23,51 mov r15,r23 16: ldi r23,13 18: ldd r27,Z+12 ldd r26,Z+13 ldd r21,Z+14 ldd r20,Z+15 ldd r19,Z+16 ldd r18,Z+17 mov r2,r27 mov r3,r18 mov r4,r19 mov r5,r20 mov r6,r21 mov r7,r26 lsl r18 rol r19 rol r20 rol r21 rol r26 rol r27 adc r18,r1 and r2,r18 and r3,r19 and r4,r20 and r5,r21 and r6,r26 and r7,r27 lsl r18 rol r19 rol r20 rol r21 rol r26 rol r27 adc r18,r1 eor r2,r18 eor r3,r19 eor r4,r20 eor r5,r21 eor r6,r26 eor r7,r27 ldd r0,Z+6 eor r7,r0 ldd r0,Z+7 eor r6,r0 ldd r0,Z+8 eor r5,r0 ldd r0,Z+9 eor r4,r0 ldd r0,Z+10 eor r3,r0 ldd r0,Z+11 eor r2,r0 ldd r0,Z+18 eor r0,r7 std Z+18,r0 ldd r0,Z+19 eor r0,r6 std Z+19,r0 ldd r0,Z+20 eor r0,r5 std Z+20,r0 ldd r0,Z+21 eor r0,r4 std Z+21,r0 ldd r0,Z+22 eor r0,r3 std Z+22,r0 ldd r0,Z+23 eor r0,r2 std Z+23,r0 ld r27,Z ldd r26,Z+1 ldd r21,Z+2 ldd r20,Z+3 ldd r19,Z+4 ldd r18,Z+5 mov r0,r1 lsr r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 lsr r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 lsr r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 or r27,r0 movw r2,r18 movw r4,r20 movw r6,r26 bst r2,0 lsr r7 ror r6 ror r5 ror r4 ror r3 ror r2 bld r7,7 eor r18,r2 eor r19,r3 eor r20,r4 eor r21,r5 eor r26,r6 eor r27,r7 ldi r25,252 eor r18,r25 com r19 com r20 com r21 com r26 com r27 mov r0,r1 bst r8,0 lsr r15 ror r14 ror r13 ror r12 ror r11 ror r10 ror r9 ror r8 bld r15,5 bld r0,0 eor r18,r0 ldd r0,Z+6 eor r0,r27 std Z+6,r0 ldd r0,Z+7 eor r0,r26 std Z+7,r0 ldd r0,Z+8 eor r0,r21 std Z+8,r0 ldd r0,Z+9 eor r0,r20 std Z+9,r0 ldd r0,Z+10 eor r0,r19 std Z+10,r0 ldd r0,Z+11 eor r0,r18 std Z+11,r0 ldd r7,Z+18 ldd r6,Z+19 ldd r5,Z+20 ldd r4,Z+21 ldd r3,Z+22 ldd r2,Z+23 mov r18,r7 mov r19,r2 mov r20,r3 mov r21,r4 mov r26,r5 mov r27,r6 lsl r2 rol r3 rol r4 rol r5 rol r6 rol r7 adc r2,r1 and r18,r2 and r19,r3 and r20,r4 and r21,r5 and r26,r6 and r27,r7 lsl r2 rol r3 rol r4 rol r5 rol r6 rol r7 adc r2,r1 eor r18,r2 eor r19,r3 eor r20,r4 eor r21,r5 eor r26,r6 eor r27,r7 ld r0,Z eor r27,r0 ldd r0,Z+1 eor r26,r0 ldd r0,Z+2 eor r21,r0 ldd r0,Z+3 eor r20,r0 ldd r0,Z+4 eor r19,r0 ldd r0,Z+5 eor r18,r0 ldd r0,Z+12 eor r0,r27 std Z+12,r0 ldd r0,Z+13 eor r0,r26 std Z+13,r0 ldd r0,Z+14 eor r0,r21 std Z+14,r0 ldd r0,Z+15 eor r0,r20 std Z+15,r0 ldd r0,Z+16 eor r0,r19 std Z+16,r0 ldd r0,Z+17 eor r0,r18 std Z+17,r0 ldd r27,Z+6 ldd r26,Z+7 ldd r21,Z+8 ldd r20,Z+9 ldd r19,Z+10 ldd r18,Z+11 mov r0,r1 lsr r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 lsr r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 lsr r27 ror r26 ror r21 ror r20 ror r19 ror r18 ror r0 or r27,r0 movw r2,r18 movw r4,r20 movw r6,r26 bst r18,0 lsr r27 ror r26 ror r21 ror r20 ror r19 ror r18 bld r27,7 eor r2,r18 eor r3,r19 eor r4,r20 eor r5,r21 eor r6,r26 eor r7,r27 eor r2,r25 com r3 com r4 com r5 com r6 com r7 mov r0,r1 bst r8,0 lsr r15 ror r14 ror r13 ror r12 ror r11 ror r10 ror r9 ror r8 bld r15,5 bld r0,0 eor r2,r0 ld r0,Z eor r0,r7 st Z,r0 ldd r0,Z+1 eor r0,r6 std Z+1,r0 ldd r0,Z+2 eor r0,r5 std Z+2,r0 ldd r0,Z+3 eor r0,r4 std Z+3,r0 ldd r0,Z+4 eor r0,r3 std Z+4,r0 ldd r0,Z+5 eor r0,r2 std Z+5,r0 dec r23 breq 5323f rjmp 18b 5323: dec r22 breq 375f ld r18,Z ldd r19,Z+1 ldd r20,Z+2 ldd r21,Z+3 ldd r26,Z+4 ldd r27,Z+5 ldd r2,Z+12 ldd r3,Z+13 ldd r4,Z+14 ldd r5,Z+15 ldd r6,Z+16 ldd r7,Z+17 st Z,r2 std Z+1,r3 std Z+2,r4 std Z+3,r5 std Z+4,r6 std Z+5,r7 std Z+12,r18 std Z+13,r19 std Z+14,r20 std Z+15,r21 std Z+16,r26 std Z+17,r27 ldd r18,Z+6 ldd r19,Z+7 ldd r20,Z+8 ldd r21,Z+9 ldd r26,Z+10 ldd r27,Z+11 ldd r2,Z+18 ldd r3,Z+19 ldd r4,Z+20 ldd r5,Z+21 ldd r6,Z+22 ldd r7,Z+23 std Z+6,r2 std Z+7,r3 std Z+8,r4 std Z+9,r5 std Z+10,r6 std Z+11,r7 std Z+18,r18 std Z+19,r19 std Z+20,r20 std Z+21,r21 std Z+22,r26 std Z+23,r27 rjmp 16b 375: pop r17 pop r16 pop r15 pop r14 pop r13 pop r12 pop r11 pop r10 pop r9 pop r8 pop r7 pop r6 pop r5 pop r4 pop r3 pop r2 ret .size simp_192_permute, .-simp_192_permute #endif