#if defined(__AVR__) #include /* Automatically generated - do not edit */ .text .global speck64_128_encrypt .type speck64_128_encrypt, @function speck64_128_encrypt: push r28 push r29 push r2 push r3 push r4 push r5 push r6 push r7 push r8 push r9 push r10 push r11 push r12 push r13 push r14 push r15 push r16 push r17 push r23 push r22 movw r30,r24 movw r26,r20 in r28,0x3d in r29,0x3e .L__stack_usage = 20 ld r18,Z ldd r19,Z+1 ldd r20,Z+2 ldd r21,Z+3 ldd r22,Z+4 ldd r23,Z+5 ldd r2,Z+6 ldd r3,Z+7 ldd r4,Z+8 ldd r5,Z+9 ldd r6,Z+10 ldd r7,Z+11 ldd r8,Z+12 ldd r9,Z+13 ldd r10,Z+14 ldd r11,Z+15 ld r14,X+ ld r15,X+ ld r24,X+ ld r25,X+ ld r30,X+ ld r31,X+ ld r12,X+ ld r13,X+ mov r16,r1 25: add r31,r14 adc r12,r15 adc r13,r24 adc r30,r25 eor r31,r18 eor r12,r19 eor r13,r20 eor r30,r21 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 eor r14,r31 eor r15,r12 eor r24,r13 eor r25,r30 mov r0,r22 mov r22,r23 add r22,r18 mov r23,r2 adc r23,r19 mov r2,r3 adc r2,r20 mov r3,r0 adc r3,r21 eor r22,r16 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 eor r18,r22 eor r19,r23 eor r20,r2 eor r21,r3 inc r16 add r12,r14 adc r13,r15 adc r30,r24 adc r31,r25 eor r12,r18 eor r13,r19 eor r30,r20 eor r31,r21 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 eor r14,r12 eor r15,r13 eor r24,r30 eor r25,r31 mov r0,r4 mov r4,r5 add r4,r18 mov r5,r6 adc r5,r19 mov r6,r7 adc r6,r20 mov r7,r0 adc r7,r21 eor r4,r16 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 eor r18,r4 eor r19,r5 eor r20,r6 eor r21,r7 inc r16 add r13,r14 adc r30,r15 adc r31,r24 adc r12,r25 eor r13,r18 eor r30,r19 eor r31,r20 eor r12,r21 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 lsl r14 rol r15 rol r24 rol r25 adc r14,r1 eor r14,r13 eor r15,r30 eor r24,r31 eor r25,r12 mov r0,r12 mov r12,r31 mov r31,r30 mov r30,r13 mov r13,r0 mov r0,r8 mov r8,r9 add r8,r18 mov r9,r10 adc r9,r19 mov r10,r11 adc r10,r20 mov r11,r0 adc r11,r21 eor r8,r16 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 lsl r18 rol r19 rol r20 rol r21 adc r18,r1 eor r18,r8 eor r19,r9 eor r20,r10 eor r21,r11 inc r16 ldi r17,27 cpse r16,r17 rjmp 25b ldd r26,Y+1 ldd r27,Y+2 st X+,r14 st X+,r15 st X+,r24 st X+,r25 st X+,r30 st X+,r31 st X+,r12 st X+,r13 pop r0 pop r0 pop r17 pop r16 pop r15 pop r14 pop r13 pop r12 pop r11 pop r10 pop r9 pop r8 pop r7 pop r6 pop r5 pop r4 pop r3 pop r2 pop r29 pop r28 ret .size speck64_128_encrypt, .-speck64_128_encrypt #endif