# Generated by Yosys 0.8 (git sha1 UNKNOWN, clang 3.8.0-2ubuntu4 -fPIC -Os) .model toplevel .inputs io_J3 io_H16 io_G15 io_F15 io_B10 .outputs io_G16 io_B12 io_led[0] io_led[1] io_led[2] io_led[3] io_led[4] io_led[5] io_led[6] io_led[7] .names $false .names $true 1 .names $undef .gate SB_LUT4 I0=murax.system_cpu._zz_99_[14] I1=murax.system_cpu._zz_116_ I2=murax.system_cpu._zz_99_[6] I3=murax.system_cpu._zz_99_[4] O=$abc$159056$n1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010000000001100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[7] I1=murax.system_cpu._zz_99_[8] I2=$abc$159056$n3198 I3=$false O=$abc$159056$n3 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[9] I1=murax.system_cpu._zz_99_[10] I2=murax.system_cpu._zz_99_[11] I3=$false O=$abc$159056$n3198 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I1=$abc$159056$n100 I2=$false I3=$false O=$abc$159056$n7 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[0] I3=$false O=$abc$159056$n100 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n3202_1 I1=$abc$159056$n3213 I2=$false I3=$false O=$abc$159056$n12 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[144] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3202_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=$abc$159056$n3212 I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3204 O=$abc$159056$n3203 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n3205_1 I1=$abc$159056$n3209 I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I3=$false O=$abc$159056$n3204 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3206 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid I3=murax.system_apbBridge.state O=$abc$159056$n3205_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=$abc$159056$n3207_1 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] I2=$false I3=$false O=$abc$159056$n3206 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] I2=$abc$159056$n3208 I3=$false O=$abc$159056$n3207_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] O=$abc$159056$n3208 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=$abc$159056$n3210 I1=$abc$159056$n3211 I2=$false I3=$false O=$abc$159056$n3209 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] O=$abc$159056$n3210 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] O=$abc$159056$n3211 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[0] I1=murax.system_drygascon128.core.cnt[1] I2=$false I3=$false O=$abc$159056$n3212 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3214 I2=$abc$159056$n3227 I3=$abc$159056$n3240 O=$abc$159056$n3213 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3221 I1=$abc$159056$n3224 I2=$abc$159056$n3215 I3=$abc$159056$n3218 O=$abc$159056$n3214 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3216 I1=$abc$159056$n3217 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[147] O=$abc$159056$n3215 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[115] I1=murax.system_drygascon128.core.x[51] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3216 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[83] I1=murax.system_drygascon128.core.x[19] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3217 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3219 I1=$abc$159056$n3220 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[83] O=$abc$159056$n3218 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[115] I1=murax.system_drygascon128.core.x[51] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3219 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[83] I1=murax.system_drygascon128.core.x[19] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3220 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3222 I1=$abc$159056$n3223 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[211] O=$abc$159056$n3221 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[115] I1=murax.system_drygascon128.core.x[51] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3222 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[83] I1=murax.system_drygascon128.core.x[19] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3223 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3225 I1=$abc$159056$n3226 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[275] O=$abc$159056$n3224 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[115] I1=murax.system_drygascon128.core.x[51] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3225 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[83] I1=murax.system_drygascon128.core.x[19] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3226 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3234 I1=$abc$159056$n3237 I2=$abc$159056$n3228 I3=$abc$159056$n3231 O=$abc$159056$n3227 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3229 I1=$abc$159056$n3230 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[144] O=$abc$159056$n3228 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[112] I1=murax.system_drygascon128.core.x[48] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3229 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[80] I1=murax.system_drygascon128.core.x[16] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3230 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3232 I1=$abc$159056$n3233 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[80] O=$abc$159056$n3231 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[112] I1=murax.system_drygascon128.core.x[48] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3232 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[80] I1=murax.system_drygascon128.core.x[16] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3233 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3235 I1=$abc$159056$n3236 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[208] O=$abc$159056$n3234 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[112] I1=murax.system_drygascon128.core.x[48] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3235 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[80] I1=murax.system_drygascon128.core.x[16] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3236 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3238 I1=$abc$159056$n3239 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[272] O=$abc$159056$n3237 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[112] I1=murax.system_drygascon128.core.x[48] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3238 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[80] I1=murax.system_drygascon128.core.x[16] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3239 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[240] I1=murax.system_drygascon128.core.c[304] I2=murax.system_drygascon128.core.c[112] I3=murax.system_drygascon128.core.c[176] O=$abc$159056$n3240 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[1] I1=murax.system_drygascon128.core.state[2] I2=$false I3=$false O=$abc$159056$n3241 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n3243 I1=$abc$159056$n3241 I2=$abc$159056$n3244 I3=$abc$159056$n3262 O=$abc$159056$n15 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[129] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3243 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[225] I1=murax.system_drygascon128.core.c[289] I2=$abc$159056$n3245 I3=$abc$159056$n3261 O=$abc$159056$n3244 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n3255 I1=$abc$159056$n3258 I2=$abc$159056$n3246 I3=$false O=$abc$159056$n3245 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n7687 I1=$abc$159056$n3252 I2=$false I3=$false O=$abc$159056$n3246 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[132] I1=murax.system_drygascon128.core.u_gascon5_round.round_constant[4] I2=$false I3=$false O=$abc$159056$n3251 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3253 I1=$abc$159056$n3254 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[68] O=$abc$159056$n3252 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[100] I1=murax.system_drygascon128.core.x[36] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3253 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[68] I1=murax.system_drygascon128.core.x[4] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3254 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3256 I1=$abc$159056$n3257 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[196] O=$abc$159056$n3255 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[100] I1=murax.system_drygascon128.core.x[36] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3256 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[68] I1=murax.system_drygascon128.core.x[4] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3257 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3259 I1=$abc$159056$n3260 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[260] O=$abc$159056$n3258 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[100] I1=murax.system_drygascon128.core.x[36] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3259 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[68] I1=murax.system_drygascon128.core.x[4] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3260 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[97] I1=murax.system_drygascon128.core.c[161] I2=$false I3=$false O=$abc$159056$n3261 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3270 I1=$abc$159056$n3273 I2=$abc$159056$n7690 I3=$abc$159056$n3267 O=$abc$159056$n3262 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n3268 I1=$abc$159056$n3269 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[65] O=$abc$159056$n3267 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[97] I1=murax.system_drygascon128.core.x[33] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3268 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[65] I1=murax.system_drygascon128.core.x[1] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3269 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3271 I1=$abc$159056$n3272 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[193] O=$abc$159056$n3270 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[97] I1=murax.system_drygascon128.core.x[33] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3271 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[65] I1=murax.system_drygascon128.core.x[1] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3272 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3274 I1=$abc$159056$n3275 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[257] O=$abc$159056$n3273 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[97] I1=murax.system_drygascon128.core.x[33] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3274 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[65] I1=murax.system_drygascon128.core.x[1] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3275 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3277 I1=$abc$159056$n3281 I2=$false I3=$false O=$abc$159056$n30 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[91] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3277 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3204 I1=$abc$159056$n3279 I2=$abc$159056$n3280 I3=$false O=$abc$159056$n3278 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[0] I1=murax.system_drygascon128.core.cnt[1] I2=$false I3=$false O=$abc$159056$n3279 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.cnt[3] I2=$false I3=$false O=$abc$159056$n3280 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3282 I2=$abc$159056$n3299 I3=$abc$159056$n3316 O=$abc$159056$n3281 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3290 I1=$abc$159056$n3293_1 I2=$abc$159056$n3283 I3=$abc$159056$n3296 O=$abc$159056$n3282 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111100011100001 .gate SB_LUT4 I0=$abc$159056$n3284 I1=$abc$159056$n3287 I2=$false I3=$false O=$abc$159056$n3283 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3285 I1=$abc$159056$n3286 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[27] O=$abc$159056$n3284 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[59] I1=murax.system_drygascon128.core.x[123] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3285 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[27] I1=murax.system_drygascon128.core.x[91] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3286 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3288 I1=$abc$159056$n3289 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[283] O=$abc$159056$n3287 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[123] I1=murax.system_drygascon128.core.x[59] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3288 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[91] I1=murax.system_drygascon128.core.x[27] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3289 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3291 I1=$abc$159056$n3292 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[219] O=$abc$159056$n3290 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[123] I1=murax.system_drygascon128.core.x[59] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3291 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[91] I1=murax.system_drygascon128.core.x[27] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3292 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3294 I1=$abc$159056$n3295 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[91] O=$abc$159056$n3293_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[123] I1=murax.system_drygascon128.core.x[59] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3294 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[91] I1=murax.system_drygascon128.core.x[27] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3295 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3297 I1=$abc$159056$n3298 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[155] O=$abc$159056$n3296 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[123] I1=murax.system_drygascon128.core.x[59] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3297 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[91] I1=murax.system_drygascon128.core.x[27] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3298 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3307 I1=$abc$159056$n3310 I2=$abc$159056$n3300 I3=$abc$159056$n3313 O=$abc$159056$n3299 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111100011100001 .gate SB_LUT4 I0=$abc$159056$n3301 I1=$abc$159056$n3304 I2=$false I3=$false O=$abc$159056$n3300 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3302 I1=$abc$159056$n3303 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[14] O=$abc$159056$n3301 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[46] I1=murax.system_drygascon128.core.x[110] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3302 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[14] I1=murax.system_drygascon128.core.x[78] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3303 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3305 I1=$abc$159056$n3306 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[270] O=$abc$159056$n3304 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[110] I1=murax.system_drygascon128.core.x[46] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3305 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[78] I1=murax.system_drygascon128.core.x[14] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3306 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3308 I1=$abc$159056$n3309 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[206] O=$abc$159056$n3307 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[110] I1=murax.system_drygascon128.core.x[46] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3308 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[78] I1=murax.system_drygascon128.core.x[14] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3309 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3311 I1=$abc$159056$n3312 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[78] O=$abc$159056$n3310 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[110] I1=murax.system_drygascon128.core.x[46] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3311 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[78] I1=murax.system_drygascon128.core.x[14] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3312 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3314 I1=$abc$159056$n3315 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[142] O=$abc$159056$n3313 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[110] I1=murax.system_drygascon128.core.x[46] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3314 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[78] I1=murax.system_drygascon128.core.x[14] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3315 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[121] I1=murax.system_drygascon128.core.c[185] I2=murax.system_drygascon128.core.c[249] I3=$abc$159056$n3317 O=$abc$159056$n3316 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[57] I1=murax.system_drygascon128.core.c[313] I2=$false I3=$false O=$abc$159056$n3317 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3319 I1=$abc$159056$n3320 I2=$false I3=$false O=$abc$159056$n45 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[92] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3319 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3321 I2=$abc$159056$n3338 I3=$abc$159056$n3355 O=$abc$159056$n3320 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3329 I1=$abc$159056$n3332 I2=$abc$159056$n3335 I3=$abc$159056$n3322 O=$abc$159056$n3321 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n3323 I1=$abc$159056$n3326 I2=$false I3=$false O=$abc$159056$n3322 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3324 I1=$abc$159056$n3325 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[15] O=$abc$159056$n3323 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[47] I1=murax.system_drygascon128.core.x[111] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3324 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[15] I1=murax.system_drygascon128.core.x[79] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3325 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3327 I1=$abc$159056$n3328 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[271] O=$abc$159056$n3326 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[111] I1=murax.system_drygascon128.core.x[47] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3327 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[79] I1=murax.system_drygascon128.core.x[15] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3328 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3330 I1=$abc$159056$n3331 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[207] O=$abc$159056$n3329 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[111] I1=murax.system_drygascon128.core.x[47] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3330 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[79] I1=murax.system_drygascon128.core.x[15] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3331 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3333 I1=$abc$159056$n3334 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[143] O=$abc$159056$n3332 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[111] I1=murax.system_drygascon128.core.x[47] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3333 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[79] I1=murax.system_drygascon128.core.x[15] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3334 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3336 I1=$abc$159056$n3337_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[79] O=$abc$159056$n3335 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[111] I1=murax.system_drygascon128.core.x[47] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3336 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[79] I1=murax.system_drygascon128.core.x[15] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3337_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3346 I1=$abc$159056$n3349 I2=$abc$159056$n3339 I3=$abc$159056$n3352 O=$abc$159056$n3338 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111100011100001 .gate SB_LUT4 I0=$abc$159056$n3340_1 I1=$abc$159056$n3343_1 I2=$false I3=$false O=$abc$159056$n3339 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3341 I1=$abc$159056$n3342 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[28] O=$abc$159056$n3340_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[60] I1=murax.system_drygascon128.core.x[124] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3341 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[28] I1=murax.system_drygascon128.core.x[92] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3342 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3344 I1=$abc$159056$n3345 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[284] O=$abc$159056$n3343_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[124] I1=murax.system_drygascon128.core.x[60] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3344 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[92] I1=murax.system_drygascon128.core.x[28] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3345 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3347 I1=$abc$159056$n3348 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[220] O=$abc$159056$n3346 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[124] I1=murax.system_drygascon128.core.x[60] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3347 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[92] I1=murax.system_drygascon128.core.x[28] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3348 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3350 I1=$abc$159056$n3351 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[156] O=$abc$159056$n3349 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[124] I1=murax.system_drygascon128.core.x[60] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3350 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[92] I1=murax.system_drygascon128.core.x[28] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3351 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3353 I1=$abc$159056$n3354 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[92] O=$abc$159056$n3352 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[124] I1=murax.system_drygascon128.core.x[60] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3353 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[92] I1=murax.system_drygascon128.core.x[28] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3354 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[122] I1=murax.system_drygascon128.core.c[186] I2=murax.system_drygascon128.core.c[250] I3=$abc$159056$n3356 O=$abc$159056$n3355 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[58] I1=murax.system_drygascon128.core.c[314] I2=$false I3=$false O=$abc$159056$n3356 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3358 I1=$abc$159056$n3359 I2=$false I3=$false O=$abc$159056$n48 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[93] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3358 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3360 I2=$abc$159056$n3377 I3=$abc$159056$n3382 O=$abc$159056$n3359 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3362 I1=$abc$159056$n3365 I2=$abc$159056$n3374 I3=$abc$159056$n3361 O=$abc$159056$n3360 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3365 I1=$abc$159056$n3362 I2=$abc$159056$n3368 I3=$abc$159056$n3371 O=$abc$159056$n3361 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3363 I1=$abc$159056$n3364 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[157] O=$abc$159056$n3362 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[125] I1=murax.system_drygascon128.core.x[61] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3363 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[93] I1=murax.system_drygascon128.core.x[29] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3364 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3366 I1=$abc$159056$n3367 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[93] O=$abc$159056$n3365 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[125] I1=murax.system_drygascon128.core.x[61] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3366 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[93] I1=murax.system_drygascon128.core.x[29] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3367 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3369 I1=$abc$159056$n3370 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[29] O=$abc$159056$n3368 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[61] I1=murax.system_drygascon128.core.x[125] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3369 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[29] I1=murax.system_drygascon128.core.x[93] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3370 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3372 I1=$abc$159056$n3373 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[285] O=$abc$159056$n3371 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[125] I1=murax.system_drygascon128.core.x[61] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3372 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[93] I1=murax.system_drygascon128.core.x[29] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3373 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3375 I1=$abc$159056$n3376 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[221] O=$abc$159056$n3374 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[125] I1=murax.system_drygascon128.core.x[61] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3375 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[93] I1=murax.system_drygascon128.core.x[29] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3376 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3228 I1=$abc$159056$n3231 I2=$abc$159056$n3234 I3=$abc$159056$n3378 O=$abc$159056$n3377 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3231 I1=$abc$159056$n3228 I2=$abc$159056$n3237 I3=$abc$159056$n3379 O=$abc$159056$n3378 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3380 I1=$abc$159056$n3381 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[16] O=$abc$159056$n3379 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[48] I1=murax.system_drygascon128.core.x[112] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3380 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[16] I1=murax.system_drygascon128.core.x[80] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3381 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[123] I1=murax.system_drygascon128.core.c[187] I2=murax.system_drygascon128.core.c[251] I3=$abc$159056$n3383 O=$abc$159056$n3382 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[59] I1=murax.system_drygascon128.core.c[315] I2=$false I3=$false O=$abc$159056$n3383 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[0] I1=murax.system_drygascon128.core.cnt[1] I2=$false I3=$false O=$abc$159056$n64 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3386 I1=$abc$159056$n55 I2=$abc$159056$n4822 I3=$false O=$abc$159056$n67 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11100001 .gate SB_LUT4 I0=$abc$159056$n3387 I1=$abc$159056$n64 I2=$abc$159056$n9971 I3=$false O=$abc$159056$n3386 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001101 .gate SB_LUT4 I0=$abc$159056$n4817 I1=$abc$159056$n4822 I2=$abc$159056$n55 I3=$abc$159056$n59 O=$abc$159056$n3387 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=$abc$159056$n3389 I1=murax.resetCtrl_systemClkResetCounter[0] I2=murax.resetCtrl_systemClkResetCounter[1] I3=$false O=murax._zz_14_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01111111 .gate SB_LUT4 I0=murax.resetCtrl_systemClkResetCounter[2] I1=murax.resetCtrl_systemClkResetCounter[3] I2=murax.resetCtrl_systemClkResetCounter[4] I3=murax.resetCtrl_systemClkResetCounter[5] O=$abc$159056$n3389 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax._zz_14_ I1=murax.resetCtrl_systemClkResetCounter[0] I2=$false I3=$false O=$abc$159056$n81 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax._zz_2_ I1=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid I2=$false I3=$false O=$abc$159056$n84 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[0] O=$abc$159056$n88 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I2=$abc$159056$n3394 I3=murax.jtagBridge_1_.jtag_tap_fsm_state[1] O=$abc$159056$n91 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n3395 I1=murax.jtagBridge_1_.jtag_tap_instruction[1] I2=$false I3=$false O=$abc$159056$n3394 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_instruction[2] I1=murax.jtagBridge_1_.jtag_tap_instruction[3] I2=murax.jtagBridge_1_.jtag_tap_instruction[0] I3=$false O=$abc$159056$n3395 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n7 I1=$abc$159056$n3397 I2=$false I3=$false O=$abc$159056$n94 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_instruction[1] I1=$abc$159056$n3395 I2=$abc$159056$n88 I3=$false O=$abc$159056$n3397 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_headerLoaded I1=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid I2=$false I3=$false O=$abc$159056$n102 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid I1=murax.systemDebugger_1_.dispatcher_headerLoaded I2=$false I3=$false O=$abc$159056$n106 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3401 I1=$abc$159056$n3404 I2=$false I3=$false O=$abc$159056$n112 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[3] I1=$abc$159056$n3402 I2=$abc$159056$n3403 I3=$false O=$abc$159056$n3401 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[0] I1=murax.system_cpu.decode_to_execute_SRC2[1] I2=murax.system_cpu.decode_to_execute_SRC2[2] I3=murax.system_cpu.decode_to_execute_SRC2[4] O=$abc$159056$n3402 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SHIFT_CTRL[0] I1=murax.system_cpu.decode_to_execute_SHIFT_CTRL[1] I2=murax.system_cpu.execute_arbitration_isValid I3=$false O=$abc$159056$n3403 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11100000 .gate SB_LUT4 I0=$abc$159056$n3406 I1=murax.system_mainBusArbiter.rspTarget I2=$abc$159056$n3407 I3=$abc$159056$n3405 O=$abc$159056$n3404 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000001001111 .gate SB_LUT4 I0=murax.system_cpu.execute_arbitration_isValid I1=murax.system_cpu.decode_to_execute_DO_EBREAK I2=$false I3=$false O=$abc$159056$n3405 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_mainBusDecoder_logic_rspNoHit I1=murax.system_mainBusDecoder_logic_rspPending I2=murax.system_ram._zz_1_ I3=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_valid O=$abc$159056$n3406 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000111 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_INSTRUCTION[5] I1=murax.system_cpu.memory_arbitration_isValid I2=murax.system_cpu.execute_to_memory_MEMORY_ENABLE I3=$false O=$abc$159056$n3407 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_cpu.execute_arbitration_isValid I1=$abc$159056$n3413 I2=$abc$159056$n3409 I3=murax.system_cpu.IBusSimplePlugin_injector_nextPcCalc_valids_2 O=murax.system_cpu.CsrPlugin_interruptJump .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n3410 I1=murax.system_cpu.DebugPlugin_haltIt I2=murax.system_cpu.DebugPlugin_stepIt I3=murax.system_cpu.CsrPlugin_mstatus_MIE O=$abc$159056$n3409 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mie_MTIE I1=murax.system_cpu.CsrPlugin_mip_MTIP I2=murax.system_cpu._zz_110_ I3=$abc$159056$n5472 O=$abc$159056$n3410 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mip_MSIP I1=murax.system_cpu.CsrPlugin_mie_MSIE I2=$false I3=$false O=$abc$159056$n5472 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0111 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mip_MEIP I1=murax.system_cpu.CsrPlugin_mie_MEIE I2=$false I3=$false O=murax.system_cpu._zz_110_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu.writeBack_arbitration_isValid I1=murax.system_cpu.memory_arbitration_isValid I2=$false I3=$false O=$abc$159056$n3413 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.CsrPlugin_privilege[0] I2=murax.system_cpu.CsrPlugin_privilege[1] I3=$false O=$abc$159056$n115 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3474 I1=$abc$159056$n3416 I2=$false I3=$false O=$abc$159056$n118 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3417 I1=$abc$159056$n3439 I2=$abc$159056$n3473 I3=$abc$159056$n3463_1 O=$abc$159056$n3416 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[4] I1=murax.system_cpu._zz_99_[6] I2=$abc$159056$n7694_1 I3=$abc$159056$n3438 O=$abc$159056$n3417 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=$abc$159056$n3420 I1=$abc$159056$n3421 I2=$abc$159056$n3422 I3=$abc$159056$n3423 O=$abc$159056$n3419 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[20] I1=murax.system_cpu.execute_to_memory_INSTRUCTION[7] I2=$false I3=$false O=$abc$159056$n3420 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_INSTRUCTION[10] I1=murax.system_cpu._zz_99_[23] I2=murax.system_cpu._zz_99_[21] I3=murax.system_cpu.execute_to_memory_INSTRUCTION[8] O=$abc$159056$n3421 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000000001011 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[24] I1=murax.system_cpu.execute_to_memory_INSTRUCTION[11] I2=murax.system_cpu.memory_arbitration_isValid I3=murax.system_cpu.execute_to_memory_REGFILE_WRITE_VALID O=$abc$159056$n3422 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[23] I1=murax.system_cpu.execute_to_memory_INSTRUCTION[10] I2=murax.system_cpu._zz_99_[22] I3=murax.system_cpu.execute_to_memory_INSTRUCTION[9] O=$abc$159056$n3423 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000000001011 .gate SB_LUT4 I0=$abc$159056$n3425 I1=$abc$159056$n3426 I2=$abc$159056$n3427 I3=$false O=$abc$159056$n3424 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[21] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] I2=murax.system_cpu._zz_99_[23] I3=murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] O=$abc$159056$n3425 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[20] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_VALID I3=murax.system_cpu.writeBack_arbitration_isValid O=$abc$159056$n3426 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[22] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] I2=murax.system_cpu._zz_99_[24] I3=murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] O=$abc$159056$n3427 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3429 I1=$abc$159056$n3430 I2=$abc$159056$n3431 I3=$abc$159056$n3432 O=$abc$159056$n3428 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[23] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[10] I2=murax.system_cpu._zz_99_[21] I3=murax.system_cpu.decode_to_execute_INSTRUCTION[8] O=$abc$159056$n3429 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000000001011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[10] I1=murax.system_cpu._zz_99_[23] I2=murax.system_cpu._zz_99_[24] I3=murax.system_cpu.decode_to_execute_INSTRUCTION[11] O=$abc$159056$n3430 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000000001011 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[20] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[7] I2=murax.system_cpu.decode_to_execute_REGFILE_WRITE_VALID I3=murax.system_cpu.execute_arbitration_isValid O=$abc$159056$n3431 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[22] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[9] I2=$false I3=$false O=$abc$159056$n3432 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[24] I1=murax.system_cpu._zz_138_[4] I2=murax.system_cpu._zz_137_ I3=$false O=$abc$159056$n3435 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10010000 .gate SB_LUT4 I0=murax.system_cpu._zz_116_ I1=murax.system_cpu._zz_99_[5] I2=$false I3=$false O=$abc$159056$n3438 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu._zz_117_ I1=$abc$159056$n3459 I2=$abc$159056$n7698 I3=$abc$159056$n3409 O=$abc$159056$n3439 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000011110100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[19] I1=murax.system_cpu._zz_138_[4] I2=murax.system_cpu._zz_137_ I3=$false O=$abc$159056$n3443 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10010000 .gate SB_LUT4 I0=$abc$159056$n3447 I1=$abc$159056$n3448 I2=$abc$159056$n3449 I3=$false O=$abc$159056$n3446 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[16] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] I2=murax.system_cpu._zz_99_[18] I3=murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] O=$abc$159056$n3447 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[15] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_VALID I3=murax.system_cpu.writeBack_arbitration_isValid O=$abc$159056$n3448 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[17] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] I2=murax.system_cpu._zz_99_[19] I3=murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] O=$abc$159056$n3449 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3451 I1=$abc$159056$n3452 I2=$abc$159056$n3453 I3=$false O=$abc$159056$n3450 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[15] I1=murax.system_cpu.execute_to_memory_INSTRUCTION[7] I2=murax.system_cpu.execute_to_memory_REGFILE_WRITE_VALID I3=murax.system_cpu.memory_arbitration_isValid O=$abc$159056$n3451 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[16] I1=murax.system_cpu.execute_to_memory_INSTRUCTION[8] I2=murax.system_cpu._zz_99_[18] I3=murax.system_cpu.execute_to_memory_INSTRUCTION[10] O=$abc$159056$n3452 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[17] I1=murax.system_cpu.execute_to_memory_INSTRUCTION[9] I2=murax.system_cpu._zz_99_[19] I3=murax.system_cpu.execute_to_memory_INSTRUCTION[11] O=$abc$159056$n3453 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3455 I1=$abc$159056$n3456 I2=$abc$159056$n3457_1 I3=$abc$159056$n3458 O=$abc$159056$n3454_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[9] I1=murax.system_cpu._zz_99_[17] I2=murax.system_cpu._zz_99_[18] I3=murax.system_cpu.decode_to_execute_INSTRUCTION[10] O=$abc$159056$n3455 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000000001011 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[19] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[11] I2=murax.system_cpu.decode_to_execute_REGFILE_WRITE_VALID I3=murax.system_cpu.execute_arbitration_isValid O=$abc$159056$n3456 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[17] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[9] I2=murax.system_cpu._zz_99_[15] I3=murax.system_cpu.decode_to_execute_INSTRUCTION[7] O=$abc$159056$n3457_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000000001011 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[16] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[8] I2=$false I3=$false O=$abc$159056$n3458 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3460_1 I1=murax.system_cpu._zz_99_[6] I2=murax.system_cpu._zz_116_ I3=$abc$159056$n3461 O=$abc$159056$n3459 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000011110100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[14] I1=murax.system_cpu._zz_217_ I2=$false I3=$false O=$abc$159056$n3460_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[4] I1=murax.system_cpu._zz_99_[3] I2=$false I3=$false O=$abc$159056$n3461 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu._zz_116_ I1=murax.system_cpu._zz_99_[14] I2=murax.system_cpu._zz_99_[13] I3=$false O=murax.system_cpu._zz_117_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n10665 I1=$abc$159056$n3472_1 I2=$false I3=$false O=$abc$159056$n3463_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3465 I1=$abc$159056$n3401 I2=$abc$159056$n3404 I3=$abc$159056$n3470 O=$abc$159056$n10665 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000000000000 .gate SB_LUT4 I0=murax.system_cpu.execute_LightShifterPlugin_amplitude[3] I1=murax.system_cpu.execute_LightShifterPlugin_amplitude[2] I2=murax.system_cpu.execute_LightShifterPlugin_amplitude[1] I3=murax.system_cpu.execute_LightShifterPlugin_amplitude[4] O=$abc$159056$n3465 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[3] I1=murax.system_cpu.decode_to_execute_SRC2[3] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=murax.system_cpu.execute_LightShifterPlugin_amplitude[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[2] I1=murax.system_cpu.decode_to_execute_SRC2[2] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=murax.system_cpu.execute_LightShifterPlugin_amplitude[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[1] I1=murax.system_cpu.decode_to_execute_SRC2[1] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=murax.system_cpu.execute_LightShifterPlugin_amplitude[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[4] I1=murax.system_cpu.decode_to_execute_SRC2[4] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=murax.system_cpu.execute_LightShifterPlugin_amplitude[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_ready I1=murax.system_cpu.execute_arbitration_isValid I2=murax.system_cpu.decode_to_execute_MEMORY_ENABLE I3=$abc$159056$n3471 O=$abc$159056$n3470 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000010111111 .gate SB_LUT4 I0=murax.system_cpu.memory_arbitration_isValid I1=murax.system_cpu.writeBack_arbitration_isValid I2=murax.system_cpu.execute_arbitration_isValid I3=murax.system_cpu.decode_to_execute_IS_CSR O=$abc$159056$n3471 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110000000000000 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_ENV_CTRL I1=murax.system_cpu.memory_arbitration_isValid I2=murax.system_cpu.execute_arbitration_isValid I3=murax.system_cpu.decode_to_execute_ENV_CTRL O=$abc$159056$n3472_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_injector_decodeRemoved I1=murax.system_cpu._zz_96_ I2=murax.system_cpu._zz_150_[2] I3=murax.system_cpu._zz_150_[1] O=$abc$159056$n3473 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000010111011 .gate SB_LUT4 I0=murax.system_cpu._zz_150_[0] I1=murax.system_cpu._zz_150_[2] I2=murax.system_cpu._zz_150_[1] I3=$false O=$abc$159056$n3474 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n3416 I1=$abc$159056$n3476 I2=$false I3=$false O=$abc$159056$n120 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_150_[0] I1=murax.system_cpu._zz_150_[2] I2=murax.system_cpu._zz_150_[1] I3=$false O=$abc$159056$n3476 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n3405 I1=murax.system_cpu.writeBack_arbitration_isValid I2=$false I3=$false O=$abc$159056$n123 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=$abc$159056$n3479 I1=$abc$159056$n3481_1 I2=$false I3=$false O=$abc$159056$n128 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3206 I1=$abc$159056$n3480 I2=$false I3=$false O=$abc$159056$n3479 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid I3=murax.system_apbBridge.state O=$abc$159056$n3480 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n3211 I1=$abc$159056$n3482 I2=$false I3=$false O=$abc$159056$n3481_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] O=$abc$159056$n3482 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=$abc$159056$n3479 I1=$abc$159056$n3484_1 I2=$false I3=$false O=$abc$159056$n131 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3211 I1=$abc$159056$n3485 I2=$false I3=$false O=$abc$159056$n3484_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] O=$abc$159056$n3485 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=$abc$159056$n3479 I1=$abc$159056$n3487_1 I2=$false I3=$false O=$abc$159056$n135 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3210 I1=$abc$159056$n3488 I2=$false I3=$false O=$abc$159056$n3487_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] O=$abc$159056$n3488 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] I1=$abc$159056$n3211 I2=$abc$159056$n3480 I3=$abc$159056$n3207_1 O=$abc$159056$n141 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=murax.resetCtrl_systemReset I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.state[1] I3=$false O=$abc$159056$n144 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11111110 .gate SB_LUT4 I0=$abc$159056$n164 I1=$abc$159056$n3241 I2=murax.resetCtrl_systemReset I3=$false O=$abc$159056$n147 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001011 .gate SB_LUT4 I0=murax.resetCtrl_systemReset I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.state[3] I3=$false O=$abc$159056$n164 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=murax.system_drygascon128.core.state[0] I2=murax.resetCtrl_systemReset I3=$false O=$abc$159056$n151 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001110 .gate SB_LUT4 I0=murax.resetCtrl_systemReset I1=$abc$159056$n3495 I2=murax.system_drygascon128.core.state[0] I3=$false O=$abc$159056$n156 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n3205_1 I1=$abc$159056$n3496_1 I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I3=$false O=$abc$159056$n3495 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3497 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] I2=$false I3=$false O=$abc$159056$n3496_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] I2=$abc$159056$n3210 I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] O=$abc$159056$n3497 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=$abc$159056$n144 I1=murax.system_drygascon128.core.state[2] I2=$false I3=$false O=$abc$159056$n160 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.resetCtrl_systemReset I1=$abc$159056$n160 I2=$false I3=$false O=$abc$159056$n161 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3501 I1=murax.system_timer.timerBBridge_clearsEnable I2=$abc$159056$n3528 I3=$false O=murax.system_timer._zz_10_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n3502_1 I1=murax.system_timer.timerB._zz_1_ I2=murax.system_timer.timerB.inhibitFull I3=$false O=$abc$159056$n3501 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_timer.timerBBridge_ticksEnable[1] I1=$abc$159056$n7702 I2=murax.system_timer.timerBBridge_ticksEnable[0] I3=$false O=$abc$159056$n3502_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=$abc$159056$n3505_1 I1=$abc$159056$n3507 I2=$abc$159056$n3508_1 I3=$abc$159056$n3509 O=$abc$159056$n3504 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[14] I1=murax.system_timer._zz_1_[14] I2=$abc$159056$n3506 I3=$false O=$abc$159056$n3505_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10010000 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[7] I1=murax.system_timer._zz_1_[7] I2=murax.system_timer.prescaler_1_.counter[13] I3=murax.system_timer._zz_1_[13] O=$abc$159056$n3506 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[3] I1=murax.system_timer._zz_1_[3] I2=murax.system_timer.prescaler_1_.counter[6] I3=murax.system_timer._zz_1_[6] O=$abc$159056$n3507 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[4] I1=murax.system_timer._zz_1_[4] I2=murax.system_timer.prescaler_1_.counter[12] I3=murax.system_timer._zz_1_[12] O=$abc$159056$n3508_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[0] I1=murax.system_timer._zz_1_[0] I2=murax.system_timer.prescaler_1_.counter[10] I3=murax.system_timer._zz_1_[10] O=$abc$159056$n3509 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[8] I1=murax.system_timer._zz_1_[8] I2=murax.system_timer.prescaler_1_.counter[9] I3=murax.system_timer._zz_1_[9] O=$abc$159056$n3513 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3518 I1=$abc$159056$n3520_1 I2=$abc$159056$n3521 I3=$abc$159056$n3522 O=$abc$159056$n3517_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[14] I1=murax.system_timer.timerB_io_limit__driver[14] I2=$abc$159056$n3519 I3=$false O=$abc$159056$n3518 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10010000 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[7] I1=murax.system_timer.timerB_io_limit__driver[7] I2=murax.system_timer.timerB.counter[13] I3=murax.system_timer.timerB_io_limit__driver[13] O=$abc$159056$n3519 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[3] I1=murax.system_timer.timerB_io_limit__driver[3] I2=murax.system_timer.timerB.counter[6] I3=murax.system_timer.timerB_io_limit__driver[6] O=$abc$159056$n3520_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[4] I1=murax.system_timer.timerB_io_limit__driver[4] I2=murax.system_timer.timerB.counter[12] I3=murax.system_timer.timerB_io_limit__driver[12] O=$abc$159056$n3521 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[0] I1=murax.system_timer.timerB_io_limit__driver[0] I2=murax.system_timer.timerB.counter[10] I3=murax.system_timer.timerB_io_limit__driver[10] O=$abc$159056$n3522 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[8] I1=murax.system_timer.timerB_io_limit__driver[8] I2=murax.system_timer.timerB.counter[9] I3=murax.system_timer.timerB_io_limit__driver[9] O=$abc$159056$n3526_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3481_1 I1=$abc$159056$n3529_1 I2=$abc$159056$n3479 I3=$false O=$abc$159056$n3528 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00011111 .gate SB_LUT4 I0=$abc$159056$n3482 I1=$abc$159056$n3530 I2=$false I3=$false O=$abc$159056$n3529_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] O=$abc$159056$n3530 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_timer._zz_10_ I1=$abc$159056$n3502_1 I2=$false I3=$false O=$abc$159056$n167 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n3533 I1=murax.system_timer.timerABridge_clearsEnable I2=$abc$159056$n3549 I3=$false O=murax.system_timer._zz_8_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n3534 I1=murax.system_timer.timerA._zz_1_ I2=murax.system_timer.timerA.inhibitFull I3=$false O=$abc$159056$n3533 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_timer.timerABridge_ticksEnable[1] I1=$abc$159056$n7702 I2=murax.system_timer.timerABridge_ticksEnable[0] I3=$false O=$abc$159056$n3534 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[15] I1=murax.system_timer.timerA_io_limit__driver[15] I2=$false I3=$false O=$abc$159056$n3538_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[8] I1=murax.system_timer.timerA_io_limit__driver[8] I2=murax.system_timer.timerA.counter[9] I3=murax.system_timer.timerA_io_limit__driver[9] O=$abc$159056$n3541_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3543 I1=$abc$159056$n3544_1 I2=$false I3=$false O=$abc$159056$n3542 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[3] I1=murax.system_timer.timerA_io_limit__driver[3] I2=murax.system_timer.timerA.counter[6] I3=murax.system_timer.timerA_io_limit__driver[6] O=$abc$159056$n3543 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[4] I1=murax.system_timer.timerA_io_limit__driver[4] I2=murax.system_timer.timerA.counter[12] I3=murax.system_timer.timerA_io_limit__driver[12] O=$abc$159056$n3544_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3546 I1=$abc$159056$n3547_1 I2=$false I3=$false O=$abc$159056$n3545 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[7] I1=murax.system_timer.timerA_io_limit__driver[7] I2=murax.system_timer.timerA.counter[13] I3=murax.system_timer.timerA_io_limit__driver[13] O=$abc$159056$n3546 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[11] I1=murax.system_timer.timerA_io_limit__driver[11] I2=murax.system_timer.timerA.counter[14] I3=murax.system_timer.timerA_io_limit__driver[14] O=$abc$159056$n3547_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[0] I1=murax.system_timer.timerA_io_limit__driver[0] I2=murax.system_timer.timerA.counter[10] I3=murax.system_timer.timerA_io_limit__driver[10] O=$abc$159056$n3548 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=$abc$159056$n3550_1 I2=$abc$159056$n3479 I3=$false O=$abc$159056$n3549 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00011111 .gate SB_LUT4 I0=$abc$159056$n3485 I1=$abc$159056$n3530 I2=$false I3=$false O=$abc$159056$n3550_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_timer._zz_8_ I1=$abc$159056$n3534 I2=$false I3=$false O=$abc$159056$n170 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n135 I1=$abc$159056$n7702 I2=$false I3=$false O=$abc$159056$n171 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=$abc$159056$n171 I1=murax.system_timer.prescaler_1_.counter[0] I2=$false I3=$false O=$abc$159056$n173 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=$abc$159056$n3555 I1=$abc$159056$n3557 I2=$false I3=$false O=$abc$159056$n181 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3556_1 I1=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[2] I2=$false I3=$false O=$abc$159056$n3555 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[0] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[1] I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[2] I3=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_tick O=$abc$159056$n3556_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] I3=$false O=$abc$159056$n3557 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] I2=$abc$159056$n3555 I3=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] O=$abc$159056$n186 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] I3=$abc$159056$n3555 O=$abc$159056$n191 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I1=$abc$159056$n3561 I2=$abc$159056$n3555 I3=$false O=$abc$159056$n196 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] I2=$false I3=$false O=$abc$159056$n3561 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] I2=$abc$159056$n3555 I3=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] O=$abc$159056$n202 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I2=$abc$159056$n3555 I3=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] O=$abc$159056$n207 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] I3=$abc$159056$n3555 O=$abc$159056$n212 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n3555 I1=$abc$159056$n3561 I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I3=$false O=$abc$159056$n217 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3567 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write I2=$abc$159056$n3574_1 I3=$false O=$abc$159056$n218 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n3572 I1=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=$abc$159056$n3567 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=murax.system_cpu._zz_94_ I1=$abc$159056$n3569 I2=$abc$159056$n3474 I3=$abc$159056$n3416 O=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=$abc$159056$n3570 I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I2=$false I3=$false O=$abc$159056$n3569 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[0] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[1] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[2] I3=$abc$159056$n3571_1 O=$abc$159056$n3570 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=$abc$159056$n3406 I1=murax.system_mainBusArbiter.rspTarget I2=$false I3=$false O=$abc$159056$n3571_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n3573 I1=murax.system_cpu._zz_92_ I2=$false I3=$false O=$abc$159056$n3572 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_pendingCmd[0] I1=murax.system_cpu.IBusSimplePlugin_pendingCmd[1] I2=murax.system_cpu.IBusSimplePlugin_pendingCmd[2] I3=$false O=$abc$159056$n3573 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_ready I1=murax.system_mainBusDecoder_logic_hits_1 I2=$abc$159056$n3589_1 I3=$false O=$abc$159056$n3574_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001011 .gate SB_LUT4 I0=$abc$159056$n3576 I1=$abc$159056$n3580_1 I2=$abc$159056$n3584 I3=$abc$159056$n3586_1 O=murax.system_mainBusDecoder_logic_hits_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[23] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[26] I2=$abc$159056$n3579 I3=$abc$159056$n3577_1 O=$abc$159056$n3576 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111100010000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] I2=$abc$159056$n3578 I3=$false O=$abc$159056$n3577_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] I3=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] O=$abc$159056$n3578 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[21] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[22] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[27] I3=murax.system_cpu_dBus_cmd_halfPipe_regs_valid O=$abc$159056$n3579 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=$abc$159056$n3582 I1=$abc$159056$n3583_1 I2=$abc$159056$n3581 I3=$false O=$abc$159056$n3580_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[20] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=$abc$159056$n3581 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[29] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=$abc$159056$n3582 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[28] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=$abc$159056$n3583_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[24] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[25] I2=$abc$159056$n3585 I3=murax.system_cpu_dBus_cmd_halfPipe_regs_valid O=$abc$159056$n3584 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000111110000 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] I2=$false I3=$false O=$abc$159056$n3585 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n3587 I1=$abc$159056$n3588 I2=$false I3=$false O=$abc$159056$n3586_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[31] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=$abc$159056$n3587 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[30] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=$abc$159056$n3588 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=murax.system_mainBusArbiter.rspPending I1=murax.system_mainBusDecoder_logic_rspPending I2=$abc$159056$n3406 I3=$false O=$abc$159056$n3589_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11100000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_wr I2=$false I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3567 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write I2=$abc$159056$n3574_1 I3=$abc$159056$n3406 O=$abc$159056$n220 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000011111111 .gate SB_LUT4 I0=$abc$159056$n3593 I1=$abc$159056$n3596 I2=$false I3=$false O=$abc$159056$n221 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu._zz_150_[0] I1=murax.system_cpu._zz_150_[1] I2=murax.system_cpu._zz_150_[2] I3=$abc$159056$n3594 O=$abc$159056$n3593 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111100000000 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[3] I1=murax.systemDebugger_1_._zz_3_ I2=$abc$159056$n3595_1 I3=murax.systemDebugger_1_.dispatcher_dataShifter[2] O=$abc$159056$n3594 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[4] I1=murax.systemDebugger_1_.dispatcher_dataShifter[5] I2=murax.systemDebugger_1_.dispatcher_dataShifter[6] I3=murax.systemDebugger_1_.dispatcher_dataShifter[7] O=$abc$159056$n3595_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_headerShifter[0] I1=murax.systemDebugger_1_.dispatcher_headerShifter[1] I2=$abc$159056$n3597 I3=$abc$159056$n3598_1 O=$abc$159056$n3596 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_headerShifter[6] I1=murax.systemDebugger_1_.dispatcher_headerShifter[7] I2=murax.systemDebugger_1_.dispatcher_dataLoaded I3=$false O=$abc$159056$n3597 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_headerShifter[2] I1=murax.systemDebugger_1_.dispatcher_headerShifter[3] I2=murax.systemDebugger_1_.dispatcher_headerShifter[4] I3=murax.systemDebugger_1_.dispatcher_headerShifter[5] O=$abc$159056$n3598_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=$abc$159056$n221 I1=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid I2=$false I3=$false O=$abc$159056$n222 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last I1=murax.systemDebugger_1_.dispatcher_headerLoaded I2=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid I3=$false O=$abc$159056$n226 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110000 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_counter[0] I1=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last I2=$abc$159056$n226 I3=$false O=$abc$159056$n232 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11100000 .gate SB_LUT4 I0=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid I1=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last I2=$abc$159056$n221 I3=$false O=$abc$159056$n235 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11111000 .gate SB_LUT4 I0=$abc$159056$n112 I1=$abc$159056$n5576 I2=$false I3=$false O=$abc$159056$n240 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n3608 I1=$abc$159056$n3605 I2=$false I3=$false O=$abc$159056$n5576 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_BRANCH_DO I1=murax.system_cpu.memory_arbitration_isValid I2=$abc$159056$n3606 I3=$false O=$abc$159056$n3605 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=$abc$159056$n3607_1 I2=$false I3=$false O=$abc$159056$n3606 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu.writeBack_arbitration_isValid I1=murax.system_cpu.memory_to_writeBack_ENV_CTRL I2=$false I3=$false O=$abc$159056$n3607_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3405 I1=$abc$159056$n3413 I2=$false I3=$false O=$abc$159056$n3608 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3610_1 I1=$abc$159056$n3615 I2=$false I3=$false O=$abc$159056$n245 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3611 I1=$abc$159056$n3613_1 I2=$abc$159056$n3614 I3=murax.system_cpu.decode_to_execute_INSTRUCTION[22] O=$abc$159056$n3610_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[21] I1=$abc$159056$n3612 I2=$false I3=$false O=$abc$159056$n3611 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[30] I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_INSTRUCTION[28] I3=murax.system_cpu.decode_to_execute_INSTRUCTION[29] O=$abc$159056$n3612 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[26] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[27] I2=murax.system_cpu.decode_to_execute_INSTRUCTION[24] I3=murax.system_cpu.decode_to_execute_INSTRUCTION[25] O=$abc$159056$n3613_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[20] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[23] I2=$false I3=$false O=$abc$159056$n3614 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n3404 I1=$abc$159056$n3413 I2=$abc$159056$n3616_1 I3=murax.system_cpu.decode_to_execute_CSR_WRITE_OPCODE O=$abc$159056$n3615 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.execute_arbitration_isValid I1=murax.system_cpu.decode_to_execute_IS_CSR I2=$false I3=$false O=$abc$159056$n3616_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3615 I1=$abc$159056$n3618 I2=$false I3=$false O=$abc$159056$n249 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3611 I1=$abc$159056$n3614 I2=$abc$159056$n3619_1 I3=murax.system_cpu.decode_to_execute_INSTRUCTION[22] O=$abc$159056$n3618 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[27] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[24] I2=murax.system_cpu.decode_to_execute_INSTRUCTION[25] I3=murax.system_cpu.decode_to_execute_INSTRUCTION[26] O=$abc$159056$n3619_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=$abc$159056$n118 I1=$abc$159056$n5576 I2=$false I3=$false O=$abc$159056$n252 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready I1=$abc$159056$n5576 I2=$false I3=$false O=$abc$159056$n254 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n3573 I1=$abc$159056$n3623 I2=murax.system_cpu._zz_92_ I3=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready O=murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111100000000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I1=$abc$159056$n3574_1 I2=$false I3=$false O=$abc$159056$n3623 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready I1=$abc$159056$n5576 I2=$false I3=$false O=$abc$159056$n256 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n10664 I1=$abc$159056$n3606 I2=$false I3=$false O=$abc$159056$n262 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n3406 I1=murax.system_mainBusArbiter.rspTarget I2=$abc$159056$n3407 I3=$false O=$abc$159056$n10664 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=$abc$159056$n10665 I1=$abc$159056$n5576 I2=$false I3=$false O=$abc$159056$n265 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n3596 I1=$abc$159056$n3629 I2=$false I3=$false O=$abc$159056$n272 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[3] I1=murax.systemDebugger_1_.dispatcher_dataShifter[2] I2=$abc$159056$n3595_1 I3=murax.systemDebugger_1_._zz_3_ O=$abc$159056$n3629 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[56] I1=murax.systemDebugger_1_.dispatcher_dataShifter[48] I2=$abc$159056$n272 I3=$false O=$abc$159056$n285 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11100000 .gate SB_LUT4 I0=$abc$159056$n3479 I1=$abc$159056$n3632 I2=$false I3=$false O=$abc$159056$n288 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3482 I1=$abc$159056$n3488 I2=$false I3=$false O=$abc$159056$n3632 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3479 I1=$abc$159056$n3634_1 I2=$false I3=$false O=$abc$159056$n292 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3211 I1=$abc$159056$n3635 I2=$false I3=$false O=$abc$159056$n3634_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] O=$abc$159056$n3635 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=$abc$159056$n3479 I1=$abc$159056$n3637_1 I2=$false I3=$false O=$abc$159056$n297 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3485 I1=$abc$159056$n3488 I2=$false I3=$false O=$abc$159056$n3637_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3639 I1=$abc$159056$n3211 I2=$false I3=$false O=$abc$159056$n300 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3640_1 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I2=murax.system_apbBridge.state I3=$false O=$abc$159056$n3639 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] I1=murax.apb3Router_1_._zz_2_ I2=$false I3=$false O=$abc$159056$n3640_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3207_1 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid I3=$false O=murax.apb3Router_1_._zz_2_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] I1=$abc$159056$n3480 I2=$abc$159056$n3530 I3=$abc$159056$n3207_1 O=$abc$159056$n304 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n3644 I1=$abc$159056$n5576 I2=$false I3=$false O=$abc$159056$n306 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n118 I1=murax.system_cpu._zz_94_ I2=$abc$159056$n3570 I3=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy O=$abc$159056$n3644 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000100001110000 .gate SB_LUT4 I0=$abc$159056$n3646_1 I1=$abc$159056$n3649_1 I2=$false I3=$false O=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[0] I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[3] I2=$abc$159056$n3647 I3=$abc$159056$n3648 O=$abc$159056$n3646_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[4] I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[5] I2=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[6] I3=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[7] O=$abc$159056$n3647 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[9] I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[10] I2=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[12] I3=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[15] O=$abc$159056$n3648 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[1] I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[2] I2=$abc$159056$n3650 I3=$abc$159056$n3651 O=$abc$159056$n3649_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[16] I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[17] I2=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[18] I3=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[19] O=$abc$159056$n3650 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[8] I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[11] I2=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[13] I3=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[14] O=$abc$159056$n3651 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[13] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[14] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[15] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[16] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[17] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[18] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[19] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n3660 I1=murax.resetCtrl_systemReset I2=murax.system_drygascon128.core.state[3] I3=$false O=$abc$159056$n432 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11111110 .gate SB_LUT4 I0=murax.system_drygascon128.start I1=murax.system_drygascon128.core.state[0] I2=$false I3=$false O=$abc$159056$n3660 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.execute_arbitration_isValid I1=$abc$159056$n3473 I2=$abc$159056$n3413 I3=$false O=$abc$159056$n546 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10111111 .gate SB_LUT4 I0=murax.system_cpu._zz_116_ I1=murax.system_cpu._zz_217_ I2=$false I3=$false O=murax.system_cpu._zz_15_[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_cpu._zz_116_ I1=murax.system_cpu._zz_217_ I2=murax.system_cpu._zz_99_[13] I3=$false O=murax.system_cpu._zz_15_[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10111110 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[4] I1=murax.system_cpu._zz_116_ I2=$false I3=$false O=murax.system_cpu._zz_112_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[30] I1=murax.system_cpu._zz_99_[14] I2=murax.system_cpu._zz_99_[13] I3=$abc$159056$n3666 O=murax.system_cpu._zz_275_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101100000000 .gate SB_LUT4 I0=murax.system_cpu._zz_116_ I1=murax.system_cpu._zz_99_[6] I2=murax.system_cpu._zz_217_ I3=murax.system_cpu._zz_99_[4] O=$abc$159056$n3666 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=$abc$159056$n6176 I1=murax.system_cpu._zz_99_[4] I2=$abc$159056$n3438 I3=$false O=murax.system_cpu._zz_53_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[4] I1=murax.system_cpu._zz_99_[13] I2=$abc$159056$n3460_1 I3=$false O=murax.system_cpu.decode_SRC_LESS_UNSIGNED .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11110100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[6] I1=murax.system_cpu._zz_99_[5] I2=$abc$159056$n3671 I3=murax.system_cpu._zz_116_ O=murax.system_cpu._zz_237_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010000001111 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[13] I1=murax.system_cpu._zz_217_ I2=murax.system_cpu._zz_99_[14] I3=$false O=$abc$159056$n3671 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001011 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[13] I1=murax.system_cpu._zz_217_ I2=murax.system_cpu._zz_99_[4] I3=murax.system_cpu._zz_99_[6] O=murax.system_cpu.decode_IS_CSR .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_116_ I1=murax.system_cpu._zz_99_[6] I2=$abc$159056$n3674 I3=murax.system_cpu._zz_99_[4] O=murax.system_cpu.decode_SRC_USE_SUB_LESS .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111101000100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[5] I1=murax.system_cpu._zz_99_[30] I2=murax.system_cpu._zz_116_ I3=murax.system_cpu._zz_99_[13] O=$abc$159056$n3674 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000001110111 .gate SB_LUT4 I0=murax.system_timer.interruptCtrl_1_.pendings[1] I1=murax.system_timer.interruptCtrl_1__io_masks__driver[1] I2=murax.system_timer.interruptCtrl_1_.pendings[0] I3=murax.system_timer.interruptCtrl_1__io_masks__driver[0] O=murax.system_cpu.timerInterrupt .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=$abc$159056$n3556_1 I1=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[3] I2=$abc$159056$n3677 I3=$false O=$abc$159056$n914 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11110100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value I1=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_tick I2=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[0] I3=$false O=$abc$159056$n3677 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n3680 I1=$abc$159056$n3684 I2=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[3] I3=$abc$159056$n3679_1 O=$abc$159056$n919 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000111110000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[0] I1=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[1] I2=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I3=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[2] O=$abc$159056$n3679_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_2_ I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_risingOccupancy I2=$abc$159056$n3681 I3=$false O=$abc$159056$n3680 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=$abc$159056$n3682_1 I1=$abc$159056$n3683 I2=$false I3=$false O=$abc$159056$n3681 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[0] I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[0] I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[1] I3=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[1] O=$abc$159056$n3682_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[3] I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[3] I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[2] I3=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[2] O=$abc$159056$n3683 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[1] I1=$abc$159056$n3685_1 I2=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[0] I3=$false O=$abc$159056$n3684 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I1=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[1] I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[2] I3=$false O=$abc$159056$n3685_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n3687 I1=$abc$159056$n3688_1 I2=$false I3=$false O=$abc$159056$n922 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[0] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[2] O=$abc$159056$n3687 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[0] O=$abc$159056$n3688_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=murax.system_drygascon128.core.cnt[2] I2=$false I3=$false O=$abc$159056$n3691_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3695 I1=$abc$159056$n3696 I2=$abc$159056$n3697_1 I3=$false O=$abc$159056$n3694_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[1] I1=murax.system_drygascon128.rounds[1] I2=murax.system_drygascon128.rounds[0] I3=$false O=$abc$159056$n3695 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=$abc$159056$n10773 I2=$abc$159056$n10772 I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n3696 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n991 I1=murax.system_drygascon128.core.cnt[3] I2=$abc$159056$n10774 I3=$abc$159056$n9948 O=$abc$159056$n3697_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value I1=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[3] I2=$abc$159056$n3556_1 I3=$abc$159056$n3699 O=$abc$159056$n935 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111101000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I1=$abc$159056$n3561 I2=$abc$159056$n3556_1 I3=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[2] O=$abc$159056$n3699 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111111100000000 .gate SB_LUT4 I0=$abc$159056$n3685_1 I1=$abc$159056$n3701 I2=$abc$159056$n3679_1 I3=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[1] O=$abc$159056$n984 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1101111111000000 .gate SB_LUT4 I0=$abc$159056$n3702 I1=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[2] I2=$false I3=$false O=$abc$159056$n3701 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I1=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[1] I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[2] I3=$false O=$abc$159056$n3702 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3702 I1=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[3] I2=$abc$159056$n3679_1 I3=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[2] O=$abc$159056$n1119 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1101111111000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[0] I1=$abc$159056$n3680 I2=$abc$159056$n3684 I3=$abc$159056$n3679_1 O=$abc$159056$n1122 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=murax.resetCtrl_systemReset I1=$abc$159056$n3706_1 I2=$false I3=$false O=$abc$159056$n1143 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=$abc$159056$n3691_1 I2=murax.system_drygascon128.core.state[2] I3=$abc$159056$n3707 O=$abc$159056$n3706_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111101110000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=$false I3=$false O=$abc$159056$n3707 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_drygascon128.core.absorb I1=murax.system_drygascon128.start I2=$false I3=$false O=$abc$159056$n3708 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3710 I1=$abc$159056$n3556_1 I2=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[1] I3=$abc$159056$n217 O=$abc$159056$n1148 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111110110000 .gate SB_LUT4 I0=$abc$159056$n3557 I1=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value I2=$false I3=$false O=$abc$159056$n3710 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value I1=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_tick I2=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[0] I3=$abc$159056$n3712_1 O=$abc$159056$n1164 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000011111111 .gate SB_LUT4 I0=$abc$159056$n3710 I1=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[1] I2=$abc$159056$n3713 I3=$abc$159056$n3556_1 O=$abc$159056$n3712_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101111111111 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[3] I1=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value I2=$false I3=$false O=$abc$159056$n3713 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3715_1 I1=$abc$159056$n3716 I2=$false I3=$false O=$abc$159056$n1211 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[94] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3715_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3717 I2=$abc$159056$n3734 I3=$abc$159056$n3751_1 O=$abc$159056$n3716 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3719 I1=$abc$159056$n3722 I2=$abc$159056$n3731 I3=$abc$159056$n3718_1 O=$abc$159056$n3717 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3722 I1=$abc$159056$n3719 I2=$abc$159056$n3725 I3=$abc$159056$n3728 O=$abc$159056$n3718_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3720 I1=$abc$159056$n3721_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[145] O=$abc$159056$n3719 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[113] I1=murax.system_drygascon128.core.x[49] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3720 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[81] I1=murax.system_drygascon128.core.x[17] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3721_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3723 I1=$abc$159056$n3724_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[81] O=$abc$159056$n3722 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[113] I1=murax.system_drygascon128.core.x[49] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3723 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[81] I1=murax.system_drygascon128.core.x[17] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3724_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3726 I1=$abc$159056$n3727_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[17] O=$abc$159056$n3725 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[49] I1=murax.system_drygascon128.core.x[113] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3726 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[17] I1=murax.system_drygascon128.core.x[81] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3727_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3729 I1=$abc$159056$n3730_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[273] O=$abc$159056$n3728 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[113] I1=murax.system_drygascon128.core.x[49] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3729 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[81] I1=murax.system_drygascon128.core.x[17] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3730_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3732 I1=$abc$159056$n3733_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[209] O=$abc$159056$n3731 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[113] I1=murax.system_drygascon128.core.x[49] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3732 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[81] I1=murax.system_drygascon128.core.x[17] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3733_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3742_1 I1=$abc$159056$n3745_1 I2=$abc$159056$n3735 I3=$abc$159056$n3748_1 O=$abc$159056$n3734 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111100011100001 .gate SB_LUT4 I0=$abc$159056$n3736_1 I1=$abc$159056$n3739_1 I2=$false I3=$false O=$abc$159056$n3735 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3737 I1=$abc$159056$n3738 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[30] O=$abc$159056$n3736_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[62] I1=murax.system_drygascon128.core.x[126] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3737 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[30] I1=murax.system_drygascon128.core.x[94] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3738 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3740 I1=$abc$159056$n3741 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[286] O=$abc$159056$n3739_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[126] I1=murax.system_drygascon128.core.x[62] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3740 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[94] I1=murax.system_drygascon128.core.x[30] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3741 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3743 I1=$abc$159056$n3744 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[222] O=$abc$159056$n3742_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[126] I1=murax.system_drygascon128.core.x[62] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3743 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[94] I1=murax.system_drygascon128.core.x[30] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3744 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3746 I1=$abc$159056$n3747 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[158] O=$abc$159056$n3745_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[126] I1=murax.system_drygascon128.core.x[62] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3746 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[94] I1=murax.system_drygascon128.core.x[30] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3747 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3749 I1=$abc$159056$n3750 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[94] O=$abc$159056$n3748_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[126] I1=murax.system_drygascon128.core.x[62] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3749 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[94] I1=murax.system_drygascon128.core.x[30] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3750 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[124] I1=murax.system_drygascon128.core.c[188] I2=murax.system_drygascon128.core.c[252] I3=$abc$159056$n3752 O=$abc$159056$n3751_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[60] I1=murax.system_drygascon128.core.c[316] I2=$false I3=$false O=$abc$159056$n3752 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3754_1 I1=$abc$159056$n3755 I2=$false I3=$false O=$abc$159056$n1235 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[95] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3754_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3756 I2=$abc$159056$n3773 I3=$abc$159056$n3790_1 O=$abc$159056$n3755 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3758 I1=$abc$159056$n3761 I2=$abc$159056$n3770 I3=$abc$159056$n3757_1 O=$abc$159056$n3756 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3761 I1=$abc$159056$n3758 I2=$abc$159056$n3764 I3=$abc$159056$n3767 O=$abc$159056$n3757_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3759 I1=$abc$159056$n3760_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[146] O=$abc$159056$n3758 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[114] I1=murax.system_drygascon128.core.x[50] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3759 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[82] I1=murax.system_drygascon128.core.x[18] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3760_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3762 I1=$abc$159056$n3763_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[82] O=$abc$159056$n3761 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[114] I1=murax.system_drygascon128.core.x[50] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3762 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[82] I1=murax.system_drygascon128.core.x[18] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3763_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3765 I1=$abc$159056$n3766_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[18] O=$abc$159056$n3764 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[50] I1=murax.system_drygascon128.core.x[114] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3765 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[18] I1=murax.system_drygascon128.core.x[82] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3766_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3768 I1=$abc$159056$n3769_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[274] O=$abc$159056$n3767 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[114] I1=murax.system_drygascon128.core.x[50] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3768 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[82] I1=murax.system_drygascon128.core.x[18] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3769_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3771 I1=$abc$159056$n3772_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[210] O=$abc$159056$n3770 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[114] I1=murax.system_drygascon128.core.x[50] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3771 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[82] I1=murax.system_drygascon128.core.x[18] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3772_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3775_1 I1=$abc$159056$n3778_1 I2=$abc$159056$n3787_1 I3=$abc$159056$n3774 O=$abc$159056$n3773 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3778_1 I1=$abc$159056$n3775_1 I2=$abc$159056$n3781_1 I3=$abc$159056$n3784_1 O=$abc$159056$n3774 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3776 I1=$abc$159056$n3777 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[159] O=$abc$159056$n3775_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[127] I1=murax.system_drygascon128.core.x[63] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3776 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[95] I1=murax.system_drygascon128.core.x[31] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3777 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3779 I1=$abc$159056$n3780 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[95] O=$abc$159056$n3778_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[127] I1=murax.system_drygascon128.core.x[63] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3779 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[95] I1=murax.system_drygascon128.core.x[31] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3780 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3782 I1=$abc$159056$n3783 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[31] O=$abc$159056$n3781_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[63] I1=murax.system_drygascon128.core.x[127] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3782 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[31] I1=murax.system_drygascon128.core.x[95] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3783 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3785 I1=$abc$159056$n3786 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[287] O=$abc$159056$n3784_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[127] I1=murax.system_drygascon128.core.x[63] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3785 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[95] I1=murax.system_drygascon128.core.x[31] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3786 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3788 I1=$abc$159056$n3789 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[223] O=$abc$159056$n3787_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[127] I1=murax.system_drygascon128.core.x[63] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3788 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[95] I1=murax.system_drygascon128.core.x[31] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3789 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[125] I1=murax.system_drygascon128.core.c[189] I2=murax.system_drygascon128.core.c[253] I3=$abc$159056$n3791 O=$abc$159056$n3790_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[61] I1=murax.system_drygascon128.core.c[317] I2=$false I3=$false O=$abc$159056$n3791 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3793_1 I1=$abc$159056$n3797 I2=$false I3=$false O=$abc$159056$n1238 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[113] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3793_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3204 I1=$abc$159056$n3795 I2=$false I3=$false O=$abc$159056$n3794 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3280 I1=$abc$159056$n3796_1 I2=$false I3=$false O=$abc$159056$n3795 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[0] I1=murax.system_drygascon128.core.cnt[1] I2=$false I3=$false O=$abc$159056$n3796_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3377 I2=$abc$159056$n3798 I3=$abc$159056$n3800 O=$abc$159056$n3797 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[113] I1=murax.system_drygascon128.core.c[177] I2=murax.system_drygascon128.core.c[241] I3=$abc$159056$n3799_1 O=$abc$159056$n3798 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[49] I1=murax.system_drygascon128.core.c[305] I2=$false I3=$false O=$abc$159056$n3799_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[100] I1=murax.system_drygascon128.core.c[164] I2=murax.system_drygascon128.core.c[228] I3=$abc$159056$n3801 O=$abc$159056$n3800 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[36] I1=murax.system_drygascon128.core.c[292] I2=$false I3=$false O=$abc$159056$n3801 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3803 I1=$abc$159056$n3804 I2=$false I3=$false O=$abc$159056$n1241 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[108] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3803 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3805_1 I2=$abc$159056$n3822 I3=$abc$159056$n3824 O=$abc$159056$n3804 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3813 I1=$abc$159056$n3816 I2=$abc$159056$n3806 I3=$abc$159056$n3819 O=$abc$159056$n3805_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111100011100001 .gate SB_LUT4 I0=$abc$159056$n3807 I1=$abc$159056$n3810 I2=$false I3=$false O=$abc$159056$n3806 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3808_1 I1=$abc$159056$n3809 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[11] O=$abc$159056$n3807 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[43] I1=murax.system_drygascon128.core.x[107] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3808_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[11] I1=murax.system_drygascon128.core.x[75] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3809 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3811_1 I1=$abc$159056$n3812 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[267] O=$abc$159056$n3810 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[107] I1=murax.system_drygascon128.core.x[43] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3811_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[75] I1=murax.system_drygascon128.core.x[11] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3812 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3814_1 I1=$abc$159056$n3815 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[203] O=$abc$159056$n3813 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[107] I1=murax.system_drygascon128.core.x[43] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3814_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[75] I1=murax.system_drygascon128.core.x[11] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3815 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3817_1 I1=$abc$159056$n3818 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[75] O=$abc$159056$n3816 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[107] I1=murax.system_drygascon128.core.x[43] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3817_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[75] I1=murax.system_drygascon128.core.x[11] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3818 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3820_1 I1=$abc$159056$n3821 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[139] O=$abc$159056$n3819 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[107] I1=murax.system_drygascon128.core.x[43] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3820_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[75] I1=murax.system_drygascon128.core.x[11] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3821 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[108] I1=murax.system_drygascon128.core.c[172] I2=murax.system_drygascon128.core.c[236] I3=$abc$159056$n3823_1 O=$abc$159056$n3822 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[44] I1=murax.system_drygascon128.core.c[300] I2=$false I3=$false O=$abc$159056$n3823_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[127] I1=murax.system_drygascon128.core.c[191] I2=murax.system_drygascon128.core.c[255] I3=$abc$159056$n3825 O=$abc$159056$n3824 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[63] I1=murax.system_drygascon128.core.c[319] I2=$false I3=$false O=$abc$159056$n3825 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3827 I1=$abc$159056$n3828 I2=$false I3=$false O=$abc$159056$n1244 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[89] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3827 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3829 I2=$abc$159056$n3846 I3=$abc$159056$n3863 O=$abc$159056$n3828 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3831_1 I1=$abc$159056$n3834 I2=$abc$159056$n3843 I3=$abc$159056$n3830 O=$abc$159056$n3829 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3834 I1=$abc$159056$n3831_1 I2=$abc$159056$n3837 I3=$abc$159056$n3840 O=$abc$159056$n3830 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3832 I1=$abc$159056$n3833 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[140] O=$abc$159056$n3831_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[108] I1=murax.system_drygascon128.core.x[44] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3832 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[76] I1=murax.system_drygascon128.core.x[12] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3833 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3835_1 I1=$abc$159056$n3836 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[76] O=$abc$159056$n3834 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[108] I1=murax.system_drygascon128.core.x[44] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3835_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[76] I1=murax.system_drygascon128.core.x[12] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3836 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3838_1 I1=$abc$159056$n3839 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[12] O=$abc$159056$n3837 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[44] I1=murax.system_drygascon128.core.x[108] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3838_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[12] I1=murax.system_drygascon128.core.x[76] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3839 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3841_1 I1=$abc$159056$n3842 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[268] O=$abc$159056$n3840 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[108] I1=murax.system_drygascon128.core.x[44] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3841_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[76] I1=murax.system_drygascon128.core.x[12] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3842 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3844_1 I1=$abc$159056$n3845 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[204] O=$abc$159056$n3843 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[108] I1=murax.system_drygascon128.core.x[44] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3844_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[76] I1=murax.system_drygascon128.core.x[12] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3845 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3848 I1=$abc$159056$n3851 I2=$abc$159056$n3860 I3=$abc$159056$n3847_1 O=$abc$159056$n3846 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3851 I1=$abc$159056$n3848 I2=$abc$159056$n3854 I3=$abc$159056$n3857 O=$abc$159056$n3847_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3849 I1=$abc$159056$n3850_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[153] O=$abc$159056$n3848 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[121] I1=murax.system_drygascon128.core.x[57] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3849 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[89] I1=murax.system_drygascon128.core.x[25] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3850_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3852 I1=$abc$159056$n3853_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[89] O=$abc$159056$n3851 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[121] I1=murax.system_drygascon128.core.x[57] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3852 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[89] I1=murax.system_drygascon128.core.x[25] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3853_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3855 I1=$abc$159056$n3856_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[25] O=$abc$159056$n3854 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[57] I1=murax.system_drygascon128.core.x[121] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3855 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[25] I1=murax.system_drygascon128.core.x[89] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3856_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3858 I1=$abc$159056$n3859_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[281] O=$abc$159056$n3857 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[121] I1=murax.system_drygascon128.core.x[57] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3858 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[89] I1=murax.system_drygascon128.core.x[25] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3859_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3861 I1=$abc$159056$n3862_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[217] O=$abc$159056$n3860 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[121] I1=murax.system_drygascon128.core.x[57] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3861 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[89] I1=murax.system_drygascon128.core.x[25] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3862_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[119] I1=murax.system_drygascon128.core.c[183] I2=murax.system_drygascon128.core.c[247] I3=$abc$159056$n3864 O=$abc$159056$n3863 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[55] I1=murax.system_drygascon128.core.c[311] I2=$false I3=$false O=$abc$159056$n3864 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3866 I1=$abc$159056$n3867 I2=$false I3=$false O=$abc$159056$n1247 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[88] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3866 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3805_1 I2=$abc$159056$n3868_1 I3=$abc$159056$n3885 O=$abc$159056$n3867 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3870 I1=$abc$159056$n3873 I2=$abc$159056$n3882 I3=$abc$159056$n3869 O=$abc$159056$n3868_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3873 I1=$abc$159056$n3870 I2=$abc$159056$n3876 I3=$abc$159056$n3879 O=$abc$159056$n3869 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3871_1 I1=$abc$159056$n3872 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[152] O=$abc$159056$n3870 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[120] I1=murax.system_drygascon128.core.x[56] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3871_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[88] I1=murax.system_drygascon128.core.x[24] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3872 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3874_1 I1=$abc$159056$n3875 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[88] O=$abc$159056$n3873 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[120] I1=murax.system_drygascon128.core.x[56] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3874_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[88] I1=murax.system_drygascon128.core.x[24] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3875 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3877_1 I1=$abc$159056$n3878 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[24] O=$abc$159056$n3876 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[56] I1=murax.system_drygascon128.core.x[120] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3877_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[24] I1=murax.system_drygascon128.core.x[88] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3878 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3880_1 I1=$abc$159056$n3881 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[280] O=$abc$159056$n3879 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[120] I1=murax.system_drygascon128.core.x[56] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3880_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[88] I1=murax.system_drygascon128.core.x[24] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3881 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3883_1 I1=$abc$159056$n3884 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[216] O=$abc$159056$n3882 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[120] I1=murax.system_drygascon128.core.x[56] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3883_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[88] I1=murax.system_drygascon128.core.x[24] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3884 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[118] I1=murax.system_drygascon128.core.c[182] I2=murax.system_drygascon128.core.c[246] I3=$abc$159056$n3886_1 O=$abc$159056$n3885 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[54] I1=murax.system_drygascon128.core.c[310] I2=$false I3=$false O=$abc$159056$n3886_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3888 I1=$abc$159056$n3889_1 I2=$false I3=$false O=$abc$159056$n1250 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[90] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3888 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3890 I2=$abc$159056$n3907_1 I3=$abc$159056$n3924 O=$abc$159056$n3889_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3892_1 I1=$abc$159056$n3895_1 I2=$abc$159056$n3904_1 I3=$abc$159056$n3891 O=$abc$159056$n3890 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3895_1 I1=$abc$159056$n3892_1 I2=$abc$159056$n3898_1 I3=$abc$159056$n3901_1 O=$abc$159056$n3891 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3893 I1=$abc$159056$n3894 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[141] O=$abc$159056$n3892_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[109] I1=murax.system_drygascon128.core.x[45] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3893 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[77] I1=murax.system_drygascon128.core.x[13] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3894 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3896 I1=$abc$159056$n3897 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[77] O=$abc$159056$n3895_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[109] I1=murax.system_drygascon128.core.x[45] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3896 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[77] I1=murax.system_drygascon128.core.x[13] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3897 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3899 I1=$abc$159056$n3900 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[13] O=$abc$159056$n3898_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[45] I1=murax.system_drygascon128.core.x[109] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3899 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[13] I1=murax.system_drygascon128.core.x[77] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3900 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3902 I1=$abc$159056$n3903 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[269] O=$abc$159056$n3901_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[109] I1=murax.system_drygascon128.core.x[45] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3902 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[77] I1=murax.system_drygascon128.core.x[13] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3903 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3905 I1=$abc$159056$n3906 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[205] O=$abc$159056$n3904_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[109] I1=murax.system_drygascon128.core.x[45] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3905 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[77] I1=murax.system_drygascon128.core.x[13] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3906 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3909 I1=$abc$159056$n3912 I2=$abc$159056$n3921 I3=$abc$159056$n3908 O=$abc$159056$n3907_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3912 I1=$abc$159056$n3909 I2=$abc$159056$n3915 I3=$abc$159056$n3918 O=$abc$159056$n3908 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3910_1 I1=$abc$159056$n3911 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[154] O=$abc$159056$n3909 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[122] I1=murax.system_drygascon128.core.x[58] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3910_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[90] I1=murax.system_drygascon128.core.x[26] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3911 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3913_1 I1=$abc$159056$n3914 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[90] O=$abc$159056$n3912 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[122] I1=murax.system_drygascon128.core.x[58] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3913_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[90] I1=murax.system_drygascon128.core.x[26] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3914 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3916_1 I1=$abc$159056$n3917 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[26] O=$abc$159056$n3915 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[58] I1=murax.system_drygascon128.core.x[122] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3916_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[26] I1=murax.system_drygascon128.core.x[90] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3917 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3919_1 I1=$abc$159056$n3920 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[282] O=$abc$159056$n3918 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[122] I1=murax.system_drygascon128.core.x[58] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3919_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[90] I1=murax.system_drygascon128.core.x[26] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3920 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3922_1 I1=$abc$159056$n3923 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[218] O=$abc$159056$n3921 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[122] I1=murax.system_drygascon128.core.x[58] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3922_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[90] I1=murax.system_drygascon128.core.x[26] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3923 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[120] I1=murax.system_drygascon128.core.c[184] I2=murax.system_drygascon128.core.c[248] I3=$abc$159056$n3925_1 O=$abc$159056$n3924 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[56] I1=murax.system_drygascon128.core.c[312] I2=$false I3=$false O=$abc$159056$n3925_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3927 I1=$abc$159056$n3928_1 I2=$false I3=$false O=$abc$159056$n1253 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[96] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3927 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3773 I2=$abc$159056$n3929 I3=$abc$159056$n3931_1 O=$abc$159056$n3928_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[96] I1=murax.system_drygascon128.core.c[160] I2=murax.system_drygascon128.core.c[224] I3=$abc$159056$n3930 O=$abc$159056$n3929 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[32] I1=murax.system_drygascon128.core.c[288] I2=$false I3=$false O=$abc$159056$n3930 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[115] I1=murax.system_drygascon128.core.c[179] I2=murax.system_drygascon128.core.c[243] I3=$abc$159056$n3932 O=$abc$159056$n3931_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[51] I1=murax.system_drygascon128.core.c[307] I2=$false I3=$false O=$abc$159056$n3932 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3934_1 I1=$abc$159056$n3937_1 I2=$false I3=$false O=$abc$159056$n1256 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[52] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3934_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3204 I1=$abc$159056$n3280 I2=$abc$159056$n3936 I3=$false O=$abc$159056$n3935 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[1] I1=murax.system_drygascon128.core.cnt[0] I2=$false I3=$false O=$abc$159056$n3936 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3938 I2=$abc$159056$n3940_1 I3=$abc$159056$n3943_1 O=$abc$159056$n3937_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3748_1 I1=$abc$159056$n3735 I2=$abc$159056$n3745_1 I3=$abc$159056$n3939 O=$abc$159056$n3938 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=$abc$159056$n3742_1 I1=$abc$159056$n3739_1 I2=$false I3=$false O=$abc$159056$n3939 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[116] I1=murax.system_drygascon128.core.c[180] I2=$abc$159056$n3941 I3=$abc$159056$n3942 O=$abc$159056$n3940_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[52] I1=murax.system_drygascon128.core.c[308] I2=$false I3=$false O=$abc$159056$n3941 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[52] I1=murax.system_drygascon128.core.c[308] I2=murax.system_drygascon128.core.c[116] I3=murax.system_drygascon128.core.c[244] O=$abc$159056$n3942 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[98] I1=murax.system_drygascon128.core.c[162] I2=$abc$159056$n3944 I3=$abc$159056$n3945 O=$abc$159056$n3943_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[34] I1=murax.system_drygascon128.core.c[290] I2=$false I3=$false O=$abc$159056$n3944 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[34] I1=murax.system_drygascon128.core.c[290] I2=murax.system_drygascon128.core.c[98] I3=murax.system_drygascon128.core.c[226] O=$abc$159056$n3945 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3947 I1=$abc$159056$n3950 I2=$false I3=$false O=$abc$159056$n1259 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[20] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3947 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3204 I1=$abc$159056$n3949_1 I2=$false I3=$false O=$abc$159056$n3948 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=$abc$159056$n3280 I2=$false I3=$false O=$abc$159056$n3949_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3951 I2=$abc$159056$n3970_1 I3=$abc$159056$n3988_1 O=$abc$159056$n3950 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3952_1 I1=$abc$159056$n3966 I2=$false I3=$false O=$abc$159056$n3951 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n7716 I1=$abc$159056$n3957 I2=$abc$159056$n3960 I3=$abc$159056$n3963 O=$abc$159056$n3952_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111011100001 .gate SB_LUT4 I0=$abc$159056$n3958_1 I1=$abc$159056$n3959 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[66] O=$abc$159056$n3957 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[98] I1=murax.system_drygascon128.core.x[34] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3958_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[66] I1=murax.system_drygascon128.core.x[2] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3959 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3961_1 I1=$abc$159056$n3962 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[258] O=$abc$159056$n3960 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[98] I1=murax.system_drygascon128.core.x[34] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3961_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[66] I1=murax.system_drygascon128.core.x[2] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3962 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3964_1 I1=$abc$159056$n3965 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[2] O=$abc$159056$n3963 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[34] I1=murax.system_drygascon128.core.x[98] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3964_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[2] I1=murax.system_drygascon128.core.x[66] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3965 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3963 I1=$abc$159056$n3960 I2=$abc$159056$n3957 I3=$abc$159056$n3967_1 O=$abc$159056$n3966 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n3968 I1=$abc$159056$n3969 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[194] O=$abc$159056$n3967_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[98] I1=murax.system_drygascon128.core.x[34] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3968 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[66] I1=murax.system_drygascon128.core.x[2] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3969 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3971 I1=$abc$159056$n3984 I2=$false I3=$false O=$abc$159056$n3970_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3978 I1=$abc$159056$n3981 I2=$abc$159056$n3975 I3=$abc$159056$n3972 O=$abc$159056$n3971 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n3973_1 I1=$abc$159056$n3974 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[212] O=$abc$159056$n3972 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[116] I1=murax.system_drygascon128.core.x[52] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n3973_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[84] I1=murax.system_drygascon128.core.x[20] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n3974 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3976_1 I1=$abc$159056$n3977 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[84] O=$abc$159056$n3975 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[116] I1=murax.system_drygascon128.core.x[52] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n3976_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[84] I1=murax.system_drygascon128.core.x[20] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n3977 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3979_1 I1=$abc$159056$n3980 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[20] O=$abc$159056$n3978 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[52] I1=murax.system_drygascon128.core.x[116] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n3979_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[20] I1=murax.system_drygascon128.core.x[84] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n3980 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3982_1 I1=$abc$159056$n3983 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[276] O=$abc$159056$n3981 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[116] I1=murax.system_drygascon128.core.x[52] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n3982_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[84] I1=murax.system_drygascon128.core.x[20] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n3983 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3975 I1=$abc$159056$n3985_1 I2=$abc$159056$n3978 I3=$abc$159056$n3981 O=$abc$159056$n3984 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n3986 I1=$abc$159056$n3987 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[148] O=$abc$159056$n3985_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[116] I1=murax.system_drygascon128.core.x[52] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n3986 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[84] I1=murax.system_drygascon128.core.x[20] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n3987 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[125] I1=murax.system_drygascon128.core.c[189] I2=$abc$159056$n3791 I3=$abc$159056$n3989 O=$abc$159056$n3988_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[61] I1=murax.system_drygascon128.core.c[317] I2=murax.system_drygascon128.core.c[125] I3=murax.system_drygascon128.core.c[253] O=$abc$159056$n3989 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3991_1 I1=$abc$159056$n3992 I2=$false I3=$false O=$abc$159056$n1262 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[51] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n3991_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3993 I2=$abc$159056$n3995 I3=$abc$159056$n3997_1 O=$abc$159056$n3992 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3361 I1=$abc$159056$n3994_1 I2=$false I3=$false O=$abc$159056$n3993 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3368 I1=$abc$159056$n3371 I2=$abc$159056$n3365 I3=$abc$159056$n3374 O=$abc$159056$n3994_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[115] I1=murax.system_drygascon128.core.c[179] I2=$abc$159056$n3932 I3=$abc$159056$n3996 O=$abc$159056$n3995 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[51] I1=murax.system_drygascon128.core.c[307] I2=murax.system_drygascon128.core.c[115] I3=murax.system_drygascon128.core.c[243] O=$abc$159056$n3996 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[97] I1=murax.system_drygascon128.core.c[161] I2=$abc$159056$n3998 I3=$abc$159056$n3999 O=$abc$159056$n3997_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[33] I1=murax.system_drygascon128.core.c[289] I2=$false I3=$false O=$abc$159056$n3998 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[33] I1=murax.system_drygascon128.core.c[289] I2=murax.system_drygascon128.core.c[97] I3=murax.system_drygascon128.core.c[225] O=$abc$159056$n3999 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4001 I1=$abc$159056$n4002 I2=$false I3=$false O=$abc$159056$n1265 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[19] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4001 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4003_1 I2=$abc$159056$n4009_1 I3=$abc$159056$n4015_1 O=$abc$159056$n4002 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4004 I1=$abc$159056$n4008 I2=$false I3=$false O=$abc$159056$n4003_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n7690 I1=$abc$159056$n3267 I2=$abc$159056$n3273 I3=$abc$159056$n4005 O=$abc$159056$n4004 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110000100011110 .gate SB_LUT4 I0=$abc$159056$n4006_1 I1=$abc$159056$n4007 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[1] O=$abc$159056$n4005 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[33] I1=murax.system_drygascon128.core.x[97] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4006_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[1] I1=murax.system_drygascon128.core.x[65] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4007 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4005 I1=$abc$159056$n3273 I2=$abc$159056$n3267 I3=$abc$159056$n3270 O=$abc$159056$n4008 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4010 I1=$abc$159056$n4014 I2=$false I3=$false O=$abc$159056$n4009_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4011 I1=$abc$159056$n3224 I2=$abc$159056$n3218 I3=$abc$159056$n3221 O=$abc$159056$n4010 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4012_1 I1=$abc$159056$n4013 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[19] O=$abc$159056$n4011 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[51] I1=murax.system_drygascon128.core.x[115] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4012_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[19] I1=murax.system_drygascon128.core.x[83] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4013 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3218 I1=$abc$159056$n3215 I2=$abc$159056$n3224 I3=$abc$159056$n4011 O=$abc$159056$n4014 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[124] I1=murax.system_drygascon128.core.c[188] I2=$abc$159056$n3752 I3=$abc$159056$n4016 O=$abc$159056$n4015_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[60] I1=murax.system_drygascon128.core.c[316] I2=murax.system_drygascon128.core.c[124] I3=murax.system_drygascon128.core.c[252] O=$abc$159056$n4016 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4018_1 I1=$abc$159056$n4019 I2=$false I3=$false O=$abc$159056$n1268 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[50] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4018_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4020 I2=$abc$159056$n4022 I3=$abc$159056$n4025 O=$abc$159056$n4019 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3352 I1=$abc$159056$n3349 I2=$abc$159056$n3339 I3=$abc$159056$n4021_1 O=$abc$159056$n4020 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n3340_1 I1=$abc$159056$n3343_1 I2=$abc$159056$n3352 I3=$abc$159056$n3346 O=$abc$159056$n4021_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[114] I1=murax.system_drygascon128.core.c[178] I2=$abc$159056$n4023 I3=$abc$159056$n4024_1 O=$abc$159056$n4022 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[50] I1=murax.system_drygascon128.core.c[306] I2=$false I3=$false O=$abc$159056$n4023 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[50] I1=murax.system_drygascon128.core.c[306] I2=murax.system_drygascon128.core.c[114] I3=murax.system_drygascon128.core.c[242] O=$abc$159056$n4024_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[96] I1=murax.system_drygascon128.core.c[160] I2=$abc$159056$n3930 I3=$abc$159056$n4026 O=$abc$159056$n4025 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[32] I1=murax.system_drygascon128.core.c[288] I2=murax.system_drygascon128.core.c[96] I3=murax.system_drygascon128.core.c[224] O=$abc$159056$n4026 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4028 I1=$abc$159056$n4029 I2=$false I3=$false O=$abc$159056$n1271 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[18] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4028 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4030_1 I2=$abc$159056$n4049 I3=$abc$159056$n4051_1 O=$abc$159056$n4029 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4031 I1=$abc$159056$n4045_1 I2=$false I3=$false O=$abc$159056$n4030_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n7719 I1=$abc$159056$n4036_1 I2=$abc$159056$n4039_1 I3=$abc$159056$n4042_1 O=$abc$159056$n4031 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111011100001 .gate SB_LUT4 I0=$abc$159056$n4037 I1=$abc$159056$n4038 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[64] O=$abc$159056$n4036_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[96] I1=murax.system_drygascon128.core.x[32] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4037 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[64] I1=murax.system_drygascon128.core.x[0] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4038 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4040 I1=$abc$159056$n4041 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[256] O=$abc$159056$n4039_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[96] I1=murax.system_drygascon128.core.x[32] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4040 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[64] I1=murax.system_drygascon128.core.x[0] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4041 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4043 I1=$abc$159056$n4044 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[0] O=$abc$159056$n4042_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[32] I1=murax.system_drygascon128.core.x[96] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4043 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[64] I1=murax.system_drygascon128.core.x[0] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4044 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4042_1 I1=$abc$159056$n4039_1 I2=$abc$159056$n4036_1 I3=$abc$159056$n4046 O=$abc$159056$n4045_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4047 I1=$abc$159056$n4048_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[192] O=$abc$159056$n4046 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[96] I1=murax.system_drygascon128.core.x[32] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4047 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[64] I1=murax.system_drygascon128.core.x[0] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4048_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n3757_1 I1=$abc$159056$n4050 I2=$false I3=$false O=$abc$159056$n4049 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3764 I1=$abc$159056$n3767 I2=$abc$159056$n3761 I3=$abc$159056$n3770 O=$abc$159056$n4050 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[123] I1=murax.system_drygascon128.core.c[187] I2=$abc$159056$n3383 I3=$abc$159056$n4052 O=$abc$159056$n4051_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[59] I1=murax.system_drygascon128.core.c[315] I2=murax.system_drygascon128.core.c[123] I3=murax.system_drygascon128.core.c[251] O=$abc$159056$n4052 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4054_1 I1=$abc$159056$n4055 I2=$false I3=$false O=$abc$159056$n1274 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[49] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4054_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4056 I2=$abc$159056$n4058 I3=$abc$159056$n4060_1 O=$abc$159056$n4055 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3293_1 I1=$abc$159056$n3296 I2=$abc$159056$n3283 I3=$abc$159056$n4057_1 O=$abc$159056$n4056 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n3284 I1=$abc$159056$n3287 I2=$abc$159056$n3293_1 I3=$abc$159056$n3290 O=$abc$159056$n4057_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[113] I1=murax.system_drygascon128.core.c[177] I2=$abc$159056$n3799_1 I3=$abc$159056$n4059 O=$abc$159056$n4058 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[49] I1=murax.system_drygascon128.core.c[305] I2=murax.system_drygascon128.core.c[113] I3=murax.system_drygascon128.core.c[241] O=$abc$159056$n4059 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[127] I1=murax.system_drygascon128.core.c[191] I2=$abc$159056$n3825 I3=$abc$159056$n4061 O=$abc$159056$n4060_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[63] I1=murax.system_drygascon128.core.c[319] I2=murax.system_drygascon128.core.c[127] I3=murax.system_drygascon128.core.c[255] O=$abc$159056$n4061 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4063_1 I1=$abc$159056$n4064 I2=$false I3=$false O=$abc$159056$n1277 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[17] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4063_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4065 I2=$abc$159056$n4067 I3=$abc$159056$n4069_1 O=$abc$159056$n4064 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3718_1 I1=$abc$159056$n4066_1 I2=$false I3=$false O=$abc$159056$n4065 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3725 I1=$abc$159056$n3728 I2=$abc$159056$n3722 I3=$abc$159056$n3731 O=$abc$159056$n4066_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n3774 I1=$abc$159056$n4068 I2=$false I3=$false O=$abc$159056$n4067 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3781_1 I1=$abc$159056$n3784_1 I2=$abc$159056$n3778_1 I3=$abc$159056$n3787_1 O=$abc$159056$n4068 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[122] I1=murax.system_drygascon128.core.c[186] I2=$abc$159056$n3356 I3=$abc$159056$n4070 O=$abc$159056$n4069_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[58] I1=murax.system_drygascon128.core.c[314] I2=murax.system_drygascon128.core.c[122] I3=murax.system_drygascon128.core.c[250] O=$abc$159056$n4070 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4072_1 I1=$abc$159056$n4073 I2=$false I3=$false O=$abc$159056$n1280 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[48] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4072_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4074 I2=$abc$159056$n4076 I3=$abc$159056$n4079 O=$abc$159056$n4073 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3908 I1=$abc$159056$n4075_1 I2=$false I3=$false O=$abc$159056$n4074 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3915 I1=$abc$159056$n3918 I2=$abc$159056$n3912 I3=$abc$159056$n3921 O=$abc$159056$n4075_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[112] I1=murax.system_drygascon128.core.c[176] I2=$abc$159056$n4077 I3=$abc$159056$n4078_1 O=$abc$159056$n4076 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[48] I1=murax.system_drygascon128.core.c[304] I2=$false I3=$false O=$abc$159056$n4077 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[48] I1=murax.system_drygascon128.core.c[304] I2=murax.system_drygascon128.core.c[112] I3=murax.system_drygascon128.core.c[240] O=$abc$159056$n4078_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[126] I1=murax.system_drygascon128.core.c[190] I2=$abc$159056$n4080 I3=$abc$159056$n4081_1 O=$abc$159056$n4079 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[62] I1=murax.system_drygascon128.core.c[318] I2=$false I3=$false O=$abc$159056$n4080 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[62] I1=murax.system_drygascon128.core.c[318] I2=murax.system_drygascon128.core.c[126] I3=murax.system_drygascon128.core.c[254] O=$abc$159056$n4081_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4083 I1=$abc$159056$n4084_1 I2=$false I3=$false O=$abc$159056$n1283 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[16] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4083 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3938 I2=$abc$159056$n4085 I3=$abc$159056$n4087_1 O=$abc$159056$n4084_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3378 I1=$abc$159056$n4086 I2=$false I3=$false O=$abc$159056$n4085 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3379 I1=$abc$159056$n3237 I2=$abc$159056$n3231 I3=$abc$159056$n3234 O=$abc$159056$n4086 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[121] I1=murax.system_drygascon128.core.c[185] I2=$abc$159056$n3317 I3=$abc$159056$n4088 O=$abc$159056$n4087_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[57] I1=murax.system_drygascon128.core.c[313] I2=murax.system_drygascon128.core.c[121] I3=murax.system_drygascon128.core.c[249] O=$abc$159056$n4088 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4090_1 I1=$abc$159056$n4091 I2=$false I3=$false O=$abc$159056$n1286 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[47] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4090_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4092 I2=$abc$159056$n3988_1 I3=$abc$159056$n4094 O=$abc$159056$n4091 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3847_1 I1=$abc$159056$n4093_1 I2=$false I3=$false O=$abc$159056$n4092 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3854 I1=$abc$159056$n3857 I2=$abc$159056$n3851 I3=$abc$159056$n3860 O=$abc$159056$n4093_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[111] I1=murax.system_drygascon128.core.c[175] I2=$abc$159056$n4095 I3=$abc$159056$n4096_1 O=$abc$159056$n4094 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[47] I1=murax.system_drygascon128.core.c[303] I2=$false I3=$false O=$abc$159056$n4095 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[47] I1=murax.system_drygascon128.core.c[303] I2=murax.system_drygascon128.core.c[111] I3=murax.system_drygascon128.core.c[239] O=$abc$159056$n4096_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4098 I1=$abc$159056$n4099_1 I2=$false I3=$false O=$abc$159056$n1289 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[15] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4098 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3993 I2=$abc$159056$n4100 I3=$abc$159056$n4102_1 O=$abc$159056$n4099_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3335 I1=$abc$159056$n3322 I2=$abc$159056$n3332 I3=$abc$159056$n4101 O=$abc$159056$n4100 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=$abc$159056$n3329 I1=$abc$159056$n3326 I2=$false I3=$false O=$abc$159056$n4101 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[120] I1=murax.system_drygascon128.core.c[184] I2=$abc$159056$n3925_1 I3=$abc$159056$n4103 O=$abc$159056$n4102_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[56] I1=murax.system_drygascon128.core.c[312] I2=murax.system_drygascon128.core.c[120] I3=murax.system_drygascon128.core.c[248] O=$abc$159056$n4103 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4105_1 I1=$abc$159056$n4106_1 I2=$false I3=$false O=$abc$159056$n1292 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[46] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4105_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4107_1 I2=$abc$159056$n4015_1 I3=$abc$159056$n4109_1 O=$abc$159056$n4106_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3869 I1=$abc$159056$n4108 I2=$false I3=$false O=$abc$159056$n4107_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3876 I1=$abc$159056$n3879 I2=$abc$159056$n3873 I3=$abc$159056$n3882 O=$abc$159056$n4108 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[110] I1=murax.system_drygascon128.core.c[174] I2=$abc$159056$n4110_1 I3=$abc$159056$n4111 O=$abc$159056$n4109_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[46] I1=murax.system_drygascon128.core.c[302] I2=$false I3=$false O=$abc$159056$n4110_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[46] I1=murax.system_drygascon128.core.c[302] I2=murax.system_drygascon128.core.c[110] I3=murax.system_drygascon128.core.c[238] O=$abc$159056$n4111 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4113_1 I1=$abc$159056$n4114 I2=$false I3=$false O=$abc$159056$n1295 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[14] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4113_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4020 I2=$abc$159056$n4115_1 I3=$abc$159056$n4117 O=$abc$159056$n4114 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3310 I1=$abc$159056$n3313 I2=$abc$159056$n3300 I3=$abc$159056$n4116_1 O=$abc$159056$n4115_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n3301 I1=$abc$159056$n3304 I2=$abc$159056$n3310 I3=$abc$159056$n3307 O=$abc$159056$n4116_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[119] I1=murax.system_drygascon128.core.c[183] I2=$abc$159056$n3864 I3=$abc$159056$n4118 O=$abc$159056$n4117 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[55] I1=murax.system_drygascon128.core.c[311] I2=murax.system_drygascon128.core.c[119] I3=murax.system_drygascon128.core.c[247] O=$abc$159056$n4118 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4120 I1=$abc$159056$n4121_1 I2=$false I3=$false O=$abc$159056$n1298 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[45] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4120 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4122 I2=$abc$159056$n4051_1 I3=$abc$159056$n4140 O=$abc$159056$n4121_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4123 I1=$abc$159056$n4136_1 I2=$false I3=$false O=$abc$159056$n4122 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4133 I1=$abc$159056$n4130_1 I2=$abc$159056$n4127 I3=$abc$159056$n4124 O=$abc$159056$n4123 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4125_1 I1=$abc$159056$n4126 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[215] O=$abc$159056$n4124 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[119] I1=murax.system_drygascon128.core.x[55] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4125_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[87] I1=murax.system_drygascon128.core.x[23] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4126 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4128 I1=$abc$159056$n4129 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[87] O=$abc$159056$n4127 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[119] I1=murax.system_drygascon128.core.x[55] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4128 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[87] I1=murax.system_drygascon128.core.x[23] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4129 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4131 I1=$abc$159056$n4132_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[279] O=$abc$159056$n4130_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[119] I1=murax.system_drygascon128.core.x[55] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4131 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[87] I1=murax.system_drygascon128.core.x[23] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4132_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4134_1 I1=$abc$159056$n4135_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[23] O=$abc$159056$n4133 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[55] I1=murax.system_drygascon128.core.x[119] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4134_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[23] I1=murax.system_drygascon128.core.x[87] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4135_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4127 I1=$abc$159056$n4137_1 I2=$abc$159056$n4130_1 I3=$abc$159056$n4133 O=$abc$159056$n4136_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n4138 I1=$abc$159056$n4139_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[151] O=$abc$159056$n4137_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[119] I1=murax.system_drygascon128.core.x[55] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n4138 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[87] I1=murax.system_drygascon128.core.x[23] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n4139_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[109] I1=murax.system_drygascon128.core.c[173] I2=$abc$159056$n4141 I3=$abc$159056$n4142_1 O=$abc$159056$n4140 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[45] I1=murax.system_drygascon128.core.c[301] I2=$false I3=$false O=$abc$159056$n4141 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[45] I1=murax.system_drygascon128.core.c[301] I2=murax.system_drygascon128.core.c[109] I3=murax.system_drygascon128.core.c[237] O=$abc$159056$n4142_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4144 I1=$abc$159056$n4145_1 I2=$false I3=$false O=$abc$159056$n1301 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[13] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4144 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4056 I2=$abc$159056$n4146_1 I3=$abc$159056$n4148 O=$abc$159056$n4145_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3891 I1=$abc$159056$n4147 I2=$false I3=$false O=$abc$159056$n4146_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3898_1 I1=$abc$159056$n3901_1 I2=$abc$159056$n3895_1 I3=$abc$159056$n3904_1 O=$abc$159056$n4147 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[118] I1=murax.system_drygascon128.core.c[182] I2=$abc$159056$n3886_1 I3=$abc$159056$n4149_1 O=$abc$159056$n4148 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[54] I1=murax.system_drygascon128.core.c[310] I2=murax.system_drygascon128.core.c[118] I3=murax.system_drygascon128.core.c[246] O=$abc$159056$n4149_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4151 I1=$abc$159056$n4152_1 I2=$false I3=$false O=$abc$159056$n1304 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[44] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4151 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4153_1 I2=$abc$159056$n4069_1 I3=$abc$159056$n4171 O=$abc$159056$n4152_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4154 I1=$abc$159056$n4167 I2=$false I3=$false O=$abc$159056$n4153_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4164 I1=$abc$159056$n4161_1 I2=$abc$159056$n4158_1 I3=$abc$159056$n4155 O=$abc$159056$n4154 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4156_1 I1=$abc$159056$n4157 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[214] O=$abc$159056$n4155 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[118] I1=murax.system_drygascon128.core.x[54] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4156_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[86] I1=murax.system_drygascon128.core.x[22] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4157 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4159_1 I1=$abc$159056$n4160 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[86] O=$abc$159056$n4158_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[118] I1=murax.system_drygascon128.core.x[54] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4159_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[86] I1=murax.system_drygascon128.core.x[22] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4160 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4162_1 I1=$abc$159056$n4163 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[278] O=$abc$159056$n4161_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[118] I1=murax.system_drygascon128.core.x[54] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4162_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[86] I1=murax.system_drygascon128.core.x[22] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4163 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4165_1 I1=$abc$159056$n4166_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[22] O=$abc$159056$n4164 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[54] I1=murax.system_drygascon128.core.x[118] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4165_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[22] I1=murax.system_drygascon128.core.x[86] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4166_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4158_1 I1=$abc$159056$n4168 I2=$abc$159056$n4161_1 I3=$abc$159056$n4164 O=$abc$159056$n4167 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n4169_1 I1=$abc$159056$n4170 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[150] O=$abc$159056$n4168 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[118] I1=murax.system_drygascon128.core.x[54] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n4169_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[86] I1=murax.system_drygascon128.core.x[22] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n4170 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[108] I1=murax.system_drygascon128.core.c[172] I2=$abc$159056$n3823_1 I3=$abc$159056$n4172 O=$abc$159056$n4171 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[44] I1=murax.system_drygascon128.core.c[300] I2=murax.system_drygascon128.core.c[108] I3=murax.system_drygascon128.core.c[236] O=$abc$159056$n4172 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4174 I1=$abc$159056$n4175 I2=$false I3=$false O=$abc$159056$n1307 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[12] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4174 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4074 I2=$abc$159056$n4176_1 I3=$abc$159056$n4178_1 O=$abc$159056$n4175 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3830 I1=$abc$159056$n4177 I2=$false I3=$false O=$abc$159056$n4176_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n3837 I1=$abc$159056$n3840 I2=$abc$159056$n3834 I3=$abc$159056$n3843 O=$abc$159056$n4177 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[117] I1=murax.system_drygascon128.core.c[181] I2=$abc$159056$n4179_1 I3=$abc$159056$n4180 O=$abc$159056$n4178_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[53] I1=murax.system_drygascon128.core.c[309] I2=$false I3=$false O=$abc$159056$n4179_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[53] I1=murax.system_drygascon128.core.c[309] I2=murax.system_drygascon128.core.c[117] I3=murax.system_drygascon128.core.c[245] O=$abc$159056$n4180 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4182_1 I1=$abc$159056$n4183 I2=$false I3=$false O=$abc$159056$n1310 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[40] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4182_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4049 I2=$abc$159056$n4148 I3=$abc$159056$n4184 O=$abc$159056$n4183 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[104] I1=murax.system_drygascon128.core.c[168] I2=$abc$159056$n4185_1 I3=$abc$159056$n4186_1 O=$abc$159056$n4184 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[40] I1=murax.system_drygascon128.core.c[296] I2=$false I3=$false O=$abc$159056$n4185_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[40] I1=murax.system_drygascon128.core.c[296] I2=murax.system_drygascon128.core.c[104] I3=murax.system_drygascon128.core.c[232] O=$abc$159056$n4186_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4188 I1=$abc$159056$n4189 I2=$false I3=$false O=$abc$159056$n1313 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[10] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4188 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4107_1 I2=$abc$159056$n4190 I3=$abc$159056$n3995 O=$abc$159056$n4189 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4191 I1=$abc$159056$n4204_1 I2=$false I3=$false O=$abc$159056$n4190 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4201_1 I1=$abc$159056$n4198_1 I2=$abc$159056$n4195_1 I3=$abc$159056$n4192_1 O=$abc$159056$n4191 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4193_1 I1=$abc$159056$n4194 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[202] O=$abc$159056$n4192_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[106] I1=murax.system_drygascon128.core.x[42] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4193_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[74] I1=murax.system_drygascon128.core.x[10] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4194 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4196_1 I1=$abc$159056$n4197 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[74] O=$abc$159056$n4195_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[106] I1=murax.system_drygascon128.core.x[42] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4196_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[74] I1=murax.system_drygascon128.core.x[10] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4197 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4199_1 I1=$abc$159056$n4200 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[266] O=$abc$159056$n4198_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[106] I1=murax.system_drygascon128.core.x[42] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4199_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[74] I1=murax.system_drygascon128.core.x[10] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4200 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4202_1 I1=$abc$159056$n4203 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[10] O=$abc$159056$n4201_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[42] I1=murax.system_drygascon128.core.x[106] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4202_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[10] I1=murax.system_drygascon128.core.x[74] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4203 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4195_1 I1=$abc$159056$n4205_1 I2=$abc$159056$n4198_1 I3=$abc$159056$n4201_1 O=$abc$159056$n4204_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n4206 I1=$abc$159056$n4207_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[138] O=$abc$159056$n4205_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[106] I1=murax.system_drygascon128.core.x[42] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n4206 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[74] I1=murax.system_drygascon128.core.x[10] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n4207_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4209 I1=$abc$159056$n4210_1 I2=$false I3=$false O=$abc$159056$n1316 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[38] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4209 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4085 I2=$abc$159056$n3940_1 I3=$abc$159056$n4211_1 O=$abc$159056$n4210_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[102] I1=murax.system_drygascon128.core.c[166] I2=$abc$159056$n4212 I3=$abc$159056$n4213_1 O=$abc$159056$n4211_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[38] I1=murax.system_drygascon128.core.c[294] I2=$false I3=$false O=$abc$159056$n4212 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[38] I1=murax.system_drygascon128.core.c[294] I2=murax.system_drygascon128.core.c[102] I3=murax.system_drygascon128.core.c[230] O=$abc$159056$n4213_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4215 I1=$abc$159056$n4216_1 I2=$false I3=$false O=$abc$159056$n1319 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[9] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4215 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4122 I2=$abc$159056$n4217_1 I3=$abc$159056$n4022 O=$abc$159056$n4216_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4218 I1=$abc$159056$n4231 I2=$false I3=$false O=$abc$159056$n4217_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4228 I1=$abc$159056$n4225 I2=$abc$159056$n4222 I3=$abc$159056$n4219_1 O=$abc$159056$n4218 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4220_1 I1=$abc$159056$n4221 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[201] O=$abc$159056$n4219_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[105] I1=murax.system_drygascon128.core.x[41] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4220_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[73] I1=murax.system_drygascon128.core.x[9] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4221 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4223 I1=$abc$159056$n4224 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[73] O=$abc$159056$n4222 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[105] I1=murax.system_drygascon128.core.x[41] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4223 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[73] I1=murax.system_drygascon128.core.x[9] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4224 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4226 I1=$abc$159056$n4227 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[265] O=$abc$159056$n4225 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[105] I1=murax.system_drygascon128.core.x[41] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4226 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[73] I1=murax.system_drygascon128.core.x[9] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4227 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4229 I1=$abc$159056$n4230 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[9] O=$abc$159056$n4228 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[41] I1=murax.system_drygascon128.core.x[105] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4229 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[9] I1=murax.system_drygascon128.core.x[73] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4230 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4222 I1=$abc$159056$n4232 I2=$abc$159056$n4225 I3=$abc$159056$n4228 O=$abc$159056$n4231 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n4233 I1=$abc$159056$n4234_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[137] O=$abc$159056$n4232 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[105] I1=murax.system_drygascon128.core.x[41] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n4233 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[73] I1=murax.system_drygascon128.core.x[9] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n4234_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4236 I1=$abc$159056$n4237_1 I2=$false I3=$false O=$abc$159056$n1322 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[36] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4236 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4115_1 I2=$abc$159056$n4022 I3=$abc$159056$n4238 O=$abc$159056$n4237_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[100] I1=murax.system_drygascon128.core.c[164] I2=$abc$159056$n3801 I3=$abc$159056$n4239_1 O=$abc$159056$n4238 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[36] I1=murax.system_drygascon128.core.c[292] I2=murax.system_drygascon128.core.c[100] I3=murax.system_drygascon128.core.c[228] O=$abc$159056$n4239_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4241 I1=$abc$159056$n4242_1 I2=$false I3=$false O=$abc$159056$n1325 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[8] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4241 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4153_1 I2=$abc$159056$n4243 I3=$abc$159056$n4058 O=$abc$159056$n4242_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4244_1 I1=$abc$159056$n4257 I2=$false I3=$false O=$abc$159056$n4243 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4254 I1=$abc$159056$n4251 I2=$abc$159056$n4248 I3=$abc$159056$n4245 O=$abc$159056$n4244_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4246 I1=$abc$159056$n4247 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[200] O=$abc$159056$n4245 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[104] I1=murax.system_drygascon128.core.x[40] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4246 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[72] I1=murax.system_drygascon128.core.x[8] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4247 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4249 I1=$abc$159056$n4250_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[72] O=$abc$159056$n4248 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[104] I1=murax.system_drygascon128.core.x[40] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4249 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[72] I1=murax.system_drygascon128.core.x[8] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4250_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4252 I1=$abc$159056$n4253 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[264] O=$abc$159056$n4251 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[104] I1=murax.system_drygascon128.core.x[40] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4252 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[72] I1=murax.system_drygascon128.core.x[8] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4253 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4255 I1=$abc$159056$n4256 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[8] O=$abc$159056$n4254 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[40] I1=murax.system_drygascon128.core.x[104] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4255 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[8] I1=murax.system_drygascon128.core.x[72] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4256 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4248 I1=$abc$159056$n4258 I2=$abc$159056$n4251 I3=$abc$159056$n4254 O=$abc$159056$n4257 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n4259 I1=$abc$159056$n4260 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[136] O=$abc$159056$n4258 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[104] I1=murax.system_drygascon128.core.x[40] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n4259 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[72] I1=murax.system_drygascon128.core.x[8] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n4260 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4262 I1=$abc$159056$n4263 I2=$false I3=$false O=$abc$159056$n1328 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[7] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4262 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4264 I2=$abc$159056$n4283 I3=$abc$159056$n4076 O=$abc$159056$n4263 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4265_1 I1=$abc$159056$n4279 I2=$false I3=$false O=$abc$159056$n4264 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4270 I1=$abc$159056$n7722 I2=$abc$159056$n4273 I3=$abc$159056$n4276 O=$abc$159056$n4265_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n4271 I1=$abc$159056$n4272_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[71] O=$abc$159056$n4270 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[103] I1=murax.system_drygascon128.core.x[39] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4271 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[71] I1=murax.system_drygascon128.core.x[7] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4272_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4274 I1=$abc$159056$n4275 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[263] O=$abc$159056$n4273 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[103] I1=murax.system_drygascon128.core.x[39] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4274 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[71] I1=murax.system_drygascon128.core.x[7] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4275 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4277_1 I1=$abc$159056$n4278 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[7] O=$abc$159056$n4276 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[39] I1=murax.system_drygascon128.core.x[103] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4277_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[7] I1=murax.system_drygascon128.core.x[71] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4278 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4276 I1=$abc$159056$n4273 I2=$abc$159056$n4270 I3=$abc$159056$n4280 O=$abc$159056$n4279 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4281 I1=$abc$159056$n4282_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[199] O=$abc$159056$n4280 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[103] I1=murax.system_drygascon128.core.x[39] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4281 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[71] I1=murax.system_drygascon128.core.x[7] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4282_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4295 I1=$abc$159056$n4291 I2=$abc$159056$n4298_1 I3=$abc$159056$n4284 O=$abc$159056$n4283 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000110111110 .gate SB_LUT4 I0=$abc$159056$n4285 I1=$abc$159056$n4288 I2=$false I3=$false O=$abc$159056$n4284 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4286 I1=$abc$159056$n4287 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[277] O=$abc$159056$n4285 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[117] I1=murax.system_drygascon128.core.x[53] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4286 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[85] I1=murax.system_drygascon128.core.x[21] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4287 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4289 I1=$abc$159056$n4290 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[213] O=$abc$159056$n4288 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[117] I1=murax.system_drygascon128.core.x[53] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4289 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[85] I1=murax.system_drygascon128.core.x[21] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4290 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4285 I1=$abc$159056$n4292 I2=$false I3=$false O=$abc$159056$n4291 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n4293 I1=$abc$159056$n4294 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[21] O=$abc$159056$n4292 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[53] I1=murax.system_drygascon128.core.x[117] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4293 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[21] I1=murax.system_drygascon128.core.x[85] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4294 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4296_1 I1=$abc$159056$n4297 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[85] O=$abc$159056$n4295 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[117] I1=murax.system_drygascon128.core.x[53] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4296_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[85] I1=murax.system_drygascon128.core.x[21] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4297 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4299 I1=$abc$159056$n4300_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[149] O=$abc$159056$n4298_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[117] I1=murax.system_drygascon128.core.x[53] I2=murax.system_drygascon128.core.d[5] I3=murax.system_drygascon128.core.d[4] O=$abc$159056$n4299 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[85] I1=murax.system_drygascon128.core.x[21] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n4300_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4302_1 I1=$abc$159056$n4303_1 I2=$false I3=$false O=$abc$159056$n1331 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[32] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4302_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4190 I2=$abc$159056$n4025 I3=$abc$159056$n4109_1 O=$abc$159056$n4303_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4305 I1=$abc$159056$n4306_1 I2=$false I3=$false O=$abc$159056$n1334 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[6] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4305 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4307 I2=$abc$159056$n3970_1 I3=$abc$159056$n4094 O=$abc$159056$n4306_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4308_1 I1=$abc$159056$n4322 I2=$false I3=$false O=$abc$159056$n4307 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4313 I1=$abc$159056$n7725 I2=$abc$159056$n4316 I3=$abc$159056$n4319 O=$abc$159056$n4308_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n4314 I1=$abc$159056$n4315 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[70] O=$abc$159056$n4313 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[102] I1=murax.system_drygascon128.core.x[38] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4314 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[70] I1=murax.system_drygascon128.core.x[6] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4315 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4317 I1=$abc$159056$n4318 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[6] O=$abc$159056$n4316 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[38] I1=murax.system_drygascon128.core.x[102] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4317 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[6] I1=murax.system_drygascon128.core.x[70] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4318 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4320 I1=$abc$159056$n4321_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[262] O=$abc$159056$n4319 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[102] I1=murax.system_drygascon128.core.x[38] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4320 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[70] I1=murax.system_drygascon128.core.x[6] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4321_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4316 I1=$abc$159056$n4319 I2=$abc$159056$n4313 I3=$abc$159056$n4323 O=$abc$159056$n4322 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4324 I1=$abc$159056$n4325_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[198] O=$abc$159056$n4323 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[102] I1=murax.system_drygascon128.core.x[38] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4324 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[70] I1=murax.system_drygascon128.core.x[6] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4325_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4327 I1=$abc$159056$n4328_1 I2=$false I3=$false O=$abc$159056$n1337 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[30] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4327 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3938 I2=$abc$159056$n4176_1 I3=$abc$159056$n4329_1 O=$abc$159056$n4328_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[103] I1=murax.system_drygascon128.core.c[167] I2=$abc$159056$n4330_1 I3=$abc$159056$n4331 O=$abc$159056$n4329_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[39] I1=murax.system_drygascon128.core.c[295] I2=$false I3=$false O=$abc$159056$n4330_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[39] I1=murax.system_drygascon128.core.c[295] I2=murax.system_drygascon128.core.c[103] I3=murax.system_drygascon128.core.c[231] O=$abc$159056$n4331 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4333 I1=$abc$159056$n4334 I2=$false I3=$false O=$abc$159056$n1340 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[5] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4333 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4335 I2=$abc$159056$n4009_1 I3=$abc$159056$n4109_1 O=$abc$159056$n4334 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4336 I1=$abc$159056$n4350 I2=$false I3=$false O=$abc$159056$n4335 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4341 I1=$abc$159056$n7728 I2=$abc$159056$n4344 I3=$abc$159056$n4347 O=$abc$159056$n4336 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n4342 I1=$abc$159056$n4343 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[69] O=$abc$159056$n4341 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[101] I1=murax.system_drygascon128.core.x[37] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4342 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[69] I1=murax.system_drygascon128.core.x[5] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4343 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4345 I1=$abc$159056$n4346_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[261] O=$abc$159056$n4344 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[101] I1=murax.system_drygascon128.core.x[37] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4345 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[69] I1=murax.system_drygascon128.core.x[5] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4346_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4348 I1=$abc$159056$n4349 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[5] O=$abc$159056$n4347 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[37] I1=murax.system_drygascon128.core.x[101] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4348 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[5] I1=murax.system_drygascon128.core.x[69] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4349 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4347 I1=$abc$159056$n4344 I2=$abc$159056$n4341 I3=$abc$159056$n4351_1 O=$abc$159056$n4350 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4352 I1=$abc$159056$n4353 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[197] O=$abc$159056$n4351_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[101] I1=murax.system_drygascon128.core.x[37] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4352 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[69] I1=murax.system_drygascon128.core.x[5] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4353 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4355_1 I1=$abc$159056$n4356 I2=$false I3=$false O=$abc$159056$n1343 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[4] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4355_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4049 I2=$abc$159056$n4357 I3=$abc$159056$n4140 O=$abc$159056$n4356 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3252 I1=$abc$159056$n7687 I2=$abc$159056$n4358 I3=$abc$159056$n4362 O=$abc$159056$n4357 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n4359 I1=$abc$159056$n3258 I2=$abc$159056$n3252 I3=$abc$159056$n3255 O=$abc$159056$n4358 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4360 I1=$abc$159056$n4361 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[4] O=$abc$159056$n4359 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[36] I1=murax.system_drygascon128.core.x[100] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4360 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[4] I1=murax.system_drygascon128.core.x[68] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4361 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n3258 I1=$abc$159056$n4359 I2=$false I3=$false O=$abc$159056$n4362 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4364 I1=$abc$159056$n4365 I2=$false I3=$false O=$abc$159056$n1346 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[39] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4364 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4065 I2=$abc$159056$n4178_1 I3=$abc$159056$n4329_1 O=$abc$159056$n4365 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4367 I1=$abc$159056$n4368 I2=$false I3=$false O=$abc$159056$n1349 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[2] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4367 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3951 I2=$abc$159056$n4085 I3=$abc$159056$n4369 O=$abc$159056$n4368 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[107] I1=murax.system_drygascon128.core.c[171] I2=$abc$159056$n4370 I3=$abc$159056$n4371 O=$abc$159056$n4369 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[43] I1=murax.system_drygascon128.core.c[299] I2=$false I3=$false O=$abc$159056$n4370 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[43] I1=murax.system_drygascon128.core.c[299] I2=murax.system_drygascon128.core.c[107] I3=murax.system_drygascon128.core.c[235] O=$abc$159056$n4371 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4373 I1=$abc$159056$n4374 I2=$false I3=$false O=$abc$159056$n1352 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[31] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4373 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4067 I2=$abc$159056$n4146_1 I3=$abc$159056$n4184 O=$abc$159056$n4374 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4376 I1=$abc$159056$n4377 I2=$false I3=$false O=$abc$159056$n1355 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[1] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4376 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4003_1 I2=$abc$159056$n4100 I3=$abc$159056$n4378_1 O=$abc$159056$n4377 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[106] I1=murax.system_drygascon128.core.c[170] I2=$abc$159056$n4379 I3=$abc$159056$n4380_1 O=$abc$159056$n4378_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[42] I1=murax.system_drygascon128.core.c[298] I2=$false I3=$false O=$abc$159056$n4379 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[42] I1=murax.system_drygascon128.core.c[298] I2=murax.system_drygascon128.core.c[106] I3=murax.system_drygascon128.core.c[234] O=$abc$159056$n4380_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4382 I1=$abc$159056$n4383 I2=$false I3=$false O=$abc$159056$n1358 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[41] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4382 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4009_1 I2=$abc$159056$n4117 I3=$abc$159056$n4384_1 O=$abc$159056$n4383 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[105] I1=murax.system_drygascon128.core.c[169] I2=$abc$159056$n4385 I3=$abc$159056$n4386 O=$abc$159056$n4384_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[41] I1=murax.system_drygascon128.core.c[297] I2=$false I3=$false O=$abc$159056$n4385 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[41] I1=murax.system_drygascon128.core.c[297] I2=murax.system_drygascon128.core.c[105] I3=murax.system_drygascon128.core.c[233] O=$abc$159056$n4386 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4388_1 I1=$abc$159056$n4389 I2=$false I3=$false O=$abc$159056$n1361 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[0] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4388_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4030_1 I2=$abc$159056$n4115_1 I3=$abc$159056$n4384_1 O=$abc$159056$n4389 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4391 I1=$abc$159056$n4392 I2=$false I3=$false O=$abc$159056$n1364 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[33] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4391 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4393 I2=$abc$159056$n3997_1 I3=$abc$159056$n4094 O=$abc$159056$n4392 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3816 I1=$abc$159056$n3819 I2=$abc$159056$n3806 I3=$abc$159056$n4394 O=$abc$159056$n4393 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n3807 I1=$abc$159056$n3810 I2=$abc$159056$n3816 I3=$abc$159056$n3813 O=$abc$159056$n4394 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[125] I1=$abc$159056$n4403 I2=$abc$159056$n4396_1 I3=$abc$159056$n4400_1 O=$abc$159056$n1369 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111111000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[125] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4396_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4398 I1=$abc$159056$n3795 I2=$false I3=$false O=$abc$159056$n4397_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3205_1 I1=$abc$159056$n4399_1 I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I3=$false O=$abc$159056$n4398 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3210 I1=$abc$159056$n3530 I2=$false I3=$false O=$abc$159056$n4399_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.r[125] I2=murax.system_drygascon128.core.c[125] I3=murax.system_drygascon128.core.c[157] O=$abc$159056$n4400_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[1] I1=$abc$159056$n4402_1 I2=murax.system_drygascon128.core.state[3] I3=$false O=$abc$159056$n4401_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=$abc$159056$n3936 I1=$abc$159056$n3280 I2=$abc$159056$n9984 I3=murax.system_drygascon128.core.absorb O=$abc$159056$n4402_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000010001111 .gate SB_LUT4 I0=$abc$159056$n4402_1 I1=murax.system_drygascon128.core.state[1] I2=$false I3=$false O=$abc$159056$n4403 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n4405 I1=$abc$159056$n4406 I2=$false I3=$false O=$abc$159056$n1372 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[37] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4405 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4100 I2=$abc$159056$n3995 I3=$abc$159056$n4407 O=$abc$159056$n4406 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[101] I1=murax.system_drygascon128.core.c[165] I2=$abc$159056$n4408 I3=$abc$159056$n4409_1 O=$abc$159056$n4407 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[37] I1=murax.system_drygascon128.core.c[293] I2=$false I3=$false O=$abc$159056$n4408 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[37] I1=murax.system_drygascon128.core.c[293] I2=murax.system_drygascon128.core.c[101] I3=murax.system_drygascon128.core.c[229] O=$abc$159056$n4409_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[124] I1=$abc$159056$n4403 I2=$abc$159056$n4411 I3=$abc$159056$n4412 O=$abc$159056$n1377 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111111000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[124] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4411 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.r[124] I2=murax.system_drygascon128.core.c[124] I3=murax.system_drygascon128.core.c[156] O=$abc$159056$n4412 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4414 I1=$abc$159056$n4415_1 I2=$abc$159056$n4416_1 I3=$false O=$abc$159056$n1382 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11101111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[119] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4414 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.r[119] I2=murax.system_drygascon128.core.c[119] I3=murax.system_drygascon128.core.c[151] O=$abc$159056$n4415_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3707 I1=murax.system_drygascon128.ds[1] I2=$abc$159056$n4403 I3=murax.system_drygascon128.core.r[119] O=$abc$159056$n4416_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[117] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4418_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[3] I1=murax.system_drygascon128.core.state[1] I2=$false I3=$false O=$abc$159056$n4422 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[115] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4424 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[113] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4429 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[111] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4434 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[109] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4440_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[107] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4445 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[105] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4450 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[99] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4455_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[97] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4460 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[95] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4465_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4398 I1=$abc$159056$n3279 I2=$abc$159056$n3280 I3=$false O=$abc$159056$n4466 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[93] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4471_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[91] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4477 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4482 I1=$abc$159056$n4483 I2=$abc$159056$n4484 I3=$false O=$abc$159056$n1471 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11101111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[120] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4482 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.r[120] I2=murax.system_drygascon128.core.c[120] I3=murax.system_drygascon128.core.c[152] O=$abc$159056$n4483 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3707 I1=murax.system_drygascon128.ds[2] I2=$abc$159056$n4403 I3=murax.system_drygascon128.core.r[120] O=$abc$159056$n4484 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[118] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4486 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[116] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4491 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[114] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4496_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[112] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4501 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[110] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4506_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[108] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4511 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[104] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4516 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[102] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4521 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[100] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4526_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[98] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4531_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[96] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4536_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[94] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4542 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[92] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4547 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[90] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4552_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[89] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4557 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[88] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4562_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[86] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4567_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[85] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4572 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[83] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4578 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[82] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4583_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[81] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4588_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[80] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4593 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[79] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4598_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[78] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4603_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[77] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4608 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[76] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4613 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[75] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4618 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[74] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4623_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[73] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4628_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[82] I1=$abc$159056$n3706_1 I2=$abc$159056$n4633 I3=$abc$159056$n4634_1 O=$abc$159056$n1679 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[72] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4633 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n4636 I3=murax.system_drygascon128.core.r[72] O=$abc$159056$n4634_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[72] I1=murax.system_drygascon128.core.c[232] I2=$false I3=$false O=$abc$159056$n4636 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[81] I1=$abc$159056$n3706_1 I2=$abc$159056$n4638_1 I3=$abc$159056$n4639 O=$abc$159056$n1686 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[71] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4638_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n4641_1 I3=murax.system_drygascon128.core.r[71] O=$abc$159056$n4639 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[71] I1=murax.system_drygascon128.core.c[231] I2=$false I3=$false O=$abc$159056$n4641_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[69] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4643_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[67] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4648 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[66] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4654 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[65] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4659_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[64] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n4664_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[63] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4669 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4398 I1=$abc$159056$n3280 I2=$abc$159056$n3936 I3=$false O=$abc$159056$n4670_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[62] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4675 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[61] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4680_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[60] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4685_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[59] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4690 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[68] I1=$abc$159056$n3706_1 I2=$abc$159056$n4695_1 I3=$abc$159056$n4696 O=$abc$159056$n1763 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[58] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4695_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4422 I1=$abc$159056$n4403 I2=$abc$159056$n4697_1 I3=murax.system_drygascon128.core.r[58] O=$abc$159056$n4696 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011001000001111 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.c[58] I2=murax.system_drygascon128.core.c[218] I3=$false O=$abc$159056$n4697_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[57] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4700_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[56] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4705 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[24] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4710_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4398 I1=$abc$159056$n3949_1 I2=$false I3=$false O=$abc$159056$n4711 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[55] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4716_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[23] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4721_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[54] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4726 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[22] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4731_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[53] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4736_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[21] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4741 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[20] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4746_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[61] I1=$abc$159056$n3706_1 I2=$abc$159056$n4751_1 I3=$abc$159056$n4752_1 O=$abc$159056$n1840 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[51] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4751_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4422 I1=$abc$159056$n4403 I2=$abc$159056$n4753 I3=murax.system_drygascon128.core.r[51] O=$abc$159056$n4752_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011001000001111 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.c[51] I2=murax.system_drygascon128.core.c[211] I3=$false O=$abc$159056$n4753 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[19] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4756 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[50] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4761_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[18] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4766_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[49] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4771 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[27] I1=$abc$159056$n3706_1 I2=$abc$159056$n4776_1 I3=$abc$159056$n4777 O=$abc$159056$n1875 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[17] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4776_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n4779_1 I3=murax.system_drygascon128.core.r[17] O=$abc$159056$n4777 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[17] I1=murax.system_drygascon128.core.c[177] I2=$false I3=$false O=$abc$159056$n4779_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[48] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4781_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[16] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4786 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[47] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4791_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[15] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4796_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[46] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4801 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[14] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4806_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[45] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4811_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[13] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4816_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[44] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4821_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[12] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4826_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[53] I1=$abc$159056$n3706_1 I2=$abc$159056$n4831 I3=$abc$159056$n4832 O=$abc$159056$n1952 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[43] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4831 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n4834 I3=murax.system_drygascon128.core.r[43] O=$abc$159056$n4832 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[43] I1=murax.system_drygascon128.core.c[203] I2=$false I3=$false O=$abc$159056$n4834 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[21] I1=$abc$159056$n3706_1 I2=$abc$159056$n4836_1 I3=$abc$159056$n4837 O=$abc$159056$n1959 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[11] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4836_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n4839_1 I3=murax.system_drygascon128.core.r[11] O=$abc$159056$n4837 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[11] I1=murax.system_drygascon128.core.c[171] I2=$false I3=$false O=$abc$159056$n4839_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[42] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4841_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[10] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4846_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[51] I1=$abc$159056$n3706_1 I2=$abc$159056$n4852_1 I3=$abc$159056$n4853_1 O=$abc$159056$n1980 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[41] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4852_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n4855_1 I3=murax.system_drygascon128.core.r[41] O=$abc$159056$n4853_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[41] I1=murax.system_drygascon128.core.c[201] I2=$false I3=$false O=$abc$159056$n4855_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[9] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4857_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[40] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4862_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[8] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4867_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[38] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4872_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[36] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4877_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[6] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4882_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[5] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4887_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[32] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4892_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[4] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4897_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[3] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4902_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[28] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4907_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[1] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4912_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[39] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4917_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[0] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4922_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[126] I1=$abc$159056$n4403 I2=$abc$159056$n4927_1 I3=$abc$159056$n4928_1 O=$abc$159056$n2083 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111111000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[126] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4927_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.r[126] I2=murax.system_drygascon128.core.c[126] I3=murax.system_drygascon128.core.c[158] O=$abc$159056$n4928_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4930_1 I1=$abc$159056$n4933_1 I2=$false I3=$false O=$abc$159056$n2086 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[319] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4930_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3204 I1=$abc$159056$n3936 I2=$abc$159056$n4932_1 I3=$false O=$abc$159056$n4931_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.cnt[3] I2=$false I3=$false O=$abc$159056$n4932_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4934_1 I2=$abc$159056$n3996 I3=$abc$159056$n4061 O=$abc$159056$n4933_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4944 I1=$abc$159056$n4941 I2=$abc$159056$n4938_1 I3=$abc$159056$n4935 O=$abc$159056$n4934_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010001101011100 .gate SB_LUT4 I0=$abc$159056$n4936_1 I1=$abc$159056$n4937_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[195] O=$abc$159056$n4935 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[99] I1=murax.system_drygascon128.core.x[35] I2=murax.system_drygascon128.core.d[7] I3=murax.system_drygascon128.core.d[6] O=$abc$159056$n4936_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[67] I1=murax.system_drygascon128.core.x[3] I2=murax.system_drygascon128.core.d[6] I3=murax.system_drygascon128.core.d[7] O=$abc$159056$n4937_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4939_1 I1=$abc$159056$n4940 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[67] O=$abc$159056$n4938_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[99] I1=murax.system_drygascon128.core.x[35] I2=murax.system_drygascon128.core.d[3] I3=murax.system_drygascon128.core.d[2] O=$abc$159056$n4939_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[67] I1=murax.system_drygascon128.core.x[3] I2=murax.system_drygascon128.core.d[2] I3=murax.system_drygascon128.core.d[3] O=$abc$159056$n4940 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4942 I1=$abc$159056$n4943_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[259] O=$abc$159056$n4941 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[99] I1=murax.system_drygascon128.core.x[35] I2=murax.system_drygascon128.core.d[9] I3=murax.system_drygascon128.core.d[8] O=$abc$159056$n4942 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[67] I1=murax.system_drygascon128.core.x[3] I2=murax.system_drygascon128.core.d[8] I3=murax.system_drygascon128.core.d[9] O=$abc$159056$n4943_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101000001100 .gate SB_LUT4 I0=$abc$159056$n4945_1 I1=$abc$159056$n4946_1 I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[3] O=$abc$159056$n4944 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[35] I1=murax.system_drygascon128.core.x[99] I2=murax.system_drygascon128.core.d[1] I3=murax.system_drygascon128.core.d[0] O=$abc$159056$n4945_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[3] I1=murax.system_drygascon128.core.x[67] I2=murax.system_drygascon128.core.d[0] I3=murax.system_drygascon128.core.d[1] O=$abc$159056$n4946_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n4948_1 I1=$abc$159056$n4949_1 I2=$false I3=$false O=$abc$159056$n2089 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[318] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n4948_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3966 I2=$abc$159056$n4024_1 I3=$abc$159056$n4081_1 O=$abc$159056$n4949_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[37] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4951_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[123] I1=$abc$159056$n4403 I2=$abc$159056$n4957_1 I3=$abc$159056$n4958_1 O=$abc$159056$n2101 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111111000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[123] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4957_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.r[123] I2=murax.system_drygascon128.core.c[123] I3=murax.system_drygascon128.core.c[155] O=$abc$159056$n4958_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[122] I1=$abc$159056$n4403 I2=$abc$159056$n4960_1 I3=$abc$159056$n4961_1 O=$abc$159056$n2106 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111111000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[122] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n4960_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.r[122] I2=murax.system_drygascon128.core.c[122] I3=murax.system_drygascon128.core.c[154] O=$abc$159056$n4961_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[33] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n4963_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[25] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n4968_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4978_1 I1=$abc$159056$n4973_1 I2=$abc$159056$n3660 I3=$abc$159056$n4985_1 O=$abc$159056$n2128 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000011111111 .gate SB_LUT4 I0=$abc$159056$n4817 I1=murax.system_drygascon128.core.cnt[0] I2=$abc$159056$n4974_1 I3=$abc$159056$n4977_1 O=$abc$159056$n4973_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010100000000 .gate SB_LUT4 I0=$abc$159056$n4976_1 I1=$abc$159056$n4975_1 I2=$false I3=$false O=$abc$159056$n4974_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n4399_1 I1=$abc$159056$n3496_1 I2=$abc$159056$n3205_1 I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write O=$abc$159056$n4975_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001111111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core_read I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I2=$abc$159056$n3205_1 I3=$abc$159056$n4399_1 O=$abc$159056$n4976_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I1=murax.system_drygascon128.core_read I2=$abc$159056$n3205_1 I3=$abc$159056$n3209 O=$abc$159056$n4977_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111111111111 .gate SB_LUT4 I0=$abc$159056$n4830 I1=$abc$159056$n4819 I2=$abc$159056$n4977_1 I3=$abc$159056$n4979_1 O=$abc$159056$n4978_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000001100000101 .gate SB_LUT4 I0=$abc$159056$n4825 I1=$abc$159056$n67 I2=$abc$159056$n4980_1 I3=$abc$159056$n9974 O=$abc$159056$n4979_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000010111111 .gate SB_LUT4 I0=$abc$159056$n4821 I1=$abc$159056$n4819 I2=$abc$159056$n4983_1 I3=$false O=$abc$159056$n4980_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n3386 I1=$abc$159056$n55 I2=$false I3=$false O=$abc$159056$n4821 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n4818 I1=$abc$159056$n4817 I2=$abc$159056$n3386 I3=$false O=$abc$159056$n4819 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n4826 I1=$abc$159056$n9970 I2=$abc$159056$n3386 I3=$abc$159056$n64 O=$abc$159056$n4983_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n4824 I1=$abc$159056$n59 I2=$abc$159056$n3386 I3=$false O=$abc$159056$n4825 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_drygascon128.core.absorb I1=murax.system_drygascon128.core.state[2] I2=$abc$159056$n4986_1 I3=$abc$159056$n8429 O=$abc$159056$n4985_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000001101011111 .gate SB_LUT4 I0=$abc$159056$n3694_1 I1=murax.system_drygascon128.core.state[1] I2=$false I3=$false O=$abc$159056$n4986_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n4990_1 I1=$abc$159056$n64 I2=$abc$159056$n4988_1 I3=$abc$159056$n4989_1 O=$abc$159056$n2133 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111101000100 .gate SB_LUT4 I0=$abc$159056$n4974_1 I1=murax.system_drygascon128.core.cnt[0] I2=murax.system_drygascon128.core.cnt[1] I3=$abc$159056$n4977_1 O=$abc$159056$n4988_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101100000000 .gate SB_LUT4 I0=$abc$159056$n4977_1 I1=$abc$159056$n4979_1 I2=$abc$159056$n64 I3=$abc$159056$n3660 O=$abc$159056$n4989_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110101100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.absorb I1=$abc$159056$n4986_1 I2=murax.system_drygascon128.core.state[2] I3=$false O=$abc$159056$n4990_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001011 .gate SB_LUT4 I0=$abc$159056$n4990_1 I1=$abc$159056$n8430 I2=$abc$159056$n4992_1 I3=$abc$159056$n3660 O=$abc$159056$n2138 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111101000100 .gate SB_LUT4 I0=$abc$159056$n4977_1 I1=$abc$159056$n4993_1 I2=$abc$159056$n4821 I3=$abc$159056$n4994_1 O=$abc$159056$n4992_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000011101011 .gate SB_LUT4 I0=$abc$159056$n4979_1 I1=$abc$159056$n64 I2=$false I3=$false O=$abc$159056$n4993_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n4976_1 I1=$abc$159056$n4975_1 I2=$abc$159056$n4977_1 I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n4994_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n4990_1 I1=$abc$159056$n8431 I2=$abc$159056$n4996_1 I3=$false O=$abc$159056$n2143 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11110100 .gate SB_LUT4 I0=$abc$159056$n4998_1 I1=$abc$159056$n4997_1 I2=$abc$159056$n3660 I3=$false O=$abc$159056$n4996_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11100000 .gate SB_LUT4 I0=$abc$159056$n4976_1 I1=$abc$159056$n4975_1 I2=$abc$159056$n4977_1 I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n4997_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n4836 I1=$abc$159056$n67 I2=$abc$159056$n4977_1 I3=$abc$159056$n4979_1 O=$abc$159056$n4998_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[0] I3=$abc$159056$n5000_1 O=$abc$159056$n2146 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[0] I3=$false O=$abc$159056$n5000_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[1] I3=$abc$159056$n5002_1 O=$abc$159056$n2149 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[1] I3=$false O=$abc$159056$n5002_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[2] I3=$abc$159056$n5004_1 O=$abc$159056$n2152 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[2] I3=$false O=$abc$159056$n5004_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[3] I3=$abc$159056$n5006_1 O=$abc$159056$n2155 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[3] I3=$false O=$abc$159056$n5006_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[4] I3=$abc$159056$n5008_1 O=$abc$159056$n2158 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[4] I3=$false O=$abc$159056$n5008_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[5] I3=$abc$159056$n5010_1 O=$abc$159056$n2161 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[5] I3=$false O=$abc$159056$n5010_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[6] I3=$abc$159056$n5012_1 O=$abc$159056$n2164 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[6] I3=$false O=$abc$159056$n5012_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[7] I3=$abc$159056$n5014_1 O=$abc$159056$n2167 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[7] I3=$false O=$abc$159056$n5014_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[8] I3=$abc$159056$n5016_1 O=$abc$159056$n2170 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[8] I3=$false O=$abc$159056$n5016_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.state[2] I1=$abc$159056$n3707 I2=murax.system_drygascon128.core.r[9] I3=$abc$159056$n5018_1 O=$abc$159056$n2173 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111111100000 .gate SB_LUT4 I0=$abc$159056$n3708 I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.core.d[9] I3=$false O=$abc$159056$n5018_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n3660 I1=$abc$159056$n5020_1 I2=$abc$159056$n5023_1 I3=$abc$159056$n5021_1 O=$abc$159056$n2178 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001011111111 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I1=murax.system_drygascon128.core.r[121] I2=$abc$159056$n4398 I3=$abc$159056$n3795 O=$abc$159056$n5020_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101001100110011 .gate SB_LUT4 I0=murax.system_drygascon128.ds[3] I1=$abc$159056$n3707 I2=$abc$159056$n5022_1 I3=murax.system_drygascon128.core.r[121] O=$abc$159056$n5021_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000001110111 .gate SB_LUT4 I0=$abc$159056$n4422 I1=murax.system_drygascon128.core.c[121] I2=murax.system_drygascon128.core.c[153] I3=$abc$159056$n4403 O=$abc$159056$n5022_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000010111110 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.r[121] I2=murax.system_drygascon128.core.c[121] I3=murax.system_drygascon128.core.c[153] O=$abc$159056$n5023_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100010000 .gate SB_LUT4 I0=murax.system_cpu._zz_150_[0] I1=murax.system_cpu._zz_150_[1] I2=murax.system_cpu._zz_150_[2] I3=$false O=$abc$159056$n2504 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00011111 .gate SB_LUT4 I0=murax.system_cpu._zz_150_[2] I1=murax.system_cpu._zz_150_[0] I2=$abc$159056$n3416 I3=murax.system_cpu._zz_150_[1] O=$abc$159056$n2511 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=murax.system_cpu._zz_217_ I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[12] O=$abc$159056$n2617 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_112_ I1=$abc$159056$n5031_1 I2=$false I3=$false O=$abc$159056$n5030_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[14] I1=murax.system_cpu._zz_99_[4] I2=murax.system_cpu._zz_116_ I3=murax.system_cpu._zz_99_[6] O=$abc$159056$n5031_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011100001111 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[6] I1=murax.system_cpu._zz_116_ I2=murax.system_cpu._zz_99_[4] I3=$false O=$abc$159056$n5032_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[13] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[13] O=$abc$159056$n2620 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[15] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[15] O=$abc$159056$n2623 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[17] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[17] O=$abc$159056$n2626 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[18] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[18] O=$abc$159056$n2629 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[19] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[19] O=$abc$159056$n2632 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[20] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[20] O=$abc$159056$n2635 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[21] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[21] O=$abc$159056$n2638 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[22] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[22] O=$abc$159056$n2641 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[23] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[23] O=$abc$159056$n2644 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[24] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[24] O=$abc$159056$n2647 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[25] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[25] O=$abc$159056$n2650 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[26] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[26] O=$abc$159056$n2653 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[28] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[28] O=$abc$159056$n2656 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[29] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[29] O=$abc$159056$n2659 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_128_ I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[31] O=$abc$159056$n2662 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[30] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[30] O=$abc$159056$n2665 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_instruction[0] I1=$abc$159056$n3688_1 I2=$abc$159056$n3687 I3=murax.jtagBridge_1_.jtag_tap_instructionShift[1] O=$abc$159056$n2867 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_instruction[1] I1=$abc$159056$n3688_1 I2=$abc$159056$n3687 I3=murax.jtagBridge_1_.jtag_tap_instructionShift[2] O=$abc$159056$n2870 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_instruction[3] I1=$abc$159056$n3688_1 I2=$abc$159056$n3687 I3=io_G15 O=$abc$159056$n2873 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_instruction[2] I1=$abc$159056$n3688_1 I2=$abc$159056$n3687 I3=murax.jtagBridge_1_.jtag_tap_instructionShift[3] O=$abc$159056$n2876 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I1=$abc$159056$n5060 I2=$abc$159056$n5054_1 I3=$false O=$abc$159056$n2913 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=$abc$159056$n5055 I1=$abc$159056$n5057_1 I2=$abc$159056$n5059 I3=$abc$159056$n5058_1 O=$abc$159056$n5054_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=io_F15 I1=$abc$159056$n5056_1 I2=$false I3=$false O=$abc$159056$n5055 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[0] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[1] O=$abc$159056$n5056_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I3=io_F15 O=$abc$159056$n5057_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[0] O=$abc$159056$n5058_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110100111111 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I1=io_F15 I2=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[3] O=$abc$159056$n5059 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I1=io_F15 I2=murax.jtagBridge_1_.jtag_tap_fsm_state[0] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[2] O=$abc$159056$n5060 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=$abc$159056$n2933 I1=$abc$159056$n5063 I2=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I3=io_F15 O=$abc$159056$n2923 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011001111000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[0] O=$abc$159056$n5063 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110011111011 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I3=$abc$159056$n5066 O=$abc$159056$n2933 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000011111111 .gate SB_LUT4 I0=io_F15 I1=$abc$159056$n5067 I2=$abc$159056$n5060 I3=$abc$159056$n5068 O=$abc$159056$n5066 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110100000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[0] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[3] O=$abc$159056$n5067 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111111 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[0] O=$abc$159056$n5068 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110111001111 .gate SB_LUT4 I0=$abc$159056$n5070 I1=$abc$159056$n5071 I2=$false I3=$false O=$abc$159056$n2936 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[87] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5070 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5072 I2=$abc$159056$n5073 I3=$abc$159056$n5074 O=$abc$159056$n5071 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4205_1 I1=$abc$159056$n4195_1 I2=$abc$159056$n4192_1 I3=$abc$159056$n4204_1 O=$abc$159056$n5072 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4137_1 I1=$abc$159056$n4127 I2=$abc$159056$n4124 I3=$abc$159056$n4136_1 O=$abc$159056$n5073 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[117] I1=murax.system_drygascon128.core.c[181] I2=murax.system_drygascon128.core.c[245] I3=$abc$159056$n4179_1 O=$abc$159056$n5074 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5076 I1=$abc$159056$n5077 I2=$false I3=$false O=$abc$159056$n2939 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[86] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5076 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5078 I2=$abc$159056$n5079 I3=$abc$159056$n5080 O=$abc$159056$n5077 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4232 I1=$abc$159056$n4222 I2=$abc$159056$n4219_1 I3=$abc$159056$n4231 O=$abc$159056$n5078 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n4168 I1=$abc$159056$n4158_1 I2=$abc$159056$n4155 I3=$abc$159056$n4167 O=$abc$159056$n5079 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[116] I1=murax.system_drygascon128.core.c[180] I2=murax.system_drygascon128.core.c[244] I3=$abc$159056$n3941 O=$abc$159056$n5080 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5082 I1=$abc$159056$n5083 I2=$false I3=$false O=$abc$159056$n2942 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[85] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5082 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5084 I2=$abc$159056$n5085 I3=$abc$159056$n3931_1 O=$abc$159056$n5083 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4288 I1=$abc$159056$n4295 I2=$abc$159056$n4291 I3=$abc$159056$n4298_1 O=$abc$159056$n5084 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111100011100001 .gate SB_LUT4 I0=$abc$159056$n4258 I1=$abc$159056$n4248 I2=$abc$159056$n4245 I3=$abc$159056$n4257 O=$abc$159056$n5085 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n5087 I1=$abc$159056$n5088 I2=$false I3=$false O=$abc$159056$n2945 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[84] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5087 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5089 I2=$abc$159056$n5090 I3=$abc$159056$n5091 O=$abc$159056$n5088 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n7722 I1=$abc$159056$n4270 I2=$abc$159056$n4280 I3=$abc$159056$n4265_1 O=$abc$159056$n5089 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3985_1 I1=$abc$159056$n3975 I2=$abc$159056$n3972 I3=$abc$159056$n3984 O=$abc$159056$n5090 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[114] I1=murax.system_drygascon128.core.c[178] I2=murax.system_drygascon128.core.c[242] I3=$abc$159056$n4023 O=$abc$159056$n5091 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5093 I1=$abc$159056$n5094 I2=$false I3=$false O=$abc$159056$n2948 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[83] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5093 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5095 I2=$abc$159056$n5096 I3=$abc$159056$n3798 O=$abc$159056$n5094 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n7725 I1=$abc$159056$n4313 I2=$abc$159056$n4323 I3=$abc$159056$n4308_1 O=$abc$159056$n5095 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n3215 I1=$abc$159056$n3218 I2=$abc$159056$n3221 I3=$abc$159056$n4014 O=$abc$159056$n5096 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n5098 I1=$abc$159056$n5099 I2=$false I3=$false O=$abc$159056$n2951 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[82] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5098 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5100 I2=$abc$159056$n3756 I3=$abc$159056$n5101 O=$abc$159056$n5099 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n7728 I1=$abc$159056$n4341 I2=$abc$159056$n4351_1 I3=$abc$159056$n4336 O=$abc$159056$n5100 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[112] I1=murax.system_drygascon128.core.c[176] I2=murax.system_drygascon128.core.c[240] I3=$abc$159056$n4077 O=$abc$159056$n5101 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5103 I1=$abc$159056$n5104 I2=$false I3=$false O=$abc$159056$n2954 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[81] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5103 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3717 I2=$abc$159056$n5105 I3=$abc$159056$n5106 O=$abc$159056$n5104 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n7687 I1=$abc$159056$n3252 I2=$abc$159056$n3255 I3=$abc$159056$n4362 O=$abc$159056$n5105 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[111] I1=murax.system_drygascon128.core.c[175] I2=murax.system_drygascon128.core.c[239] I3=$abc$159056$n4095 O=$abc$159056$n5106 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5108 I1=$abc$159056$n5109 I2=$false I3=$false O=$abc$159056$n2957 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[80] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5108 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5110 I2=$abc$159056$n3377 I3=$abc$159056$n5116 O=$abc$159056$n5109 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n8015_1 I1=$abc$159056$n4938_1 I2=$abc$159056$n4935 I3=$abc$159056$n5111 O=$abc$159056$n5110 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101001110101100 .gate SB_LUT4 I0=$abc$159056$n8015_1 I1=$abc$159056$n4938_1 I2=$abc$159056$n4941 I3=$abc$159056$n4944 O=$abc$159056$n5111 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110000100011110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[110] I1=murax.system_drygascon128.core.c[174] I2=murax.system_drygascon128.core.c[238] I3=$abc$159056$n4110_1 O=$abc$159056$n5116 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5118 I1=$abc$159056$n5119 I2=$false I3=$false O=$abc$159056$n2960 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[79] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5118 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5120 I2=$abc$159056$n3321 I3=$abc$159056$n5121 O=$abc$159056$n5119 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n7716 I1=$abc$159056$n3957 I2=$abc$159056$n3967_1 I3=$abc$159056$n3952_1 O=$abc$159056$n5120 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110001010011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[109] I1=murax.system_drygascon128.core.c[173] I2=murax.system_drygascon128.core.c[237] I3=$abc$159056$n4141 O=$abc$159056$n5121 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5123 I1=$abc$159056$n5124 I2=$false I3=$false O=$abc$159056$n2963 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[78] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5123 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5125 I2=$abc$159056$n3299 I3=$abc$159056$n3822 O=$abc$159056$n5124 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n7690 I1=$abc$159056$n3267 I2=$abc$159056$n3270 I3=$abc$159056$n4004 O=$abc$159056$n5125 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101001110101100 .gate SB_LUT4 I0=$abc$159056$n5127 I1=$abc$159056$n5128 I2=$false I3=$false O=$abc$159056$n2966 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[77] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5127 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5129 I2=$abc$159056$n3890 I3=$abc$159056$n5130 O=$abc$159056$n5128 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n7719 I1=$abc$159056$n4036_1 I2=$abc$159056$n4046 I3=$abc$159056$n4031 O=$abc$159056$n5129 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110001010011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[107] I1=murax.system_drygascon128.core.c[171] I2=murax.system_drygascon128.core.c[235] I3=$abc$159056$n4370 O=$abc$159056$n5130 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5132 I1=$abc$159056$n5133_1 I2=$false I3=$false O=$abc$159056$n2969 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[76] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5132 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3773 I2=$abc$159056$n3829 I3=$abc$159056$n5134 O=$abc$159056$n5133_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[106] I1=murax.system_drygascon128.core.c[170] I2=murax.system_drygascon128.core.c[234] I3=$abc$159056$n4379 O=$abc$159056$n5134 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5136 I1=$abc$159056$n5137_1 I2=$false I3=$false O=$abc$159056$n2972 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[75] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5136 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3734 I2=$abc$159056$n3805_1 I3=$abc$159056$n5138 O=$abc$159056$n5137_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[105] I1=murax.system_drygascon128.core.c[169] I2=murax.system_drygascon128.core.c[233] I3=$abc$159056$n4385 O=$abc$159056$n5138 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5140 I1=$abc$159056$n5141_1 I2=$false I3=$false O=$abc$159056$n2975 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[74] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5140 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3360 I2=$abc$159056$n5072 I3=$abc$159056$n5142 O=$abc$159056$n5141_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[104] I1=murax.system_drygascon128.core.c[168] I2=murax.system_drygascon128.core.c[232] I3=$abc$159056$n4185_1 O=$abc$159056$n5142 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5144 I1=$abc$159056$n5145_1 I2=$false I3=$false O=$abc$159056$n2978 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[73] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5144 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3338 I2=$abc$159056$n5078 I3=$abc$159056$n5146 O=$abc$159056$n5145_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[103] I1=murax.system_drygascon128.core.c[167] I2=murax.system_drygascon128.core.c[231] I3=$abc$159056$n4330_1 O=$abc$159056$n5146 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5148 I1=$abc$159056$n5149_1 I2=$false I3=$false O=$abc$159056$n2981 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[72] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5148 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3282 I2=$abc$159056$n5085 I3=$abc$159056$n5150 O=$abc$159056$n5149_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[102] I1=murax.system_drygascon128.core.c[166] I2=murax.system_drygascon128.core.c[230] I3=$abc$159056$n4212 O=$abc$159056$n5150 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5152 I1=$abc$159056$n5153_1 I2=$false I3=$false O=$abc$159056$n2984 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[71] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5152 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5089 I2=$abc$159056$n3907_1 I3=$abc$159056$n5154 O=$abc$159056$n5153_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[101] I1=murax.system_drygascon128.core.c[165] I2=murax.system_drygascon128.core.c[229] I3=$abc$159056$n4408 O=$abc$159056$n5154 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5156 I1=$abc$159056$n5157_1 I2=$false I3=$false O=$abc$159056$n2987 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[70] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5156 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5095 I2=$abc$159056$n3846 I3=$abc$159056$n3800 O=$abc$159056$n5157_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5159_1 I1=$abc$159056$n5160 I2=$false I3=$false O=$abc$159056$n2990 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[69] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5159_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5100 I2=$abc$159056$n3868_1 I3=$abc$159056$n5161_1 O=$abc$159056$n5160 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[99] I1=murax.system_drygascon128.core.c[163] I2=murax.system_drygascon128.core.c[227] I3=$abc$159056$n5162 O=$abc$159056$n5161_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[35] I1=murax.system_drygascon128.core.c[291] I2=$false I3=$false O=$abc$159056$n5162 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5164 I1=$abc$159056$n5165_1 I2=$false I3=$false O=$abc$159056$n2993 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[68] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5164 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5073 I2=$abc$159056$n5105 I3=$abc$159056$n5166 O=$abc$159056$n5165_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[98] I1=murax.system_drygascon128.core.c[162] I2=murax.system_drygascon128.core.c[226] I3=$abc$159056$n3944 O=$abc$159056$n5166 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5168 I1=$abc$159056$n5169_1 I2=$false I3=$false O=$abc$159056$n2996 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[67] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5168 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5110 I2=$abc$159056$n5079 I3=$abc$159056$n5170 O=$abc$159056$n5169_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[97] I1=murax.system_drygascon128.core.c[161] I2=murax.system_drygascon128.core.c[225] I3=$abc$159056$n3998 O=$abc$159056$n5170 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5172 I1=$abc$159056$n5173_1 I2=$false I3=$false O=$abc$159056$n2999 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[66] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5172 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5120 I2=$abc$159056$n5084 I3=$abc$159056$n3929 O=$abc$159056$n5173_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5175_1 I1=$abc$159056$n5176 I2=$false I3=$false O=$abc$159056$n3002 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[65] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5175_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5125 I2=$abc$159056$n5090 I3=$abc$159056$n3824 O=$abc$159056$n5176 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5178 I1=$abc$159056$n5179_1 I2=$false I3=$false O=$abc$159056$n3005 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[64] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n3278 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5178 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5129 I2=$abc$159056$n5096 I3=$abc$159056$n5180 O=$abc$159056$n5179_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[126] I1=murax.system_drygascon128.core.c[190] I2=murax.system_drygascon128.core.c[254] I3=$abc$159056$n4080 O=$abc$159056$n5180 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000101111110 .gate SB_LUT4 I0=$abc$159056$n5182 I1=$abc$159056$n5183_1 I2=$false I3=$false O=$abc$159056$n3008 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[63] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5182 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4217_1 I2=$abc$159056$n4060_1 I3=$abc$159056$n4140 O=$abc$159056$n5183_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5185_1 I1=$abc$159056$n5186 I2=$false I3=$false O=$abc$159056$n3011 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[62] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5185_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4243 I2=$abc$159056$n4079 I3=$abc$159056$n4171 O=$abc$159056$n5186 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5188 I1=$abc$159056$n5189_1 I2=$false I3=$false O=$abc$159056$n3014 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[61] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5188 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4264 I2=$abc$159056$n3988_1 I3=$abc$159056$n4369 O=$abc$159056$n5189_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5191_1 I1=$abc$159056$n5192 I2=$false I3=$false O=$abc$159056$n3017 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[60] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5191_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4307 I2=$abc$159056$n4015_1 I3=$abc$159056$n4378_1 O=$abc$159056$n5192 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5194 I1=$abc$159056$n5195_1 I2=$false I3=$false O=$abc$159056$n3020 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[28] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5194 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4020 I2=$abc$159056$n4190 I3=$abc$159056$n4407 O=$abc$159056$n5195_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5197 I1=$abc$159056$n5198_1 I2=$false I3=$false O=$abc$159056$n3023 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[59] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5197 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4335 I2=$abc$159056$n4051_1 I3=$abc$159056$n4384_1 O=$abc$159056$n5198_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5200_1 I1=$abc$159056$n5201_1 I2=$false I3=$false O=$abc$159056$n3026 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[27] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5200_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4056 I2=$abc$159056$n4217_1 I3=$abc$159056$n4238 O=$abc$159056$n5201_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5203_1 I1=$abc$159056$n5204_1 I2=$false I3=$false O=$abc$159056$n3029 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[58] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5203_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4357 I2=$abc$159056$n4069_1 I3=$abc$159056$n4184 O=$abc$159056$n5204_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5206_1 I1=$abc$159056$n5207_1 I2=$false I3=$false O=$abc$159056$n3032 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[26] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5206_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4074 I2=$abc$159056$n4243 I3=$abc$159056$n5208 O=$abc$159056$n5207_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[99] I1=murax.system_drygascon128.core.c[163] I2=$abc$159056$n5162 I3=$abc$159056$n5209_1 O=$abc$159056$n5208 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[35] I1=murax.system_drygascon128.core.c[291] I2=murax.system_drygascon128.core.c[99] I3=murax.system_drygascon128.core.c[227] O=$abc$159056$n5209_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=$abc$159056$n5211 I1=$abc$159056$n5212_1 I2=$false I3=$false O=$abc$159056$n3035 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[57] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5211 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5213_1 I2=$abc$159056$n4087_1 I3=$abc$159056$n4329_1 O=$abc$159056$n5212_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5111 I1=$abc$159056$n4934_1 I2=$false I3=$false O=$abc$159056$n5213_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5215_1 I1=$abc$159056$n5216_1 I2=$false I3=$false O=$abc$159056$n3038 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[25] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5215_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4264 I2=$abc$159056$n4092 I3=$abc$159056$n3943_1 O=$abc$159056$n5216_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5218_1 I1=$abc$159056$n5219_1 I2=$false I3=$false O=$abc$159056$n3041 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[56] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5218_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3951 I2=$abc$159056$n4102_1 I3=$abc$159056$n4211_1 O=$abc$159056$n5219_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5221_1 I1=$abc$159056$n5222 I2=$false I3=$false O=$abc$159056$n3044 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[24] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5221_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4307 I2=$abc$159056$n4107_1 I3=$abc$159056$n3997_1 O=$abc$159056$n5222 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5224_1 I1=$abc$159056$n5225 I2=$false I3=$false O=$abc$159056$n3047 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[55] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5224_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4003_1 I2=$abc$159056$n4117 I3=$abc$159056$n4407 O=$abc$159056$n5225 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5227_1 I1=$abc$159056$n5228 I2=$false I3=$false O=$abc$159056$n3050 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[23] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5227_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4335 I2=$abc$159056$n4122 I3=$abc$159056$n4025 O=$abc$159056$n5228 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5230_1 I1=$abc$159056$n5231 I2=$false I3=$false O=$abc$159056$n3053 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[54] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5230_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4030_1 I2=$abc$159056$n4148 I3=$abc$159056$n4238 O=$abc$159056$n5231 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5233_1 I1=$abc$159056$n5234 I2=$false I3=$false O=$abc$159056$n3056 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[22] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5233_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4153_1 I2=$abc$159056$n4357 I3=$abc$159056$n4060_1 O=$abc$159056$n5234 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5236_1 I1=$abc$159056$n5237 I2=$false I3=$false O=$abc$159056$n3059 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[53] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5236_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4067 I2=$abc$159056$n4178_1 I3=$abc$159056$n5208 O=$abc$159056$n5237 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5239_1 I1=$abc$159056$n5240 I2=$false I3=$false O=$abc$159056$n3062 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[21] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5239_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5213_1 I2=$abc$159056$n4283 I3=$abc$159056$n4079 O=$abc$159056$n5240 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5242_1 I1=$abc$159056$n5243 I2=$false I3=$false O=$abc$159056$n3065 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[42] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5242_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3970_1 I2=$abc$159056$n4102_1 I3=$abc$159056$n4378_1 O=$abc$159056$n5243 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5245_1 I1=$abc$159056$n5246 I2=$false I3=$false O=$abc$159056$n3068 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[11] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5245_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4092 I2=$abc$159056$n4393 I3=$abc$159056$n3940_1 O=$abc$159056$n5246 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5248_1 I1=$abc$159056$n5249 I2=$false I3=$false O=$abc$159056$n3071 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[34] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5248_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4176_1 I2=$abc$159056$n3943_1 I3=$abc$159056$n4076 O=$abc$159056$n5249 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5251_1 I1=$abc$159056$n5252 I2=$false I3=$false O=$abc$159056$n3074 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[43] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5251_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4283 I2=$abc$159056$n4087_1 I3=$abc$159056$n4369 O=$abc$159056$n5252 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5254_1 I1=$abc$159056$n5255 I2=$false I3=$false O=$abc$159056$n3077 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[3] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5254_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5213_1 I2=$abc$159056$n4065 I3=$abc$159056$n4171 O=$abc$159056$n5255 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5257_1 I1=$abc$159056$n5258 I2=$false I3=$false O=$abc$159056$n3080 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[35] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n3935 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5257_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4146_1 I2=$abc$159056$n4058 I3=$abc$159056$n5208 O=$abc$159056$n5258 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5260_1 I1=$abc$159056$n5261 I2=$false I3=$false O=$abc$159056$n3083 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[29] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n3948 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5260_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3993 I2=$abc$159056$n4393 I3=$abc$159056$n4211_1 O=$abc$159056$n5261 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[103] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n5263_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[101] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n5268_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[106] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n5273 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[87] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n5278_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[94] I1=$abc$159056$n3706_1 I2=$abc$159056$n5283_1 I3=$abc$159056$n5284_1 O=$abc$159056$n3118 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[84] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n5283_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n5286_1 I3=murax.system_drygascon128.core.r[84] O=$abc$159056$n5284_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[84] I1=murax.system_drygascon128.core.c[244] I2=$false I3=$false O=$abc$159056$n5286_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[80] I1=$abc$159056$n3706_1 I2=$abc$159056$n5288 I3=$abc$159056$n5289_1 O=$abc$159056$n3125 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[70] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n5288 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n5291 I3=murax.system_drygascon128.core.r[70] O=$abc$159056$n5289_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[70] I1=murax.system_drygascon128.core.c[230] I2=$false I3=$false O=$abc$159056$n5291 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[68] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n4466 I3=$abc$159056$n3660 O=$abc$159056$n5293 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[52] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n5298_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[17] I1=$abc$159056$n3706_1 I2=$abc$159056$n5303 I3=$abc$159056$n5304_1 O=$abc$159056$n3146 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[7] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n5303 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n5306_1 I3=murax.system_drygascon128.core.r[7] O=$abc$159056$n5304_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100010111111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[7] I1=murax.system_drygascon128.core.c[167] I2=$false I3=$false O=$abc$159056$n5306_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[34] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n5308_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[30] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n5313 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[2] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n5318_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[26] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n5323 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[35] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n4670_1 I3=$abc$159056$n3660 O=$abc$159056$n5328_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[31] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n5334_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[27] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n5339 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[29] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n4711 I3=$abc$159056$n3660 O=$abc$159056$n5344_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n5349 I1=$abc$159056$n5350_1 I2=$false I3=$false O=$abc$159056$n3205 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[317] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5349 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4008 I2=$abc$159056$n3989 I3=$abc$159056$n4059 O=$abc$159056$n5350_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3660 I1=murax.system_drygascon128.core.idle I2=murax.system_drygascon128.core.state[3] I3=$false O=$abc$159056$n3207 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11111000 .gate SB_LUT4 I0=$abc$159056$n3416 I1=murax.system_cpu._zz_150_[0] I2=murax.system_cpu._zz_150_[2] I3=murax.system_cpu._zz_150_[1] O=$abc$159056$n3293 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100001100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[14] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[14] O=$abc$159056$n3337 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[16] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[16] O=$abc$159056$n3340 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[27] I1=$abc$159056$n5032_1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[27] O=$abc$159056$n3343 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=$abc$159056$n5357 I1=$abc$159056$n5358_1 I2=$false I3=$false O=$abc$159056$n3454 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[103] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5357 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5095 I2=$abc$159056$n3355 I3=$abc$159056$n5146 O=$abc$159056$n5358_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5360 I1=$abc$159056$n5362_1 I2=$false I3=$false O=$abc$159056$n3457 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[207] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5360 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=$abc$159056$n3279 I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3204 O=$abc$159056$n5361_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5363 I2=$abc$159056$n5365_1 I3=$abc$159056$n5367_1 O=$abc$159056$n5362_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3972 I1=$abc$159056$n3981 I2=$abc$159056$n3978 I3=$abc$159056$n5364_1 O=$abc$159056$n5363 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3972 I1=$abc$159056$n3981 I2=$abc$159056$n3975 I3=$abc$159056$n3985_1 O=$abc$159056$n5364_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3323 I1=$abc$159056$n4101 I2=$abc$159056$n5366 I3=$false O=$abc$159056$n5365_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001011 .gate SB_LUT4 I0=$abc$159056$n3332 I1=$abc$159056$n3335 I2=$false I3=$false O=$abc$159056$n5366 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5368_1 I1=murax.system_drygascon128.core.c[119] I2=murax.system_drygascon128.core.c[183] I3=$false O=$abc$159056$n5367_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[55] I1=murax.system_drygascon128.core.c[311] I2=murax.system_drygascon128.core.c[247] I3=$false O=$abc$159056$n5368_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5370_1 I1=$abc$159056$n5371_1 I2=$false I3=$false O=$abc$159056$n3460 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[208] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5370_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5372 I2=$abc$159056$n5373_1 I3=$abc$159056$n5375 O=$abc$159056$n5371_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3234 I1=$abc$159056$n3379 I2=$abc$159056$n3237 I3=$abc$159056$n3227 O=$abc$159056$n5372 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n4292 I1=$abc$159056$n4284 I2=$abc$159056$n5374_1 I3=$false O=$abc$159056$n5373_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001011 .gate SB_LUT4 I0=$abc$159056$n4295 I1=$abc$159056$n4298_1 I2=$false I3=$false O=$abc$159056$n5374_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[56] I1=murax.system_drygascon128.core.c[312] I2=murax.system_drygascon128.core.c[248] I3=$abc$159056$n5376_1 O=$abc$159056$n5375 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[120] I1=murax.system_drygascon128.core.c[184] I2=$false I3=$false O=$abc$159056$n5376_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5378 I1=$abc$159056$n5379_1 I2=$false I3=$false O=$abc$159056$n3463 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[209] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5378 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5380_1 I2=$abc$159056$n5382_1 I3=$abc$159056$n5384 O=$abc$159056$n5379_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3725 I1=$abc$159056$n3731 I2=$abc$159056$n3728 I3=$abc$159056$n5381 O=$abc$159056$n5380_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n3731 I1=$abc$159056$n3728 I2=$abc$159056$n3719 I3=$abc$159056$n3722 O=$abc$159056$n5381 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n4155 I1=$abc$159056$n4161_1 I2=$abc$159056$n4164 I3=$abc$159056$n5383_1 O=$abc$159056$n5382_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n4155 I1=$abc$159056$n4161_1 I2=$abc$159056$n4158_1 I3=$abc$159056$n4168 O=$abc$159056$n5383_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5385_1 I1=murax.system_drygascon128.core.c[121] I2=murax.system_drygascon128.core.c[185] I3=$false O=$abc$159056$n5384 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[57] I1=murax.system_drygascon128.core.c[313] I2=murax.system_drygascon128.core.c[249] I3=$false O=$abc$159056$n5385_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5387 I1=$abc$159056$n5388_1 I2=$false I3=$false O=$abc$159056$n3466 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[210] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5387 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5389_1 I2=$abc$159056$n5391_1 I3=$abc$159056$n5393 O=$abc$159056$n5388_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3764 I1=$abc$159056$n3770 I2=$abc$159056$n3767 I3=$abc$159056$n5390 O=$abc$159056$n5389_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n3770 I1=$abc$159056$n3767 I2=$abc$159056$n3758 I3=$abc$159056$n3761 O=$abc$159056$n5390 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n4124 I1=$abc$159056$n4130_1 I2=$abc$159056$n4133 I3=$abc$159056$n5392_1 O=$abc$159056$n5391_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n4124 I1=$abc$159056$n4130_1 I2=$abc$159056$n4127 I3=$abc$159056$n4137_1 O=$abc$159056$n5392_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[58] I1=murax.system_drygascon128.core.c[314] I2=murax.system_drygascon128.core.c[250] I3=$abc$159056$n5394_1 O=$abc$159056$n5393 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[122] I1=murax.system_drygascon128.core.c[186] I2=$false I3=$false O=$abc$159056$n5394_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5396 I1=$abc$159056$n5397_1 I2=$false I3=$false O=$abc$159056$n3469 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[211] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5396 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5398_1 I2=$abc$159056$n5400_1 I3=$abc$159056$n5401_1 O=$abc$159056$n5397_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3876 I1=$abc$159056$n3879 I2=$abc$159056$n3882 I3=$abc$159056$n5399 O=$abc$159056$n5398_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3882 I1=$abc$159056$n3879 I2=$abc$159056$n3870 I3=$abc$159056$n3873 O=$abc$159056$n5399 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n3221 I1=$abc$159056$n4011 I2=$abc$159056$n3224 I3=$abc$159056$n3214 O=$abc$159056$n5400_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n5402 I1=murax.system_drygascon128.core.c[123] I2=murax.system_drygascon128.core.c[187] I3=$false O=$abc$159056$n5401_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[59] I1=murax.system_drygascon128.core.c[315] I2=murax.system_drygascon128.core.c[251] I3=$false O=$abc$159056$n5402 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5404_1 I1=$abc$159056$n5405 I2=$false I3=$false O=$abc$159056$n3472 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[104] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5404_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5089 I2=$abc$159056$n3382 I3=$abc$159056$n5142 O=$abc$159056$n5405 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5407_1 I1=$abc$159056$n5408 I2=$false I3=$false O=$abc$159056$n3475 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[212] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5407_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5363 I2=$abc$159056$n5409_1 I3=$abc$159056$n5411 O=$abc$159056$n5408 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3854 I1=$abc$159056$n3857 I2=$abc$159056$n3860 I3=$abc$159056$n5410_1 O=$abc$159056$n5409_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3860 I1=$abc$159056$n3857 I2=$abc$159056$n3848 I3=$abc$159056$n3851 O=$abc$159056$n5410_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5412_1 I1=murax.system_drygascon128.core.c[124] I2=murax.system_drygascon128.core.c[188] I3=$false O=$abc$159056$n5411 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[60] I1=murax.system_drygascon128.core.c[316] I2=murax.system_drygascon128.core.c[252] I3=$false O=$abc$159056$n5412_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5414 I1=$abc$159056$n5415_1 I2=$false I3=$false O=$abc$159056$n3478 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[213] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5414 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5373_1 I2=$abc$159056$n5416_1 I3=$abc$159056$n5418_1 O=$abc$159056$n5415_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3915 I1=$abc$159056$n3921 I2=$abc$159056$n3918 I3=$abc$159056$n5417 O=$abc$159056$n5416_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n3921 I1=$abc$159056$n3918 I2=$abc$159056$n3909 I3=$abc$159056$n3912 O=$abc$159056$n5417 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[61] I1=murax.system_drygascon128.core.c[317] I2=murax.system_drygascon128.core.c[253] I3=$abc$159056$n5419_1 O=$abc$159056$n5418_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[125] I1=murax.system_drygascon128.core.c[189] I2=$false I3=$false O=$abc$159056$n5419_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5421_1 I1=$abc$159056$n5422_1 I2=$false I3=$false O=$abc$159056$n3481 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[105] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5421_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5085 I2=$abc$159056$n3751_1 I3=$abc$159056$n5138 O=$abc$159056$n5422_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5424_1 I1=$abc$159056$n5425_1 I2=$false I3=$false O=$abc$159056$n3484 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[214] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5424_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5382_1 I2=$abc$159056$n5426 I3=$abc$159056$n5428_1 O=$abc$159056$n5425_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3290 I1=$abc$159056$n3287 I2=$abc$159056$n3284 I3=$abc$159056$n5427_1 O=$abc$159056$n5426 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3290 I1=$abc$159056$n3287 I2=$abc$159056$n3293_1 I3=$abc$159056$n3296 O=$abc$159056$n5427_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n5429 I1=murax.system_drygascon128.core.c[126] I2=murax.system_drygascon128.core.c[190] I3=$false O=$abc$159056$n5428_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[62] I1=murax.system_drygascon128.core.c[318] I2=murax.system_drygascon128.core.c[254] I3=$false O=$abc$159056$n5429 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5431_1 I1=$abc$159056$n5432 I2=$false I3=$false O=$abc$159056$n3487 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[106] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5431_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5078 I2=$abc$159056$n3790_1 I3=$abc$159056$n5134 O=$abc$159056$n5432 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5434_1 I1=$abc$159056$n5435 I2=$false I3=$false O=$abc$159056$n3490 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[217] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5434_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5409_1 I2=$abc$159056$n5436_1 I3=$abc$159056$n5438 O=$abc$159056$n5435 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3736_1 I1=$abc$159056$n3939 I2=$abc$159056$n5437_1 I3=$false O=$abc$159056$n5436_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001011 .gate SB_LUT4 I0=$abc$159056$n3745_1 I1=$abc$159056$n3748_1 I2=$false I3=$false O=$abc$159056$n5437_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[33] I1=murax.system_drygascon128.core.c[225] I2=murax.system_drygascon128.core.c[289] I3=$abc$159056$n3261 O=$abc$159056$n5438 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=$abc$159056$n5440_1 I1=$abc$159056$n5441 I2=$false I3=$false O=$abc$159056$n3493 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[218] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5440_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5416_1 I2=$abc$159056$n5442_1 I3=$abc$159056$n5444 O=$abc$159056$n5441 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3781_1 I1=$abc$159056$n3784_1 I2=$abc$159056$n3787_1 I3=$abc$159056$n5443_1 O=$abc$159056$n5442_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3787_1 I1=$abc$159056$n3784_1 I2=$abc$159056$n3775_1 I3=$abc$159056$n3778_1 O=$abc$159056$n5443_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[34] I1=murax.system_drygascon128.core.c[226] I2=murax.system_drygascon128.core.c[290] I3=$abc$159056$n5445_1 O=$abc$159056$n5444 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[98] I1=murax.system_drygascon128.core.c[162] I2=$false I3=$false O=$abc$159056$n5445_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5447_1 I1=$abc$159056$n5448_1 I2=$false I3=$false O=$abc$159056$n3496 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[219] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5447_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5449 I2=$abc$159056$n5426 I3=$abc$159056$n5451_1 O=$abc$159056$n5448_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4046 I1=$abc$159056$n4039_1 I2=$abc$159056$n4042_1 I3=$abc$159056$n5450_1 O=$abc$159056$n5449 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n4046 I1=$abc$159056$n4039_1 I2=$abc$159056$n7719 I3=$abc$159056$n4036_1 O=$abc$159056$n5450_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n5452 I1=murax.system_drygascon128.core.c[99] I2=murax.system_drygascon128.core.c[163] I3=$false O=$abc$159056$n5451_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[35] I1=murax.system_drygascon128.core.c[227] I2=murax.system_drygascon128.core.c[291] I3=$false O=$abc$159056$n5452 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5454_1 I1=$abc$159056$n5455 I2=$false I3=$false O=$abc$159056$n3499 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[220] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5454_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5456_1 I2=$abc$159056$n5457_1 I3=$abc$159056$n5459_1 O=$abc$159056$n5455 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3270 I1=$abc$159056$n4005 I2=$abc$159056$n3273 I3=$abc$159056$n3262 O=$abc$159056$n5456_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n3346 I1=$abc$159056$n3343_1 I2=$abc$159056$n3340_1 I3=$abc$159056$n5458 O=$abc$159056$n5457_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3346 I1=$abc$159056$n3343_1 I2=$abc$159056$n3349 I3=$abc$159056$n3352 O=$abc$159056$n5458 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[36] I1=murax.system_drygascon128.core.c[228] I2=murax.system_drygascon128.core.c[292] I3=$abc$159056$n5460_1 O=$abc$159056$n5459_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[100] I1=murax.system_drygascon128.core.c[164] I2=$false I3=$false O=$abc$159056$n5460_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5462_1 I1=$abc$159056$n5463_1 I2=$false I3=$false O=$abc$159056$n3502 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[221] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5462_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5464 I2=$abc$159056$n5466_1 I3=$abc$159056$n5468_1 O=$abc$159056$n5463_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n3967_1 I1=$abc$159056$n3960 I2=$abc$159056$n3963 I3=$abc$159056$n5465_1 O=$abc$159056$n5464 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3967_1 I1=$abc$159056$n3960 I2=$abc$159056$n7716 I3=$abc$159056$n3957 O=$abc$159056$n5465_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n3368 I1=$abc$159056$n3374 I2=$abc$159056$n3371 I3=$abc$159056$n5467 O=$abc$159056$n5466_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n3374 I1=$abc$159056$n3371 I2=$abc$159056$n3362 I3=$abc$159056$n3365 O=$abc$159056$n5467 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[37] I1=murax.system_drygascon128.core.c[229] I2=murax.system_drygascon128.core.c[293] I3=$abc$159056$n5469_1 O=$abc$159056$n5468_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[101] I1=murax.system_drygascon128.core.c[165] I2=$false I3=$false O=$abc$159056$n5469_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5471 I1=$abc$159056$n5472_1 I2=$false I3=$false O=$abc$159056$n3505 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[111] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5471 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3299 I2=$abc$159056$n5106 I3=$abc$159056$n5166 O=$abc$159056$n5472_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5474_1 I1=$abc$159056$n5476_1 I2=$false I3=$false O=$abc$159056$n3508 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[224] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5474_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=$abc$159056$n3796_1 I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3204 O=$abc$159056$n5475_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5477_1 I2=$abc$159056$n5468_1 I3=$abc$159056$n5479_1 O=$abc$159056$n5476_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4219_1 I1=$abc$159056$n4225 I2=$abc$159056$n4228 I3=$abc$159056$n5478 O=$abc$159056$n5477_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n4219_1 I1=$abc$159056$n4225 I2=$abc$159056$n4222 I3=$abc$159056$n4232 O=$abc$159056$n5478 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5480_1 I1=murax.system_drygascon128.core.c[96] I2=murax.system_drygascon128.core.c[160] I3=$false O=$abc$159056$n5479_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[32] I1=murax.system_drygascon128.core.c[224] I2=murax.system_drygascon128.core.c[288] I3=$false O=$abc$159056$n5480_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5482_1 I1=$abc$159056$n5483_1 I2=$false I3=$false O=$abc$159056$n3511 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[225] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5482_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5484 I2=$abc$159056$n5438 I3=$abc$159056$n5486_1 O=$abc$159056$n5483_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4192_1 I1=$abc$159056$n4198_1 I2=$abc$159056$n4201_1 I3=$abc$159056$n5485_1 O=$abc$159056$n5484 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n4192_1 I1=$abc$159056$n4198_1 I2=$abc$159056$n4195_1 I3=$abc$159056$n4205_1 O=$abc$159056$n5485_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5487 I1=murax.system_drygascon128.core.c[102] I2=murax.system_drygascon128.core.c[166] I3=$false O=$abc$159056$n5486_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[38] I1=murax.system_drygascon128.core.c[230] I2=murax.system_drygascon128.core.c[294] I3=$false O=$abc$159056$n5487 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5489_1 I1=$abc$159056$n5490_1 I2=$false I3=$false O=$abc$159056$n3514 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[226] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5489_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5491 I2=$abc$159056$n5444 I3=$abc$159056$n5493 O=$abc$159056$n5490_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3813 I1=$abc$159056$n3810 I2=$abc$159056$n3807 I3=$abc$159056$n5492 O=$abc$159056$n5491 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3813 I1=$abc$159056$n3810 I2=$abc$159056$n3816 I3=$abc$159056$n3819 O=$abc$159056$n5492 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[39] I1=murax.system_drygascon128.core.c[231] I2=murax.system_drygascon128.core.c[295] I3=$abc$159056$n5494 O=$abc$159056$n5493 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[103] I1=murax.system_drygascon128.core.c[167] I2=$false I3=$false O=$abc$159056$n5494 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5496 I1=$abc$159056$n5497 I2=$false I3=$false O=$abc$159056$n3517 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[227] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5496 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5498 I2=$abc$159056$n5451_1 I3=$abc$159056$n5500 O=$abc$159056$n5497 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3837 I1=$abc$159056$n3843 I2=$abc$159056$n3840 I3=$abc$159056$n5499 O=$abc$159056$n5498 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n3843 I1=$abc$159056$n3840 I2=$abc$159056$n3831_1 I3=$abc$159056$n3834 O=$abc$159056$n5499 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[40] I1=murax.system_drygascon128.core.c[232] I2=murax.system_drygascon128.core.c[296] I3=$abc$159056$n5501 O=$abc$159056$n5500 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[104] I1=murax.system_drygascon128.core.c[168] I2=$false I3=$false O=$abc$159056$n5501 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5503 I1=$abc$159056$n5504 I2=$false I3=$false O=$abc$159056$n3520 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[228] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5503 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5505 I2=$abc$159056$n5459_1 I3=$abc$159056$n5507 O=$abc$159056$n5504 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3898_1 I1=$abc$159056$n3904_1 I2=$abc$159056$n3901_1 I3=$abc$159056$n5506 O=$abc$159056$n5505 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n3904_1 I1=$abc$159056$n3901_1 I2=$abc$159056$n3892_1 I3=$abc$159056$n3895_1 O=$abc$159056$n5506 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5508 I1=murax.system_drygascon128.core.c[105] I2=murax.system_drygascon128.core.c[169] I3=$false O=$abc$159056$n5507 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[41] I1=murax.system_drygascon128.core.c[233] I2=murax.system_drygascon128.core.c[297] I3=$false O=$abc$159056$n5508 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5510 I1=$abc$159056$n5511 I2=$false I3=$false O=$abc$159056$n3523 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[229] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5510 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5512 I2=$abc$159056$n5468_1 I3=$abc$159056$n5514 O=$abc$159056$n5511 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3307 I1=$abc$159056$n3304 I2=$abc$159056$n3301 I3=$abc$159056$n5513 O=$abc$159056$n5512 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n3307 I1=$abc$159056$n3304 I2=$abc$159056$n3310 I3=$abc$159056$n3313 O=$abc$159056$n5513 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n5515 I1=murax.system_drygascon128.core.c[106] I2=murax.system_drygascon128.core.c[170] I3=$false O=$abc$159056$n5514 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[42] I1=murax.system_drygascon128.core.c[234] I2=murax.system_drygascon128.core.c[298] I3=$false O=$abc$159056$n5515 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5517 I1=$abc$159056$n5518 I2=$false I3=$false O=$abc$159056$n3526 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[230] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5517 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5365_1 I2=$abc$159056$n5486_1 I3=$abc$159056$n5519 O=$abc$159056$n5518 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[43] I1=murax.system_drygascon128.core.c[235] I2=murax.system_drygascon128.core.c[299] I3=$abc$159056$n5520 O=$abc$159056$n5519 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[107] I1=murax.system_drygascon128.core.c[171] I2=$false I3=$false O=$abc$159056$n5520 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5522_1 I1=$abc$159056$n5523 I2=$false I3=$false O=$abc$159056$n3529 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[231] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5522_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5372 I2=$abc$159056$n5493 I3=$abc$159056$n5524 O=$abc$159056$n5523 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5525 I1=murax.system_drygascon128.core.c[108] I2=murax.system_drygascon128.core.c[172] I3=$false O=$abc$159056$n5524 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[44] I1=murax.system_drygascon128.core.c[300] I2=murax.system_drygascon128.core.c[236] I3=$false O=$abc$159056$n5525 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5527 I1=$abc$159056$n5528 I2=$false I3=$false O=$abc$159056$n3532 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[232] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5527 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5380_1 I2=$abc$159056$n5500 I3=$abc$159056$n5529 O=$abc$159056$n5528 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5530 I1=murax.system_drygascon128.core.c[109] I2=murax.system_drygascon128.core.c[173] I3=$false O=$abc$159056$n5529 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[45] I1=murax.system_drygascon128.core.c[301] I2=murax.system_drygascon128.core.c[237] I3=$false O=$abc$159056$n5530 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5532 I1=$abc$159056$n5533 I2=$false I3=$false O=$abc$159056$n3535 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[233] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5532 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5389_1 I2=$abc$159056$n5507 I3=$abc$159056$n5534 O=$abc$159056$n5533 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5535 I1=murax.system_drygascon128.core.c[110] I2=murax.system_drygascon128.core.c[174] I3=$false O=$abc$159056$n5534 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[46] I1=murax.system_drygascon128.core.c[302] I2=murax.system_drygascon128.core.c[238] I3=$false O=$abc$159056$n5535 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5537 I1=$abc$159056$n5538 I2=$false I3=$false O=$abc$159056$n3538 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[234] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5537 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5400_1 I2=$abc$159056$n5514 I3=$abc$159056$n5539 O=$abc$159056$n5538 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5540 I1=murax.system_drygascon128.core.c[111] I2=murax.system_drygascon128.core.c[175] I3=$false O=$abc$159056$n5539 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[47] I1=murax.system_drygascon128.core.c[303] I2=murax.system_drygascon128.core.c[239] I3=$false O=$abc$159056$n5540 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5542 I1=$abc$159056$n5543 I2=$false I3=$false O=$abc$159056$n3541 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[235] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5542 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5363 I2=$abc$159056$n5519 I3=$abc$159056$n5544_1 O=$abc$159056$n5543 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5545_1 I1=murax.system_drygascon128.core.c[112] I2=murax.system_drygascon128.core.c[176] I3=$false O=$abc$159056$n5544_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[48] I1=murax.system_drygascon128.core.c[304] I2=murax.system_drygascon128.core.c[240] I3=$false O=$abc$159056$n5545_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5547_1 I1=$abc$159056$n5548_1 I2=$false I3=$false O=$abc$159056$n3544 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[236] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5547_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5373_1 I2=$abc$159056$n5524 I3=$abc$159056$n5549_1 O=$abc$159056$n5548_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5550_1 I1=murax.system_drygascon128.core.c[113] I2=murax.system_drygascon128.core.c[177] I3=$false O=$abc$159056$n5549_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[49] I1=murax.system_drygascon128.core.c[305] I2=murax.system_drygascon128.core.c[241] I3=$false O=$abc$159056$n5550_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5552_1 I1=$abc$159056$n5553_1 I2=$false I3=$false O=$abc$159056$n3547 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[237] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5552_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5382_1 I2=$abc$159056$n5529 I3=$abc$159056$n5554_1 O=$abc$159056$n5553_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5555_1 I1=murax.system_drygascon128.core.c[114] I2=murax.system_drygascon128.core.c[178] I3=$false O=$abc$159056$n5554_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[50] I1=murax.system_drygascon128.core.c[306] I2=murax.system_drygascon128.core.c[242] I3=$false O=$abc$159056$n5555_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5557_1 I1=$abc$159056$n5558_1 I2=$false I3=$false O=$abc$159056$n3550 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[238] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5557_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5391_1 I2=$abc$159056$n5534 I3=$abc$159056$n5559_1 O=$abc$159056$n5558_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[51] I1=murax.system_drygascon128.core.c[307] I2=murax.system_drygascon128.core.c[243] I3=$abc$159056$n5560 O=$abc$159056$n5559_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[115] I1=murax.system_drygascon128.core.c[179] I2=$false I3=$false O=$abc$159056$n5560 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5562_1 I1=$abc$159056$n5563 I2=$false I3=$false O=$abc$159056$n3553 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[239] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5562_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5398_1 I2=$abc$159056$n5539 I3=$abc$159056$n5564 O=$abc$159056$n5563 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5565_1 I1=murax.system_drygascon128.core.c[116] I2=murax.system_drygascon128.core.c[180] I3=$false O=$abc$159056$n5564 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[52] I1=murax.system_drygascon128.core.c[308] I2=murax.system_drygascon128.core.c[244] I3=$false O=$abc$159056$n5565_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5567_1 I1=$abc$159056$n5568_1 I2=$false I3=$false O=$abc$159056$n3556 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[240] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5567_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5409_1 I2=$abc$159056$n5544_1 I3=$abc$159056$n5569_1 O=$abc$159056$n5568_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5570_1 I1=murax.system_drygascon128.core.c[117] I2=murax.system_drygascon128.core.c[181] I3=$false O=$abc$159056$n5569_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[53] I1=murax.system_drygascon128.core.c[309] I2=murax.system_drygascon128.core.c[245] I3=$false O=$abc$159056$n5570_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5572_1 I1=$abc$159056$n5573_1 I2=$false I3=$false O=$abc$159056$n3559 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[112] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5572_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3321 I2=$abc$159056$n5101 I3=$abc$159056$n5161_1 O=$abc$159056$n5573_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5575_1 I1=$abc$159056$n5576_1 I2=$false I3=$false O=$abc$159056$n3562 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[241] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5575_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5416_1 I2=$abc$159056$n5549_1 I3=$abc$159056$n5577_1 O=$abc$159056$n5576_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5578_1 I1=murax.system_drygascon128.core.c[118] I2=murax.system_drygascon128.core.c[182] I3=$false O=$abc$159056$n5577_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[54] I1=murax.system_drygascon128.core.c[310] I2=murax.system_drygascon128.core.c[246] I3=$false O=$abc$159056$n5578_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5580_1 I1=$abc$159056$n5581_1 I2=$false I3=$false O=$abc$159056$n3565 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[243] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5580_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5457_1 I2=$abc$159056$n5375 I3=$abc$159056$n5559_1 O=$abc$159056$n5581_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5583_1 I1=$abc$159056$n5584_1 I2=$false I3=$false O=$abc$159056$n3568 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[244] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5583_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5466_1 I2=$abc$159056$n5384 I3=$abc$159056$n5564 O=$abc$159056$n5584_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5586 I1=$abc$159056$n5587 I2=$false I3=$false O=$abc$159056$n3571 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[245] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5586 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5436_1 I2=$abc$159056$n5393 I3=$abc$159056$n5569_1 O=$abc$159056$n5587 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5589 I1=$abc$159056$n5590 I2=$false I3=$false O=$abc$159056$n3574 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[114] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5589 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3717 I2=$abc$159056$n5091 I3=$abc$159056$n5154 O=$abc$159056$n5590 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5592 I1=$abc$159056$n5593 I2=$false I3=$false O=$abc$159056$n3577 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[246] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5592 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5442_1 I2=$abc$159056$n5401_1 I3=$abc$159056$n5577_1 O=$abc$159056$n5593 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5595 I1=$abc$159056$n5596 I2=$false I3=$false O=$abc$159056$n3580 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[247] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5595 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5449 I2=$abc$159056$n5367_1 I3=$abc$159056$n5411 O=$abc$159056$n5596 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5598 I1=$abc$159056$n5599_1 I2=$false I3=$false O=$abc$159056$n3583 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[248] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5598 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5456_1 I2=$abc$159056$n5375 I3=$abc$159056$n5418_1 O=$abc$159056$n5599_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5601 I1=$abc$159056$n5602_1 I2=$false I3=$false O=$abc$159056$n3586 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[115] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5601 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3756 I2=$abc$159056$n3931_1 I3=$abc$159056$n5150 O=$abc$159056$n5602_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5604 I1=$abc$159056$n5605 I2=$false I3=$false O=$abc$159056$n3589 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[249] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5604 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5464 I2=$abc$159056$n5384 I3=$abc$159056$n5428_1 O=$abc$159056$n5605 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5607_1 I1=$abc$159056$n5608 I2=$false I3=$false O=$abc$159056$n3592 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[116] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5607_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5096 I2=$abc$159056$n5080 I3=$abc$159056$n5146 O=$abc$159056$n5608 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5610 I1=$abc$159056$n5611 I2=$false I3=$false O=$abc$159056$n3595 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[117] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5610 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5090 I2=$abc$159056$n5074 I3=$abc$159056$n5142 O=$abc$159056$n5611 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5613 I1=$abc$159056$n5614 I2=$false I3=$false O=$abc$159056$n3598 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[251] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5613 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5615_1 I2=$abc$159056$n5401_1 I3=$abc$159056$n5479_1 O=$abc$159056$n5614 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4359 I1=$abc$159056$n3255 I2=$abc$159056$n3258 I3=$abc$159056$n3246 O=$abc$159056$n5615_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111001000001 .gate SB_LUT4 I0=$abc$159056$n5617 I1=$abc$159056$n5618_1 I2=$false I3=$false O=$abc$159056$n3601 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[118] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5617 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5084 I2=$abc$159056$n3885 I3=$abc$159056$n5138 O=$abc$159056$n5618_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5620 I1=$abc$159056$n5621_1 I2=$false I3=$false O=$abc$159056$n3604 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[119] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5620 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5079 I2=$abc$159056$n3863 I3=$abc$159056$n5134 O=$abc$159056$n5621_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5623 I1=$abc$159056$n5624_1 I2=$false I3=$false O=$abc$159056$n3607 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[252] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5623 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5625_1 I2=$abc$159056$n5411 I3=$abc$159056$n5438 O=$abc$159056$n5624_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4351_1 I1=$abc$159056$n4344 I2=$abc$159056$n4347 I3=$abc$159056$n5626 O=$abc$159056$n5625_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n4351_1 I1=$abc$159056$n4344 I2=$abc$159056$n7728 I3=$abc$159056$n4341 O=$abc$159056$n5626 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5628_1 I1=$abc$159056$n5629 I2=$false I3=$false O=$abc$159056$n3610 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[120] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5628_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5073 I2=$abc$159056$n3924 I3=$abc$159056$n5130 O=$abc$159056$n5629 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5631_1 I1=$abc$159056$n5632 I2=$false I3=$false O=$abc$159056$n3613 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[253] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5631_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5633_1 I2=$abc$159056$n5418_1 I3=$abc$159056$n5444 O=$abc$159056$n5632 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4323 I1=$abc$159056$n4319 I2=$abc$159056$n4316 I3=$abc$159056$n5634_1 O=$abc$159056$n5633_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n4323 I1=$abc$159056$n4319 I2=$abc$159056$n7725 I3=$abc$159056$n4313 O=$abc$159056$n5634_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5636_1 I1=$abc$159056$n5637_1 I2=$false I3=$false O=$abc$159056$n3616 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[254] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5636_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5638 I2=$abc$159056$n5428_1 I3=$abc$159056$n5451_1 O=$abc$159056$n5637_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n4280 I1=$abc$159056$n4273 I2=$abc$159056$n4276 I3=$abc$159056$n5639_1 O=$abc$159056$n5638 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100110110110010 .gate SB_LUT4 I0=$abc$159056$n4280 I1=$abc$159056$n4273 I2=$abc$159056$n7722 I3=$abc$159056$n4270 O=$abc$159056$n5639_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5641 I1=$abc$159056$n5642_1 I2=$false I3=$false O=$abc$159056$n3619 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[255] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5641 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5643_1 I2=$abc$159056$n5459_1 I3=$abc$159056$n5645_1 O=$abc$159056$n5642_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4245 I1=$abc$159056$n4254 I2=$abc$159056$n4251 I3=$abc$159056$n5644 O=$abc$159056$n5643_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n4245 I1=$abc$159056$n4251 I2=$abc$159056$n4248 I3=$abc$159056$n4258 O=$abc$159056$n5644 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5646_1 I1=murax.system_drygascon128.core.c[127] I2=murax.system_drygascon128.core.c[191] I3=$false O=$abc$159056$n5645_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01101001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[63] I1=murax.system_drygascon128.core.c[319] I2=murax.system_drygascon128.core.c[255] I3=$false O=$abc$159056$n5646_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000001 .gate SB_LUT4 I0=$abc$159056$n5648_1 I1=$abc$159056$n5650 I2=$false I3=$false O=$abc$159056$n3622 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[258] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5648_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3204 I1=$abc$159056$n3212 I2=$abc$159056$n4932_1 I3=$false O=$abc$159056$n5649_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3966 I2=$abc$159056$n4154 I3=$abc$159056$n4409_1 O=$abc$159056$n5650 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5652_1 I1=$abc$159056$n5653_1 I2=$false I3=$false O=$abc$159056$n3625 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[259] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5652_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4123 I2=$abc$159056$n4934_1 I3=$abc$159056$n4213_1 O=$abc$159056$n5653_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5655_1 I1=$abc$159056$n5656_1 I2=$false I3=$false O=$abc$159056$n3628 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[260] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5655_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4108 I2=$abc$159056$n4358 I3=$abc$159056$n4331 O=$abc$159056$n5656_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5658_1 I1=$abc$159056$n5659_1 I2=$false I3=$false O=$abc$159056$n3631 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[261] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5658_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4093_1 I2=$abc$159056$n4350 I3=$abc$159056$n4186_1 O=$abc$159056$n5659_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5661_1 I1=$abc$159056$n5662_1 I2=$false I3=$false O=$abc$159056$n3634 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[262] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5661_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4075_1 I2=$abc$159056$n4322 I3=$abc$159056$n4386 O=$abc$159056$n5662_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5664_1 I1=$abc$159056$n5665_1 I2=$false I3=$false O=$abc$159056$n3637 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[263] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5664_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4057_1 I2=$abc$159056$n4279 I3=$abc$159056$n4380_1 O=$abc$159056$n5665_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5667_1 I1=$abc$159056$n5668_1 I2=$false I3=$false O=$abc$159056$n3640 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[264] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5667_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4021_1 I2=$abc$159056$n4244_1 I3=$abc$159056$n4371 O=$abc$159056$n5668_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5670_1 I1=$abc$159056$n5671_1 I2=$false I3=$false O=$abc$159056$n3643 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[265] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5670_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3994_1 I2=$abc$159056$n4218 I3=$abc$159056$n4172 O=$abc$159056$n5671_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5673_1 I1=$abc$159056$n5674_1 I2=$false I3=$false O=$abc$159056$n3646 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[266] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5673_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5675_1 I2=$abc$159056$n4191 I3=$abc$159056$n4142_1 O=$abc$159056$n5674_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3735 I1=$abc$159056$n3748_1 I2=$abc$159056$n3939 I3=$false O=$abc$159056$n5675_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n5677_1 I1=$abc$159056$n5678_1 I2=$false I3=$false O=$abc$159056$n3649 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[267] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5677_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4068 I2=$abc$159056$n4394 I3=$abc$159056$n4111 O=$abc$159056$n5678_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5680_1 I1=$abc$159056$n5681 I2=$false I3=$false O=$abc$159056$n3652 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[268] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5680_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4045_1 I2=$abc$159056$n4177 I3=$abc$159056$n4096_1 O=$abc$159056$n5681 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5683_1 I1=$abc$159056$n5684 I2=$false I3=$false O=$abc$159056$n3655 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[269] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5683_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4008 I2=$abc$159056$n4147 I3=$abc$159056$n4078_1 O=$abc$159056$n5684 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5686_1 I1=$abc$159056$n5687 I2=$false I3=$false O=$abc$159056$n3658 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[270] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5686_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3966 I2=$abc$159056$n4116_1 I3=$abc$159056$n4059 O=$abc$159056$n5687 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5689_1 I1=$abc$159056$n5690 I2=$false I3=$false O=$abc$159056$n3661 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[271] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5689_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5691_1 I2=$abc$159056$n4934_1 I3=$abc$159056$n4024_1 O=$abc$159056$n5690 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3322 I1=$abc$159056$n3335 I2=$abc$159056$n4101 I3=$false O=$abc$159056$n5691_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n5693 I1=$abc$159056$n5694_1 I2=$false I3=$false O=$abc$159056$n3664 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[272] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5693 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4086 I2=$abc$159056$n4358 I3=$abc$159056$n3996 O=$abc$159056$n5694_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5696 I1=$abc$159056$n3241 I2=$abc$159056$n5626 I3=$abc$159056$n5697_1 O=$abc$159056$n3667 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[133] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5696 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[229] I1=murax.system_drygascon128.core.c[293] I2=$abc$159056$n5644 I3=$abc$159056$n5469_1 O=$abc$159056$n5697_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n5699 I1=$abc$159056$n5700_1 I2=$false I3=$false O=$abc$159056$n3670 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[273] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5699 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4066_1 I2=$abc$159056$n4350 I3=$abc$159056$n3942 O=$abc$159056$n5700_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5702_1 I1=$abc$159056$n5703_1 I2=$false I3=$false O=$abc$159056$n3673 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[274] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5702_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4050 I2=$abc$159056$n4322 I3=$abc$159056$n4180 O=$abc$159056$n5703_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5705_1 I1=$abc$159056$n5706_1 I2=$false I3=$false O=$abc$159056$n3676 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[134] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5705_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5634_1 I2=$abc$159056$n5478 I3=$abc$159056$n5707_1 O=$abc$159056$n5706_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[230] I1=murax.system_drygascon128.core.c[294] I2=murax.system_drygascon128.core.c[102] I3=murax.system_drygascon128.core.c[166] O=$abc$159056$n5707_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5709_1 I1=$abc$159056$n5710_1 I2=$false I3=$false O=$abc$159056$n3679 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[275] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5709_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4010 I2=$abc$159056$n4279 I3=$abc$159056$n4149_1 O=$abc$159056$n5710_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5712_1 I1=$abc$159056$n5713_1 I2=$false I3=$false O=$abc$159056$n3682 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[276] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5712_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3971 I2=$abc$159056$n4244_1 I3=$abc$159056$n4118 O=$abc$159056$n5713_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5715_1 I1=$abc$159056$n5716_1 I2=$false I3=$false O=$abc$159056$n3685 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[277] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5715_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5717_1 I2=$abc$159056$n4218 I3=$abc$159056$n4103 O=$abc$159056$n5716_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4291 I1=$abc$159056$n4295 I2=$abc$159056$n4284 I3=$false O=$abc$159056$n5717_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n5719_1 I1=$abc$159056$n3241 I2=$abc$159056$n5720_1 I3=$abc$159056$n5644 O=$abc$159056$n3688 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[136] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5719_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n5492 I1=$abc$159056$n5721_1 I2=$false I3=$false O=$abc$159056$n5720_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[232] I1=murax.system_drygascon128.core.c[296] I2=$abc$159056$n5501 I3=$false O=$abc$159056$n5721_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n5723_1 I1=$abc$159056$n5724_1 I2=$false I3=$false O=$abc$159056$n3691 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[278] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5723_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4154 I2=$abc$159056$n4191 I3=$abc$159056$n4088 O=$abc$159056$n5724_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5726_1 I1=$abc$159056$n5727_1 I2=$false I3=$false O=$abc$159056$n3694 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[279] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5726_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4123 I2=$abc$159056$n4394 I3=$abc$159056$n4070 O=$abc$159056$n5727_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5729_1 I1=$abc$159056$n5730_1 I2=$false I3=$false O=$abc$159056$n3697 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[280] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5729_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4108 I2=$abc$159056$n4177 I3=$abc$159056$n4052 O=$abc$159056$n5730_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5732_1 I1=$abc$159056$n5733_1 I2=$false I3=$false O=$abc$159056$n3700 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[138] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5732_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5485_1 I2=$abc$159056$n5506 I3=$abc$159056$n5734_1 O=$abc$159056$n5733_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[234] I1=murax.system_drygascon128.core.c[298] I2=murax.system_drygascon128.core.c[106] I3=murax.system_drygascon128.core.c[170] O=$abc$159056$n5734_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5736_1 I1=$abc$159056$n5737_1 I2=$false I3=$false O=$abc$159056$n3703 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[140] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5736_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5738_1 I2=$abc$159056$n5499 I3=$abc$159056$n5739_1 O=$abc$159056$n5737_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3329 I1=$abc$159056$n3326 I2=$abc$159056$n5366 I3=$false O=$abc$159056$n5738_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[236] I1=murax.system_drygascon128.core.c[300] I2=murax.system_drygascon128.core.c[108] I3=murax.system_drygascon128.core.c[172] O=$abc$159056$n5739_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5741_1 I1=$abc$159056$n5742_1 I2=$false I3=$false O=$abc$159056$n3706 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[281] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5741_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4093_1 I2=$abc$159056$n4147 I3=$abc$159056$n4016 O=$abc$159056$n5742_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5744_1 I1=$abc$159056$n5745_1 I2=$false I3=$false O=$abc$159056$n3709 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[282] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5744_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4075_1 I2=$abc$159056$n4116_1 I3=$abc$159056$n3989 O=$abc$159056$n5745_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5747_1 I1=$abc$159056$n5748_1 I2=$false I3=$false O=$abc$159056$n3712 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[142] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5747_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5381 I2=$abc$159056$n5513 I3=$abc$159056$n5749_1 O=$abc$159056$n5748_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[238] I1=murax.system_drygascon128.core.c[302] I2=murax.system_drygascon128.core.c[110] I3=murax.system_drygascon128.core.c[174] O=$abc$159056$n5749_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5751_1 I1=$abc$159056$n5752_1 I2=$false I3=$false O=$abc$159056$n3715 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[283] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5751_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5691_1 I2=$abc$159056$n4057_1 I3=$abc$159056$n4081_1 O=$abc$159056$n5752_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5754_1 I1=$abc$159056$n5755_1 I2=$false I3=$false O=$abc$159056$n3718 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[284] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5754_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4021_1 I2=$abc$159056$n4086 I3=$abc$159056$n4061 O=$abc$159056$n5755_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5757_1 I1=$abc$159056$n5758_1 I2=$false I3=$false O=$abc$159056$n3721 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[285] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5757_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3994_1 I2=$abc$159056$n4066_1 I3=$abc$159056$n4026 O=$abc$159056$n5758_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5760_1 I1=$abc$159056$n5761_1 I2=$false I3=$false O=$abc$159056$n3724 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[286] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5760_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5675_1 I2=$abc$159056$n4050 I3=$abc$159056$n3999 O=$abc$159056$n5761_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5763_1 I1=$abc$159056$n5764_1 I2=$false I3=$false O=$abc$159056$n3727 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[288] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5763_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4358 I2=$abc$159056$n3942 I3=$abc$159056$n4026 O=$abc$159056$n5764_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5766_1 I1=$abc$159056$n5767 I2=$false I3=$false O=$abc$159056$n3730 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[145] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5766_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5364_1 I2=$abc$159056$n5381 I3=$abc$159056$n5768 O=$abc$159056$n5767 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[241] I1=murax.system_drygascon128.core.c[305] I2=murax.system_drygascon128.core.c[113] I3=murax.system_drygascon128.core.c[177] O=$abc$159056$n5768 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5770 I1=$abc$159056$n5771 I2=$false I3=$false O=$abc$159056$n3733 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[290] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5770 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4322 I2=$abc$159056$n3945 I3=$abc$159056$n4149_1 O=$abc$159056$n5771 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5773 I1=$abc$159056$n5774 I2=$false I3=$false O=$abc$159056$n3736 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[292] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5773 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4244_1 I2=$abc$159056$n4103 I3=$abc$159056$n4239_1 O=$abc$159056$n5774 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5776 I1=$abc$159056$n5777 I2=$false I3=$false O=$abc$159056$n3739 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[294] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5776 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4191 I2=$abc$159056$n4070 I3=$abc$159056$n4213_1 O=$abc$159056$n5777 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5779 I1=$abc$159056$n5780 I2=$false I3=$false O=$abc$159056$n3742 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[296] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5779 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4177 I2=$abc$159056$n4016 I3=$abc$159056$n4186_1 O=$abc$159056$n5780 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5782_1 I1=$abc$159056$n5783_1 I2=$false I3=$false O=$abc$159056$n3745 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[298] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5782_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4116_1 I2=$abc$159056$n4081_1 I3=$abc$159056$n4380_1 O=$abc$159056$n5783_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5785_1 I1=$abc$159056$n5786_1 I2=$false I3=$false O=$abc$159056$n3748 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[300] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5785_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4086 I2=$abc$159056$n4026 I3=$abc$159056$n4172 O=$abc$159056$n5786_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5788_1 I1=$abc$159056$n5789_1 I2=$false I3=$false O=$abc$159056$n3751 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[302] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5788_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4050 I2=$abc$159056$n3945 I3=$abc$159056$n4111 O=$abc$159056$n5789_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5791_1 I1=$abc$159056$n5792_1 I2=$false I3=$false O=$abc$159056$n3754 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[304] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5791_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3971 I2=$abc$159056$n4078_1 I3=$abc$159056$n4239_1 O=$abc$159056$n5792_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5794_1 I1=$abc$159056$n5795_1 I2=$false I3=$false O=$abc$159056$n3757 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[306] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5794_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4154 I2=$abc$159056$n4024_1 I3=$abc$159056$n4213_1 O=$abc$159056$n5795_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5797_1 I1=$abc$159056$n5798_1 I2=$false I3=$false O=$abc$159056$n3760 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[308] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5797_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4108 I2=$abc$159056$n3942 I3=$abc$159056$n4186_1 O=$abc$159056$n5798_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5800_1 I1=$abc$159056$n5801_1 I2=$false I3=$false O=$abc$159056$n3763 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[310] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5800_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4075_1 I2=$abc$159056$n4149_1 I3=$abc$159056$n4380_1 O=$abc$159056$n5801_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5803_1 I1=$abc$159056$n5804_1 I2=$false I3=$false O=$abc$159056$n3766 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[312] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5803_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4021_1 I2=$abc$159056$n4103 I3=$abc$159056$n4172 O=$abc$159056$n5804_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5806_1 I1=$abc$159056$n5807_1 I2=$false I3=$false O=$abc$159056$n3769 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[153] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5806_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5410_1 I2=$abc$159056$n5458 I3=$abc$159056$n5808_1 O=$abc$159056$n5807_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[249] I1=murax.system_drygascon128.core.c[313] I2=murax.system_drygascon128.core.c[121] I3=murax.system_drygascon128.core.c[185] O=$abc$159056$n5808_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5810_1 I1=$abc$159056$n5811_1 I2=$false I3=$false O=$abc$159056$n3772 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[314] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5810_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5675_1 I2=$abc$159056$n4070 I3=$abc$159056$n4111 O=$abc$159056$n5811_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5813_1 I1=$abc$159056$n5814_1 I2=$false I3=$false O=$abc$159056$n3775 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[316] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5813_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4045_1 I2=$abc$159056$n4016 I3=$abc$159056$n4078_1 O=$abc$159056$n5814_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5816_1 I1=$abc$159056$n5817_1 I2=$false I3=$false O=$abc$159056$n3778 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[287] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5816_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4010 I2=$abc$159056$n4068 I3=$abc$159056$n3945 O=$abc$159056$n5817_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5819_1 I1=$abc$159056$n5820_1 I2=$false I3=$false O=$abc$159056$n3781 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[289] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5819_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4350 I2=$abc$159056$n3999 I3=$abc$159056$n4180 O=$abc$159056$n5820_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5822_1 I1=$abc$159056$n5823_1 I2=$false I3=$false O=$abc$159056$n3784 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[291] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5822_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4279 I2=$abc$159056$n4118 I3=$abc$159056$n5209_1 O=$abc$159056$n5823_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5825_1 I1=$abc$159056$n5826_1 I2=$false I3=$false O=$abc$159056$n3787 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[293] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5825_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4218 I2=$abc$159056$n4088 I3=$abc$159056$n4409_1 O=$abc$159056$n5826_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5828_1 I1=$abc$159056$n5829_1 I2=$false I3=$false O=$abc$159056$n3790 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[295] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5828_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4394 I2=$abc$159056$n4052 I3=$abc$159056$n4331 O=$abc$159056$n5829_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5831_1 I1=$abc$159056$n5832_1 I2=$false I3=$false O=$abc$159056$n3793 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[297] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5831_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4147 I2=$abc$159056$n3989 I3=$abc$159056$n4386 O=$abc$159056$n5832_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5834_1 I1=$abc$159056$n5835_1 I2=$false I3=$false O=$abc$159056$n3796 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[299] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5834_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5691_1 I2=$abc$159056$n4061 I3=$abc$159056$n4371 O=$abc$159056$n5835_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5837_1 I1=$abc$159056$n5838_1 I2=$false I3=$false O=$abc$159056$n3799 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[301] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5837_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4066_1 I2=$abc$159056$n3999 I3=$abc$159056$n4142_1 O=$abc$159056$n5838_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5840_1 I1=$abc$159056$n5841_1 I2=$false I3=$false O=$abc$159056$n3802 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[303] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5840_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4010 I2=$abc$159056$n4096_1 I3=$abc$159056$n5209_1 O=$abc$159056$n5841_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5843_1 I1=$abc$159056$n5844_1 I2=$false I3=$false O=$abc$159056$n3805 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[305] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5843_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5717_1 I2=$abc$159056$n4059 I3=$abc$159056$n4409_1 O=$abc$159056$n5844_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5846_1 I1=$abc$159056$n5847_1 I2=$false I3=$false O=$abc$159056$n3808 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[307] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5846_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4123 I2=$abc$159056$n3996 I3=$abc$159056$n4331 O=$abc$159056$n5847_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5849_1 I1=$abc$159056$n5850_1 I2=$false I3=$false O=$abc$159056$n3811 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[309] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5849_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4093_1 I2=$abc$159056$n4180 I3=$abc$159056$n4386 O=$abc$159056$n5850_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5852_1 I1=$abc$159056$n3241 I2=$abc$159056$n5465_1 I3=$abc$159056$n5854_1 O=$abc$159056$n3814 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[161] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5852_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=$abc$159056$n3936 I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3204 O=$abc$159056$n5853_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[225] I1=murax.system_drygascon128.core.c[289] I2=$abc$159056$n5855_1 I3=$abc$159056$n3261 O=$abc$159056$n5854_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[228] I1=murax.system_drygascon128.core.c[292] I2=$abc$159056$n5460_1 I3=$false O=$abc$159056$n5855_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n5857_1 I1=$abc$159056$n5858_1 I2=$false I3=$false O=$abc$159056$n3817 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[311] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5857_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4057_1 I2=$abc$159056$n4118 I3=$abc$159056$n4371 O=$abc$159056$n5858_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5860_1 I1=$abc$159056$n5861_1 I2=$false I3=$false O=$abc$159056$n3820 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[313] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5860_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3994_1 I2=$abc$159056$n4088 I3=$abc$159056$n4142_1 O=$abc$159056$n5861_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5863_1 I1=$abc$159056$n3241 I2=$abc$159056$n5864_1 I3=$abc$159056$n5865_1 O=$abc$159056$n3823 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[162] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5863_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4935 I1=$abc$159056$n4941 I2=$abc$159056$n8015_1 I3=$abc$159056$n4938_1 O=$abc$159056$n5864_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[229] I1=murax.system_drygascon128.core.c[293] I2=$abc$159056$n5866_1 I3=$abc$159056$n5469_1 O=$abc$159056$n5865_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[226] I1=murax.system_drygascon128.core.c[290] I2=$abc$159056$n5445_1 I3=$false O=$abc$159056$n5866_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n5868_1 I1=$abc$159056$n5869_1 I2=$false I3=$false O=$abc$159056$n3826 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[315] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n4931_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5868_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n4068 I2=$abc$159056$n4052 I3=$abc$159056$n4096_1 O=$abc$159056$n5869_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5873_1 I1=$abc$159056$n5872_1 I2=$abc$159056$n5871_1 I3=murax.system_drygascon128.core.r[127] O=$abc$159056$n3831 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[127] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n4397_1 I3=$abc$159056$n3660 O=$abc$159056$n5871_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4422 I1=murax.system_drygascon128.core.c[127] I2=murax.system_drygascon128.core.c[159] I3=$abc$159056$n4403 O=$abc$159056$n5872_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000010111110 .gate SB_LUT4 I0=$abc$159056$n4401_1 I1=murax.system_drygascon128.core.c[127] I2=murax.system_drygascon128.core.c[159] I3=$false O=$abc$159056$n5873_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010100 .gate SB_LUT4 I0=$abc$159056$n5875_1 I1=$abc$159056$n3241 I2=$abc$159056$n5876_1 I3=$abc$159056$n5634_1 O=$abc$159056$n3835 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[165] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5875_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[229] I1=murax.system_drygascon128.core.c[293] I2=$abc$159056$n5721_1 I3=$abc$159056$n5469_1 O=$abc$159056$n5876_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5878_1 I1=$abc$159056$n5879_1 I2=$false I3=$false O=$abc$159056$n3838 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[166] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5878_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5639_1 I2=$abc$159056$n5707_1 I3=$abc$159056$n5880_1 O=$abc$159056$n5879_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[233] I1=murax.system_drygascon128.core.c[297] I2=murax.system_drygascon128.core.c[105] I3=murax.system_drygascon128.core.c[169] O=$abc$159056$n5880_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5882_1 I1=$abc$159056$n5883_1 I2=$false I3=$false O=$abc$159056$n3841 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[150] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5882_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5383_1 I2=$abc$159056$n5410_1 I3=$abc$159056$n5884_1 O=$abc$159056$n5883_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[246] I1=murax.system_drygascon128.core.c[310] I2=murax.system_drygascon128.core.c[118] I3=murax.system_drygascon128.core.c[182] O=$abc$159056$n5884_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5886_1 I1=$abc$159056$n5887_1 I2=$false I3=$false O=$abc$159056$n3844 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[156] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5886_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5443_1 I2=$abc$159056$n5458 I3=$abc$159056$n5888_1 O=$abc$159056$n5887_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[252] I1=murax.system_drygascon128.core.c[316] I2=murax.system_drygascon128.core.c[124] I3=murax.system_drygascon128.core.c[188] O=$abc$159056$n5888_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5890_1 I1=$abc$159056$n5891_1 I2=$false I3=$false O=$abc$159056$n3847 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[163] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5890_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3245 I2=$abc$159056$n5707_1 I3=$abc$159056$n5892_1 O=$abc$159056$n5891_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[227] I1=murax.system_drygascon128.core.c[291] I2=murax.system_drygascon128.core.c[99] I3=murax.system_drygascon128.core.c[163] O=$abc$159056$n5892_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5894_1 I1=$abc$159056$n3241 I2=$abc$159056$n5639_1 I3=$abc$159056$n5895_1 O=$abc$159056$n3850 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[132] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5894_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3245 I1=$abc$159056$n5855_1 I2=$false I3=$false O=$abc$159056$n5895_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5897_1 I1=$abc$159056$n5898_1 I2=$false I3=$false O=$abc$159056$n3853 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[101] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5897_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5105 I2=$abc$159056$n3924 I3=$abc$159056$n5154 O=$abc$159056$n5898_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5900_1 I1=$abc$159056$n5901_1 I2=$false I3=$false O=$abc$159056$n3856 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[151] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5900_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5392_1 I2=$abc$159056$n5417 I3=$abc$159056$n5902_1 O=$abc$159056$n5901_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[247] I1=murax.system_drygascon128.core.c[311] I2=murax.system_drygascon128.core.c[119] I3=murax.system_drygascon128.core.c[183] O=$abc$159056$n5902_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5904_1 I1=$abc$159056$n5905_1 I2=$false I3=$false O=$abc$159056$n3859 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[158] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5904_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3262 I2=$abc$159056$n5906_1 I3=$abc$159056$n5907_1 O=$abc$159056$n5905_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n3742_1 I1=$abc$159056$n3739_1 I2=$abc$159056$n5437_1 I3=$false O=$abc$159056$n5906_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[254] I1=murax.system_drygascon128.core.c[318] I2=murax.system_drygascon128.core.c[126] I3=murax.system_drygascon128.core.c[190] O=$abc$159056$n5907_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5909_1 I1=$abc$159056$n5910_1 I2=$false I3=$false O=$abc$159056$n3862 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[123] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5909_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3907_1 I2=$abc$159056$n3382 I3=$abc$159056$n5116 O=$abc$159056$n5910_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5912_1 I1=$abc$159056$n5913_1 I2=$false I3=$false O=$abc$159056$n3865 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[126] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5912_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3360 I2=$abc$159056$n3798 I3=$abc$159056$n5180 O=$abc$159056$n5913_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5915_1 I1=$abc$159056$n5916_1 I2=$false I3=$false O=$abc$159056$n3868 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[143] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5915_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5738_1 I2=$abc$159056$n5390 I3=$abc$159056$n5917 O=$abc$159056$n5916_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[239] I1=murax.system_drygascon128.core.c[303] I2=murax.system_drygascon128.core.c[111] I3=murax.system_drygascon128.core.c[175] O=$abc$159056$n5917 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5919 I1=$abc$159056$n3241 I2=$abc$159056$n5920 I3=$abc$159056$n5626 O=$abc$159056$n3871 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[164] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5919 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[231] I1=murax.system_drygascon128.core.c[295] I2=$abc$159056$n5855_1 I3=$abc$159056$n5494 O=$abc$159056$n5920 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5922 I1=$abc$159056$n5923 I2=$false I3=$false O=$abc$159056$n3874 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[127] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5922 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3734 I2=$abc$159056$n3824 I3=$abc$159056$n5091 O=$abc$159056$n5923 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5925 I1=$abc$159056$n3241 I2=$abc$159056$n5926 I3=$abc$159056$n5467 O=$abc$159056$n3877 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[154] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5925 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[250] I1=murax.system_drygascon128.core.c[314] I2=$abc$159056$n5417 I3=$abc$159056$n5394_1 O=$abc$159056$n5926 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n5928 I1=$abc$159056$n5929 I2=$false I3=$false O=$abc$159056$n3880 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[159] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5928 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5465_1 I2=$abc$159056$n5443_1 I3=$abc$159056$n5930 O=$abc$159056$n5929 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[255] I1=murax.system_drygascon128.core.c[319] I2=murax.system_drygascon128.core.c[127] I3=murax.system_drygascon128.core.c[191] O=$abc$159056$n5930 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5932_1 I1=$abc$159056$n3241 I2=$abc$159056$n5933 I3=$abc$159056$n5399 O=$abc$159056$n3883 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[152] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5932_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[248] I1=murax.system_drygascon128.core.c[312] I2=$abc$159056$n5427_1 I3=$abc$159056$n5376_1 O=$abc$159056$n5933 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5935 I1=$abc$159056$n3241 I2=$abc$159056$n5936_1 I3=$abc$159056$n5465_1 O=$abc$159056$n3886 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[130] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5935 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n5626 I1=$abc$159056$n5866_1 I2=$false I3=$false O=$abc$159056$n5936_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n5938_1 I1=$abc$159056$n5939_1 I2=$false I3=$false O=$abc$159056$n3889 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[148] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5938_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5364_1 I2=$abc$159056$n5392_1 I3=$abc$159056$n5940 O=$abc$159056$n5939_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[244] I1=murax.system_drygascon128.core.c[308] I2=murax.system_drygascon128.core.c[116] I3=murax.system_drygascon128.core.c[180] O=$abc$159056$n5940 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5942_1 I1=$abc$159056$n5943_1 I2=$false I3=$false O=$abc$159056$n3892 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[149] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5942_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5944_1 I2=$abc$159056$n5399 I3=$abc$159056$n5945_1 O=$abc$159056$n5943_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4288 I1=$abc$159056$n4285 I2=$abc$159056$n5374_1 I3=$false O=$abc$159056$n5944_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[245] I1=murax.system_drygascon128.core.c[309] I2=murax.system_drygascon128.core.c[117] I3=murax.system_drygascon128.core.c[181] O=$abc$159056$n5945_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5947_1 I1=$abc$159056$n5948_1 I2=$false I3=$false O=$abc$159056$n3895 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[131] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5947_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5634_1 I2=$abc$159056$n5864_1 I3=$abc$159056$n5892_1 O=$abc$159056$n5948_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5950_1 I1=$abc$159056$n3241 I2=$abc$159056$n5951_1 I3=$abc$159056$n5644 O=$abc$159056$n3898 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[167] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5950_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[231] I1=murax.system_drygascon128.core.c[295] I2=$abc$159056$n5494 I3=$abc$159056$n5734_1 O=$abc$159056$n5951_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5953_1 I1=$abc$159056$n3241 I2=$abc$159056$n5954_1 I3=$abc$159056$n5478 O=$abc$159056$n3901 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[168] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5953_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[235] I1=murax.system_drygascon128.core.c[299] I2=$abc$159056$n5721_1 I3=$abc$159056$n5520 O=$abc$159056$n5954_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5956_1 I1=$abc$159056$n5957_1 I2=$false I3=$false O=$abc$159056$n3904 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[169] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5956_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5485_1 I2=$abc$159056$n5739_1 I3=$abc$159056$n5880_1 O=$abc$159056$n5957_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5959_1 I1=$abc$159056$n5960_1 I2=$false I3=$false O=$abc$159056$n3907 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[170] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5959_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5492 I2=$abc$159056$n5734_1 I3=$abc$159056$n5961_1 O=$abc$159056$n5960_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[237] I1=murax.system_drygascon128.core.c[301] I2=murax.system_drygascon128.core.c[109] I3=murax.system_drygascon128.core.c[173] O=$abc$159056$n5961_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5963_1 I1=$abc$159056$n3241 I2=$abc$159056$n5964_1 I3=$abc$159056$n5499 O=$abc$159056$n3910 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[171] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5963_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[235] I1=murax.system_drygascon128.core.c[299] I2=$abc$159056$n5520 I3=$abc$159056$n5749_1 O=$abc$159056$n5964_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5966_1 I1=$abc$159056$n5967_1 I2=$false I3=$false O=$abc$159056$n3913 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[172] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5966_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5506 I2=$abc$159056$n5739_1 I3=$abc$159056$n5917 O=$abc$159056$n5967_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5969_1 I1=$abc$159056$n5970 I2=$false I3=$false O=$abc$159056$n3916 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[173] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5969_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5513 I2=$abc$159056$n3240 I3=$abc$159056$n5961_1 O=$abc$159056$n5970 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5972_1 I1=$abc$159056$n5973 I2=$false I3=$false O=$abc$159056$n3919 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[174] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5972_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5738_1 I2=$abc$159056$n5749_1 I3=$abc$159056$n5768 O=$abc$159056$n5973 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5975 I1=$abc$159056$n5976_1 I2=$false I3=$false O=$abc$159056$n3922 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[97] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5975 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5129 I2=$abc$159056$n5080 I3=$abc$159056$n5170 O=$abc$159056$n5976_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n5978_1 I1=$abc$159056$n5979 I2=$false I3=$false O=$abc$159056$n3925 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[175] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5978_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3227 I2=$abc$159056$n5917 I3=$abc$159056$n5980_1 O=$abc$159056$n5979 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[242] I1=murax.system_drygascon128.core.c[306] I2=murax.system_drygascon128.core.c[114] I3=murax.system_drygascon128.core.c[178] O=$abc$159056$n5980_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n5982 I1=$abc$159056$n3241 I2=$abc$159056$n5381 I3=$abc$159056$n5983_1 O=$abc$159056$n3928 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[176] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5982 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n5984_1 I1=$abc$159056$n3240 I2=$false I3=$false O=$abc$159056$n5983_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[243] I1=murax.system_drygascon128.core.c[307] I2=$abc$159056$n5560 I3=$false O=$abc$159056$n5984_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n5986_1 I1=$abc$159056$n5987_1 I2=$false I3=$false O=$abc$159056$n3931 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[177] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5986_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5390 I2=$abc$159056$n5768 I3=$abc$159056$n5940 O=$abc$159056$n5987_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5989_1 I1=$abc$159056$n5990_1 I2=$false I3=$false O=$abc$159056$n3934 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[178] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5989_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3214 I2=$abc$159056$n5945_1 I3=$abc$159056$n5980_1 O=$abc$159056$n5990_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5992_1 I1=$abc$159056$n3241 I2=$abc$159056$n5993_1 I3=$abc$159056$n5364_1 O=$abc$159056$n3937 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[179] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5992_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n5984_1 I1=$abc$159056$n5884_1 I2=$false I3=$false O=$abc$159056$n5993_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n5995_1 I1=$abc$159056$n5996_1 I2=$false I3=$false O=$abc$159056$n3940 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[180] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5995_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5944_1 I2=$abc$159056$n5902_1 I3=$abc$159056$n5940 O=$abc$159056$n5996_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n5998_1 I1=$abc$159056$n3241 I2=$abc$159056$n5999_1 I3=$abc$159056$n5383_1 O=$abc$159056$n3943 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[181] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n5998_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[248] I1=murax.system_drygascon128.core.c[312] I2=$abc$159056$n5376_1 I3=$abc$159056$n5945_1 O=$abc$159056$n5999_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n6001_1 I1=$abc$159056$n6002_1 I2=$false I3=$false O=$abc$159056$n3946 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[182] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6001_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5392_1 I2=$abc$159056$n5808_1 I3=$abc$159056$n5884_1 O=$abc$159056$n6002_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6004_1 I1=$abc$159056$n3241 I2=$abc$159056$n6005_1 I3=$abc$159056$n5399 O=$abc$159056$n3949 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[183] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6004_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[250] I1=murax.system_drygascon128.core.c[314] I2=$abc$159056$n5394_1 I3=$abc$159056$n5902_1 O=$abc$159056$n6005_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n6007_1 I1=$abc$159056$n3241 I2=$abc$159056$n6008_1 I3=$abc$159056$n5410_1 O=$abc$159056$n3952 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[184] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6007_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[248] I1=murax.system_drygascon128.core.c[312] I2=$abc$159056$n5376_1 I3=$abc$159056$n6009 O=$abc$159056$n6008_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[251] I1=murax.system_drygascon128.core.c[315] I2=murax.system_drygascon128.core.c[123] I3=murax.system_drygascon128.core.c[187] O=$abc$159056$n6009 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n6011_1 I1=$abc$159056$n6012 I2=$false I3=$false O=$abc$159056$n3955 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[185] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6011_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5417 I2=$abc$159056$n5808_1 I3=$abc$159056$n5888_1 O=$abc$159056$n6012 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6014_1 I1=$abc$159056$n6015 I2=$false I3=$false O=$abc$159056$n3958 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[100] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6014_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5110 I2=$abc$159056$n3800 I3=$abc$159056$n3863 O=$abc$159056$n6015 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6017_1 I1=$abc$159056$n3241 I2=$abc$159056$n5427_1 I3=$abc$159056$n6018 O=$abc$159056$n3961 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[186] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6017_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[250] I1=murax.system_drygascon128.core.c[314] I2=$abc$159056$n6019_1 I3=$abc$159056$n5394_1 O=$abc$159056$n6018 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[253] I1=murax.system_drygascon128.core.c[317] I2=$abc$159056$n5419_1 I3=$false O=$abc$159056$n6019_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=$abc$159056$n6021 I1=$abc$159056$n6022_1 I2=$false I3=$false O=$abc$159056$n3964 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[187] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6021 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5458 I2=$abc$159056$n5907_1 I3=$abc$159056$n6009 O=$abc$159056$n6022_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6024 I1=$abc$159056$n6025_1 I2=$false I3=$false O=$abc$159056$n3967 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[188] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6024 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5467 I2=$abc$159056$n5888_1 I3=$abc$159056$n5930 O=$abc$159056$n6025_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6027 I1=$abc$159056$n3241 I2=$abc$159056$n6028_1 I3=$abc$159056$n5906_1 O=$abc$159056$n3970 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[189] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6027 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n6019_1 I1=$abc$159056$n6029_1 I2=$false I3=$false O=$abc$159056$n6028_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[224] I1=murax.system_drygascon128.core.c[288] I2=murax.system_drygascon128.core.c[96] I3=murax.system_drygascon128.core.c[160] O=$abc$159056$n6029_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n6031_1 I1=$abc$159056$n3241 I2=$abc$159056$n5443_1 I3=$abc$159056$n6032_1 O=$abc$159056$n3973 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[190] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6031_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[225] I1=murax.system_drygascon128.core.c[289] I2=$abc$159056$n3261 I3=$abc$159056$n5907_1 O=$abc$159056$n6032_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n6034_1 I1=$abc$159056$n3241 I2=$abc$159056$n6035_1 I3=$abc$159056$n5450_1 O=$abc$159056$n3976 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[191] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6034_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n5866_1 I1=$abc$159056$n5930 I2=$false I3=$false O=$abc$159056$n6035_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n6037_1 I1=$abc$159056$n6038_1 I2=$false I3=$false O=$abc$159056$n3979 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[192] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6037_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5449 I2=$abc$159056$n5625_1 I3=$abc$159056$n5500 O=$abc$159056$n6038_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6040_1 I1=$abc$159056$n6041_1 I2=$false I3=$false O=$abc$159056$n3982 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[193] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6040_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5456_1 I2=$abc$159056$n5633_1 I3=$abc$159056$n5507 O=$abc$159056$n6041_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6043_1 I1=$abc$159056$n6044_1 I2=$false I3=$false O=$abc$159056$n3985 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[194] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6043_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5464 I2=$abc$159056$n5638 I3=$abc$159056$n5514 O=$abc$159056$n6044_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6046_1 I1=$abc$159056$n6047_1 I2=$false I3=$false O=$abc$159056$n3988 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[195] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6046_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n6048 I2=$abc$159056$n5643_1 I3=$abc$159056$n5519 O=$abc$159056$n6047_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n4935 I1=$abc$159056$n4944 I2=$abc$159056$n4941 I3=$abc$159056$n5864_1 O=$abc$159056$n6048 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111001110001 .gate SB_LUT4 I0=$abc$159056$n6050_1 I1=$abc$159056$n6051 I2=$false I3=$false O=$abc$159056$n3991 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[196] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6050_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5615_1 I2=$abc$159056$n5477_1 I3=$abc$159056$n5524 O=$abc$159056$n6051 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6053_1 I1=$abc$159056$n6054 I2=$false I3=$false O=$abc$159056$n3994 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[197] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6053_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5625_1 I2=$abc$159056$n5484 I3=$abc$159056$n5529 O=$abc$159056$n6054 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6056_1 I1=$abc$159056$n6057 I2=$false I3=$false O=$abc$159056$n3997 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[198] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6056_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5633_1 I2=$abc$159056$n5491 I3=$abc$159056$n5534 O=$abc$159056$n6057 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6059 I1=$abc$159056$n6060_1 I2=$false I3=$false O=$abc$159056$n4000 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[199] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6059 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5638 I2=$abc$159056$n5498 I3=$abc$159056$n5539 O=$abc$159056$n6060_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6062_1 I1=$abc$159056$n6063_1 I2=$false I3=$false O=$abc$159056$n4003 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[200] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6062_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5505 I2=$abc$159056$n5643_1 I3=$abc$159056$n5544_1 O=$abc$159056$n6063_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6065_1 I1=$abc$159056$n6066_1 I2=$false I3=$false O=$abc$159056$n4006 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[201] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6065_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5477_1 I2=$abc$159056$n5512 I3=$abc$159056$n5549_1 O=$abc$159056$n6066_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6068_1 I1=$abc$159056$n6069_1 I2=$false I3=$false O=$abc$159056$n4009 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[202] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6068_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5365_1 I2=$abc$159056$n5484 I3=$abc$159056$n5554_1 O=$abc$159056$n6069_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6071_1 I1=$abc$159056$n6072_1 I2=$false I3=$false O=$abc$159056$n4012 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[203] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6071_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5372 I2=$abc$159056$n5491 I3=$abc$159056$n5559_1 O=$abc$159056$n6072_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6074_1 I1=$abc$159056$n6075_1 I2=$false I3=$false O=$abc$159056$n4015 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[102] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6074_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5100 I2=$abc$159056$n3316 I3=$abc$159056$n5150 O=$abc$159056$n6075_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6077_1 I1=$abc$159056$n6078_1 I2=$false I3=$false O=$abc$159056$n4018 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[204] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6077_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5380_1 I2=$abc$159056$n5498 I3=$abc$159056$n5564 O=$abc$159056$n6078_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6080_1 I1=$abc$159056$n6081_1 I2=$false I3=$false O=$abc$159056$n4021 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[205] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6080_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5389_1 I2=$abc$159056$n5505 I3=$abc$159056$n5569_1 O=$abc$159056$n6081_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6083_1 I1=$abc$159056$n6084_1 I2=$false I3=$false O=$abc$159056$n4024 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[206] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6083_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5400_1 I2=$abc$159056$n5512 I3=$abc$159056$n5577_1 O=$abc$159056$n6084_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6086_1 I1=$abc$159056$n6087_1 I2=$false I3=$false O=$abc$159056$n4027 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[215] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6086_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5391_1 I2=$abc$159056$n5457_1 I3=$abc$159056$n5645_1 O=$abc$159056$n6087_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6089_1 I1=$abc$159056$n6090_1 I2=$false I3=$false O=$abc$159056$n4030 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[216] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6089_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5398_1 I2=$abc$159056$n5466_1 I3=$abc$159056$n5479_1 O=$abc$159056$n6090_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6092_1 I1=$abc$159056$n6093_1 I2=$false I3=$false O=$abc$159056$n4033 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[109] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6092_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3829 I2=$abc$159056$n3929 I3=$abc$159056$n5121 O=$abc$159056$n6093_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6095_1 I1=$abc$159056$n6096_1 I2=$false I3=$false O=$abc$159056$n4036 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[222] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6095_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n6048 I2=$abc$159056$n5436_1 I3=$abc$159056$n5486_1 O=$abc$159056$n6096_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6098_1 I1=$abc$159056$n6099_1 I2=$false I3=$false O=$abc$159056$n4039 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[223] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] I2=$abc$159056$n5361_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6098_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5615_1 I2=$abc$159056$n5442_1 I3=$abc$159056$n5493 O=$abc$159056$n6099_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6101_1 I1=$abc$159056$n6102_1 I2=$false I3=$false O=$abc$159056$n4042 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[242] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6101_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5426 I2=$abc$159056$n5367_1 I3=$abc$159056$n5554_1 O=$abc$159056$n6102_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6104_1 I1=$abc$159056$n6105_1 I2=$false I3=$false O=$abc$159056$n4045 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[250] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n5475_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6104_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n6048 I2=$abc$159056$n5393 I3=$abc$159056$n5645_1 O=$abc$159056$n6105_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6107_1 I1=$abc$159056$n6108_1 I2=$false I3=$false O=$abc$159056$n4048 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[256] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6107_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3971 I2=$abc$159056$n4045_1 I3=$abc$159056$n5209_1 O=$abc$159056$n6108_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6110_1 I1=$abc$159056$n6111_1 I2=$false I3=$false O=$abc$159056$n4051 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[257] I1=murax.system_uartCtrl._zz_7_ I2=$abc$159056$n5649_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6110_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5717_1 I2=$abc$159056$n4008 I3=$abc$159056$n4239_1 O=$abc$159056$n6111_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6113_1 I1=$abc$159056$n3241 I2=$abc$159056$n5513 I3=$abc$159056$n6114_1 O=$abc$159056$n4054 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101010101011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[139] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6113_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[235] I1=murax.system_drygascon128.core.c[299] I2=$abc$159056$n5492 I3=$abc$159056$n5520 O=$abc$159056$n6114_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011010001001011 .gate SB_LUT4 I0=$abc$159056$n6116_1 I1=$abc$159056$n6117_1 I2=$false I3=$false O=$abc$159056$n4057 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[141] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6116_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3227 I2=$abc$159056$n5506 I3=$abc$159056$n5961_1 O=$abc$159056$n6117_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6119_1 I1=$abc$159056$n3241 I2=$abc$159056$n5639_1 I3=$abc$159056$n6120_1 O=$abc$159056$n4060 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[135] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6119_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[231] I1=murax.system_drygascon128.core.c[295] I2=$abc$159056$n5485_1 I3=$abc$159056$n5494 O=$abc$159056$n6120_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100101110110100 .gate SB_LUT4 I0=$abc$159056$n6122_1 I1=$abc$159056$n6123_1 I2=$false I3=$false O=$abc$159056$n4063 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[98] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6122_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5125 I2=$abc$159056$n5074 I3=$abc$159056$n5166 O=$abc$159056$n6123_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6125_1 I1=$abc$159056$n6126_1 I2=$false I3=$false O=$abc$159056$n4066 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[155] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6125_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5906_1 I2=$abc$159056$n5427_1 I3=$abc$159056$n6009 O=$abc$159056$n6126_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6128_1 I1=$abc$159056$n6129_1 I2=$false I3=$false O=$abc$159056$n4069 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[122] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6128_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3846 I2=$abc$159056$n3355 I3=$abc$159056$n5121 O=$abc$159056$n6129_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6131_1 I1=murax.system_drygascon128.core.state[0] I2=$abc$159056$n6132 I3=$false O=$abc$159056$n4072 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11110100 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] I1=murax.system_drygascon128.core.c[121] I2=$abc$159056$n3204 I3=$abc$159056$n3795 O=$abc$159056$n6131_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101001100110011 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3868_1 I2=$abc$159056$n3316 I3=$abc$159056$n3822 O=$abc$159056$n6132 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6134 I1=$abc$159056$n6135_1 I2=$false I3=$false O=$abc$159056$n4075 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[128] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6134 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5450_1 I2=$abc$159056$n5864_1 I3=$abc$159056$n6029_1 O=$abc$159056$n6135_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6137_1 I1=$abc$159056$n6138 I2=$false I3=$false O=$abc$159056$n4078 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[124] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6137_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3282 I2=$abc$159056$n3751_1 I3=$abc$159056$n5106 O=$abc$159056$n6138 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6140 I1=$abc$159056$n6141 I2=$false I3=$false O=$abc$159056$n4081 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[147] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6140 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3214 I2=$abc$159056$n5383_1 I3=$abc$159056$n5984_1 O=$abc$159056$n6141 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6143 I1=$abc$159056$n6144 I2=$false I3=$false O=$abc$159056$n4084 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[99] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6143 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5120 I2=$abc$159056$n3885 I3=$abc$159056$n5161_1 O=$abc$159056$n6144 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6146 I1=$abc$159056$n6147 I2=$false I3=$false O=$abc$159056$n4087 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[110] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6146 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3890 I2=$abc$159056$n5116 I3=$abc$159056$n5170 O=$abc$159056$n6147 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6149 I1=$abc$159056$n6150 I2=$false I3=$false O=$abc$159056$n4090 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[107] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6149 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5072 I2=$abc$159056$n5130 I3=$abc$159056$n5180 O=$abc$159056$n6150 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6152 I1=$abc$159056$n6153 I2=$false I3=$false O=$abc$159056$n4093 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[160] I1=murax.system_uartCtrl._zz_6_ I2=$abc$159056$n5853_1 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6152 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3262 I2=$abc$159056$n5892_1 I3=$abc$159056$n6029_1 O=$abc$159056$n6153 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6155 I1=$abc$159056$n6156 I2=$false I3=$false O=$abc$159056$n4096 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[125] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n3794 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6155 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n3338 I2=$abc$159056$n3790_1 I3=$abc$159056$n5101 O=$abc$159056$n6156 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001010001000001 .gate SB_LUT4 I0=$abc$159056$n6158 I1=$abc$159056$n6159 I2=$false I3=$false O=$abc$159056$n4099 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[137] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6158 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5478 I2=$abc$159056$n5499 I3=$abc$159056$n5880_1 O=$abc$159056$n6159 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6161 I1=$abc$159056$n6162 I2=$false I3=$false O=$abc$159056$n4102 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[146] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6161 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3241 I1=$abc$159056$n5944_1 I2=$abc$159056$n5390 I3=$abc$159056$n5980_1 O=$abc$159056$n6162 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000100010100 .gate SB_LUT4 I0=$abc$159056$n6164 I1=$abc$159056$n3241 I2=$abc$159056$n5450_1 I3=$abc$159056$n6165 O=$abc$159056$n4105 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010101110111010 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[157] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] I2=$abc$159056$n3203 I3=murax.system_drygascon128.core.state[0] O=$abc$159056$n6164 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n5467 I1=$abc$159056$n6019_1 I2=$false I3=$false O=$abc$159056$n6165 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3206 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid I2=$false I3=$false O=murax.apb3Router_1_._zz_3_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_mainBusDecoder_logic_hits_1 I1=$abc$159056$n6168 I2=$false I3=$false O=murax.system_mainBusDecoder_logic_noHit .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n3576 I1=$abc$159056$n6169 I2=$abc$159056$n3584 I3=$abc$159056$n6172 O=$abc$159056$n6168 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[15] I1=$abc$159056$n6171 I2=$abc$159056$n3582 I3=$abc$159056$n6170 O=$abc$159056$n6169 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[19] I1=$abc$159056$n3581 I2=$false I3=$false O=$abc$159056$n6170 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3587 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[14] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[17] I3=$abc$159056$n3583_1 O=$abc$159056$n6171 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[13] I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[16] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[18] I3=$abc$159056$n3588 O=$abc$159056$n6172 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[15] I1=murax.system_cpu._zz_99_[13] I2=$abc$159056$n6174 I3=$false O=murax.system_cpu.decode_CSR_WRITE_OPCODE .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10111111 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[16] I1=murax.system_cpu._zz_99_[17] I2=murax.system_cpu._zz_99_[18] I3=murax.system_cpu._zz_99_[19] O=$abc$159056$n6174 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000001 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[20] I1=$abc$159056$n6176 I2=$false I3=$false O=murax.system_cpu._zz_9_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu._zz_217_ I1=murax.system_cpu._zz_99_[13] I2=murax.system_cpu._zz_99_[4] I3=murax.system_cpu._zz_99_[6] O=$abc$159056$n6176 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000000000000 .gate SB_LUT4 I0=$abc$159056$n3461 I1=murax.system_cpu._zz_99_[6] I2=$false I3=$false O=murax.system_cpu._zz_304_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[13] I1=murax.system_cpu._zz_99_[14] I2=$abc$159056$n3666 I3=$false O=murax.system_cpu._zz_273_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[6] I1=murax.system_cpu._zz_99_[4] I2=$false I3=$false O=murax.system_cpu.decode_MEMORY_ENABLE .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n6181 I1=$abc$159056$n6182 I2=$false I3=$false O=$abc$159056$n4346 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[0] I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[0] I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[1] I3=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[1] O=$abc$159056$n6181 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[2] I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[2] I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[3] I3=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[3] O=$abc$159056$n6182 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n6184 I1=$abc$159056$n6185 I2=$false I3=$false O=$abc$159056$n4355 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[0] I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[0] I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[1] I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[1] O=$abc$159056$n6184 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[2] I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[2] I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[3] I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[3] O=$abc$159056$n6185 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3567 I1=$abc$159056$n3574_1 I2=$false I3=$false O=$abc$159056$n4378 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[28] I1=murax.system_cpu.DebugPlugin_haltIt I2=$abc$159056$n6176 I3=$false O=murax.system_cpu.decode_DO_EBREAK .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.system_cpu.writeBack_arbitration_isValid I1=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_VALID I2=$false I3=$false O=murax.system_cpu._zz_136_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready I1=$abc$159056$n3623 I2=$abc$159056$n3572 I3=$false O=murax.system_cpu._zz_171_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready I1=$abc$159056$n6191 I2=$false I3=$false O=murax.system_cpu._zz_161_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu.DebugPlugin_haltIt I1=$abc$159056$n6192 I2=murax.system_cpu._zz_86_ I3=$false O=$abc$159056$n6191 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n3608 I1=$abc$159056$n6193 I2=$false I3=$false O=$abc$159056$n6192 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu._zz_96_ I1=murax.system_cpu._zz_92_ I2=murax.system_cpu._zz_94_ I3=murax.system_cpu.DebugPlugin_stepIt O=$abc$159056$n6193 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111000000000 .gate SB_LUT4 I0=$abc$159056$n3487_1 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I2=$abc$159056$n3205_1 I3=$false O=$abc$159056$n4479 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n6196 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I2=$false I3=$false O=$abc$159056$n4480 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3205_1 I1=$abc$159056$n3487_1 I2=$false I3=$false O=$abc$159056$n6196 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n6198 I1=murax.system_uartCtrl.bridge_interruptCtrl_readIntEnable I2=$abc$159056$n3680 I3=murax.system_uartCtrl.bridge_interruptCtrl_writeIntEnable O=murax.system_cpu.externalInterrupt .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010001000100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_2_ I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_risingOccupancy I2=$abc$159056$n6199 I3=$false O=$abc$159056$n6198 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=$abc$159056$n6200 I1=$abc$159056$n6201 I2=$false I3=$false O=$abc$159056$n6199 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[1] I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[1] I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[0] I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[0] O=$abc$159056$n6200 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[2] I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[2] I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[3] I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[3] O=$abc$159056$n6201 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n3567 I1=$abc$159056$n6203 I2=$false I3=$false O=murax.system_ram.io_bus_cmd_valid .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3589_1 I1=$abc$159056$n6168 I2=$false I3=$false O=$abc$159056$n6203 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3567 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write I2=$abc$159056$n6203 I3=$false O=$abc$159056$n4504 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n6203 I1=$abc$159056$n6206 I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write I3=$false O=$abc$159056$n4506 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[1] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[1] I2=$abc$159056$n6207 I3=$false O=$abc$159056$n6206 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001110 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[1] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[0] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[0] I3=$false O=$abc$159056$n6207 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n6203 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write I2=$abc$159056$n6209 I3=$false O=$abc$159056$n4509 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[0] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[1] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[0] I3=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[1] O=$abc$159056$n6209 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111111101100 .gate SB_LUT4 I0=$abc$159056$n6203 I1=$abc$159056$n6211_1 I2=$false I3=$false O=$abc$159056$n4512 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n6207 I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[1] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write I3=$false O=$abc$159056$n6211_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n6203 I1=$abc$159056$n6213 I2=$false I3=$false O=$abc$159056$n4515 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[0] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[1] I2=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write I3=$false O=$abc$159056$n6213 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I1=$abc$159056$n3570 I2=$false I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3681 I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_risingOccupancy I2=$false I3=$false O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_ready .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0111 .gate SB_LUT4 I0=$abc$159056$n3680 I1=$abc$159056$n3679_1 I2=$abc$159056$n3701 I3=$false O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_6_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n3639 I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_ready I2=$abc$159056$n3488 I3=$false O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n6198 I1=$abc$159056$n6219 I2=$false I3=$false O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_6_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I1=$abc$159056$n3488 I2=$abc$159056$n3640_1 I3=murax.system_apbBridge.state O=$abc$159056$n6219 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100000000000000 .gate SB_LUT4 I0=$abc$159056$n6221_1 I1=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_validReg I2=$false I3=$false O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n6199 I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_risingOccupancy I2=$false I3=$false O=$abc$159056$n6221_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_samples_1 I1=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_samples_2 I2=murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_1 I3=$false O=$abc$159056$n4539 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11101000 .gate SB_LUT4 I0=$abc$159056$n6224 I1=$abc$159056$n8825 I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] I3=$abc$159056$n3556_1 O=$abc$159056$n4610 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000100011110000 .gate SB_LUT4 I0=$abc$159056$n3561 I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I2=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[3] I3=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[2] O=$abc$159056$n6224 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011100001111 .gate SB_LUT4 I0=$abc$159056$n6226 I1=$abc$159056$n3556_1 I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] I3=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] O=$abc$159056$n4612 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011011101000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[2] I1=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[3] I2=$false I3=$false O=$abc$159056$n6226 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n6224 I1=$abc$159056$n8827 I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I3=$abc$159056$n3556_1 O=$abc$159056$n4614 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000100011110000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I1=$abc$159056$n6229_1 I2=$abc$159056$n3679_1 I3=$false O=$abc$159056$n4809 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n3701 I1=$abc$159056$n6230 I2=$abc$159056$n8844 I3=$false O=$abc$159056$n6229_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[2] I1=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[3] I2=$false I3=$false O=$abc$159056$n6230 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n6230 I1=$abc$159056$n3679_1 I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I3=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[1] O=$abc$159056$n4811 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011011101000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[2] I1=$abc$159056$n6233_1 I2=$abc$159056$n3679_1 I3=$false O=$abc$159056$n4813 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n3701 I1=$abc$159056$n6230 I2=$abc$159056$n8846 I3=$false O=$abc$159056$n6233_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=$abc$159056$n3386 I1=$abc$159056$n4826 I2=$false I3=$false O=$abc$159056$n4827 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3386 I1=$abc$159056$n9970 I2=$false I3=$false O=$abc$159056$n4829 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[0] I1=murax.system_ram._zz_6_[0] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_ram._zz_6_[1] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[1] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_6_[2] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[2] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_6_[3] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[3] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_6_[4] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[4] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_6_[5] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[5] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_6_[6] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[6] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_6_[7] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[7] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_7_[0] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[8] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_7_[1] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[9] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_7_[2] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[10] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_7_[3] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[11] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_7_[4] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[12] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_7_[5] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[13] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_7_[6] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[14] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_7_[7] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[15] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_8_[0] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[16] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_8_[1] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[17] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_8_[2] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[18] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_8_[3] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[19] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_8_[4] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[20] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_8_[5] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[21] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_8_[6] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[22] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_8_[7] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[23] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_9_[0] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[24] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_9_[1] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[25] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_9_[2] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[26] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_9_[3] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[27] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_9_[4] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[28] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_9_[5] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[29] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_9_[6] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[30] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_ram._zz_9_[7] I1=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[31] I2=murax.system_mainBusDecoder_logic_rspSourceId I3=$false O=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n5576 I1=$abc$159056$n6277_1 I2=$abc$159056$n3574_1 I3=murax.system_cpu_dBus_cmd_halfPipe_regs_valid O=$abc$159056$n4936 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110001000 .gate SB_LUT4 I0=$abc$159056$n3404 I1=murax.system_cpu.execute_arbitration_isValid I2=murax.system_cpu.decode_to_execute_MEMORY_ENABLE I3=$false O=$abc$159056$n6277_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_bypass I1=murax.jtagBridge_1_.jtag_tap_instructionShift[0] I2=$abc$159056$n3687 I3=$false O=$abc$159056$n6280_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n88 I1=$abc$159056$n6283_1 I2=$false I3=$false O=murax.jtagBridge_1_.flowCCByToggle_1_.io_input_valid .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_instruction[0] I1=murax.jtagBridge_1_.jtag_tap_instruction[2] I2=murax.jtagBridge_1_.jtag_tap_instruction[3] I3=murax.jtagBridge_1_.jtag_tap_instruction[1] O=$abc$159056$n6283_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_valid I1=murax.jtagBridge_1_.jtag_readArea_shifter[1] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4950 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[0] I1=murax.jtagBridge_1_.jtag_readArea_shifter[3] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4953 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[1] I1=murax.jtagBridge_1_.jtag_readArea_shifter[4] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4956 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[2] I1=murax.jtagBridge_1_.jtag_readArea_shifter[5] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4959 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[3] I1=murax.jtagBridge_1_.jtag_readArea_shifter[6] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4962 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[4] I1=murax.jtagBridge_1_.jtag_readArea_shifter[7] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4965 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[5] I1=murax.jtagBridge_1_.jtag_readArea_shifter[8] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4968 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[6] I1=murax.jtagBridge_1_.jtag_readArea_shifter[9] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4971 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[7] I1=murax.jtagBridge_1_.jtag_readArea_shifter[10] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4974 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[8] I1=murax.jtagBridge_1_.jtag_readArea_shifter[11] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4977 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[9] I1=murax.jtagBridge_1_.jtag_readArea_shifter[12] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4980 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[10] I1=murax.jtagBridge_1_.jtag_readArea_shifter[13] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4983 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[11] I1=murax.jtagBridge_1_.jtag_readArea_shifter[14] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4986 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[12] I1=murax.jtagBridge_1_.jtag_readArea_shifter[15] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4989 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[13] I1=murax.jtagBridge_1_.jtag_readArea_shifter[16] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4992 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[14] I1=murax.jtagBridge_1_.jtag_readArea_shifter[17] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4995 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[15] I1=murax.jtagBridge_1_.jtag_readArea_shifter[18] I2=$abc$159056$n88 I3=$false O=$abc$159056$n4998 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[16] I1=murax.jtagBridge_1_.jtag_readArea_shifter[19] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5001 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[17] I1=murax.jtagBridge_1_.jtag_readArea_shifter[20] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5004 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[18] I1=murax.jtagBridge_1_.jtag_readArea_shifter[21] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5007 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[19] I1=murax.jtagBridge_1_.jtag_readArea_shifter[22] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5010 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[20] I1=murax.jtagBridge_1_.jtag_readArea_shifter[23] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5013 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[21] I1=murax.jtagBridge_1_.jtag_readArea_shifter[24] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5016 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[22] I1=murax.jtagBridge_1_.jtag_readArea_shifter[25] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5019 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[23] I1=murax.jtagBridge_1_.jtag_readArea_shifter[26] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5022 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[24] I1=murax.jtagBridge_1_.jtag_readArea_shifter[27] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5025 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[25] I1=murax.jtagBridge_1_.jtag_readArea_shifter[28] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5028 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[26] I1=murax.jtagBridge_1_.jtag_readArea_shifter[29] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5031 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[27] I1=murax.jtagBridge_1_.jtag_readArea_shifter[30] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5034 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[28] I1=murax.jtagBridge_1_.jtag_readArea_shifter[31] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5037 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[29] I1=murax.jtagBridge_1_.jtag_readArea_shifter[32] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5040 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[30] I1=murax.jtagBridge_1_.jtag_readArea_shifter[33] I2=$abc$159056$n88 I3=$false O=$abc$159056$n5043 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.system_rsp_payload_data[31] I1=io_G15 I2=$abc$159056$n88 I3=$false O=$abc$159056$n5046 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_headerLoaded I1=$abc$159056$n6318 I2=$abc$159056$n221 I3=$false O=$abc$159056$n5051 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_counter[2] I1=murax.systemDebugger_1_.dispatcher_counter[0] I2=murax.systemDebugger_1_.dispatcher_counter[1] I3=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last O=$abc$159056$n6318 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000001111111 .gate SB_LUT4 I0=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last I1=$abc$159056$n5053 I2=$false I3=$false O=$abc$159056$n5054 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last I1=murax.systemDebugger_1_.dispatcher_counter[1] I2=$false I3=$false O=$abc$159056$n5056 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last I1=$abc$159056$n5057 I2=$false I3=$false O=$abc$159056$n5058 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3401 I1=$abc$159056$n6325_1 I2=$abc$159056$n3616_1 I3=$false O=$abc$159056$n6324 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n6326 I1=$abc$159056$n3612 I2=$abc$159056$n3619_1 I3=murax.system_cpu.decode_to_execute_INSTRUCTION[21] O=$abc$159056$n6325_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[22] I1=$abc$159056$n3614 I2=$false I3=$false O=$abc$159056$n6326 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SHIFT_CTRL[1] I1=murax.system_cpu.decode_to_execute_SHIFT_CTRL[0] I2=$false I3=$false O=$abc$159056$n6328_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[1] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[1] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6329 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n3401 I1=$abc$159056$n3616_1 I2=$false I3=$false O=$abc$159056$n6330 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[0] I3=murax.system_cpu.decode_to_execute_SRC2[0] O=$abc$159056$n6333 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[31] I1=murax.system_cpu.execute_SRC_ADD_SUB[31] I2=murax.system_cpu.decode_to_execute_SRC2[31] I3=murax.system_cpu.decode_to_execute_SRC_LESS_UNSIGNED O=$abc$159056$n6335 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0010101101110001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_CTRL[1] I2=$false I3=$false O=$abc$159056$n6336 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=$abc$159056$n6342 I1=$abc$159056$n6330 I2=$abc$159056$n6338 I3=$false O=murax.system_cpu._zz_60_[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mcause_exceptionCode[1] I1=$abc$159056$n6324 I2=$abc$159056$n6339 I3=$false O=$abc$159056$n6338 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=$abc$159056$n6341 I1=$abc$159056$n6340_1 I2=$abc$159056$n6328_1 I3=$abc$159056$n3401 O=$abc$159056$n6339 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010100000000 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[0] I1=murax.system_cpu.decode_to_execute_SRC1[0] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6340_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[2] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[2] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6341 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6343_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[1] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6342 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[1] I3=murax.system_cpu.decode_to_execute_SRC2[1] O=$abc$159056$n6343_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6348 I1=$abc$159056$n6330 I2=$abc$159056$n6345 I3=$false O=murax.system_cpu._zz_60_[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mcause_exceptionCode[2] I1=$abc$159056$n6324 I2=$abc$159056$n6346_1 I3=$false O=$abc$159056$n6345 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=$abc$159056$n6347 I1=$abc$159056$n6329 I2=$abc$159056$n6328_1 I3=$abc$159056$n3401 O=$abc$159056$n6346_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010100000000 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[3] I1=murax.system_cpu.decode_to_execute_SRC1[3] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6347 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n6349_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[2] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6348 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[2] I3=murax.system_cpu.decode_to_execute_SRC2[2] O=$abc$159056$n6349_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6358_1 I1=$abc$159056$n6351 I2=$abc$159056$n3401 I3=$false O=murax.system_cpu._zz_60_[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n6356 I1=$abc$159056$n6352_1 I2=$abc$159056$n3616_1 I3=$false O=$abc$159056$n6351 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mstatus_MIE I1=$abc$159056$n6355_1 I2=$abc$159056$n6354 I3=$abc$159056$n6353 O=$abc$159056$n6352_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=$abc$159056$n6325_1 I1=murax.system_cpu.CsrPlugin_mcause_exceptionCode[3] I2=$abc$159056$n3618 I3=murax.system_cpu.CsrPlugin_mip_MSIP O=$abc$159056$n6353 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3610_1 I1=murax.system_cpu.CsrPlugin_mie_MSIE I2=$false I3=$false O=$abc$159056$n6354 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3611 I1=$abc$159056$n6326 I2=$abc$159056$n3613_1 I3=$false O=$abc$159056$n6355_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n6357 I1=murax.system_cpu.execute_SRC_ADD_SUB[3] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6356 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[3] I3=murax.system_cpu.decode_to_execute_SRC2[3] O=$abc$159056$n6357 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6359 I1=$abc$159056$n6341 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6358_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[4] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[4] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6359 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6361_1 I1=$abc$159056$n3616_1 I2=$abc$159056$n6363 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6362 I1=murax.system_cpu.execute_SRC_ADD_SUB[4] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6361_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[4] I3=murax.system_cpu.decode_to_execute_SRC2[4] O=$abc$159056$n6362 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6364_1 I1=$abc$159056$n6347 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6363 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[5] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[5] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6364_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6366 I1=$abc$159056$n3616_1 I2=$abc$159056$n6368 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6367_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[5] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6366 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[5] I3=murax.system_cpu.decode_to_execute_SRC2[5] O=$abc$159056$n6367_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6369 I1=$abc$159056$n6359 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6368 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[6] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[6] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6369 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6371 I1=$abc$159056$n3616_1 I2=$abc$159056$n6373_1 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6372 I1=murax.system_cpu.execute_SRC_ADD_SUB[6] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6371 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[6] I3=murax.system_cpu.decode_to_execute_SRC2[6] O=$abc$159056$n6372 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6374 I1=$abc$159056$n6364_1 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6373_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[7] I1=murax.system_cpu.decode_to_execute_SRC1[7] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6374 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n3401 I1=$abc$159056$n6376_1 I2=$abc$159056$n3616_1 I3=$abc$159056$n6378 O=murax.system_cpu._zz_60_[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111100000000 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mip_MTIP I1=$abc$159056$n3618 I2=$abc$159056$n6377 I3=$false O=$abc$159056$n6376_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=$abc$159056$n6355_1 I1=murax.system_cpu.CsrPlugin_mstatus_MPIE I2=$abc$159056$n3610_1 I3=murax.system_cpu.CsrPlugin_mie_MTIE O=$abc$159056$n6377 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n6336 I1=murax.system_cpu.execute_SRC_ADD_SUB[7] I2=$abc$159056$n6379_1 I3=$abc$159056$n6381 O=$abc$159056$n6378 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000010001111 .gate SB_LUT4 I0=$abc$159056$n6380 I1=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[1] I3=$abc$159056$n6330 O=$abc$159056$n6379_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111100000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[7] I3=murax.system_cpu.decode_to_execute_SRC2[7] O=$abc$159056$n6380 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6382 I1=$abc$159056$n6369 I2=$abc$159056$n6328_1 I3=$abc$159056$n3401 O=$abc$159056$n6381 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[8] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[8] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6382 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6384 I1=$abc$159056$n3616_1 I2=$abc$159056$n6386 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6385 I1=murax.system_cpu.execute_SRC_ADD_SUB[8] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6384 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[8] I3=murax.system_cpu.decode_to_execute_SRC2[8] O=$abc$159056$n6385 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6387 I1=$abc$159056$n6374 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6386 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[9] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[9] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6387 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6389 I1=$abc$159056$n3616_1 I2=$abc$159056$n6391 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6390 I1=murax.system_cpu.execute_SRC_ADD_SUB[9] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6389 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[9] I3=murax.system_cpu.decode_to_execute_SRC2[9] O=$abc$159056$n6390 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6392 I1=$abc$159056$n6382 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6391 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[10] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[10] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6392 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6396 I1=$abc$159056$n6330 I2=$abc$159056$n6394 I3=$false O=murax.system_cpu._zz_60_[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11110100 .gate SB_LUT4 I0=$abc$159056$n6395 I1=$abc$159056$n6387 I2=$abc$159056$n6328_1 I3=$abc$159056$n3401 O=$abc$159056$n6394 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010100000000 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[11] I1=murax.system_cpu.decode_to_execute_SRC1[11] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6395 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n6397 I1=murax.system_cpu.execute_SRC_ADD_SUB[10] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6396 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[10] I3=murax.system_cpu.decode_to_execute_SRC2[10] O=$abc$159056$n6397 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n3401 I1=$abc$159056$n6399 I2=$abc$159056$n3616_1 I3=$abc$159056$n6401 O=murax.system_cpu._zz_60_[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111100000000 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mip_MEIP I1=$abc$159056$n3618 I2=$abc$159056$n6400 I3=$false O=$abc$159056$n6399 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=$abc$159056$n6355_1 I1=murax.system_cpu.CsrPlugin_mstatus_MPP[0] I2=$abc$159056$n3610_1 I3=murax.system_cpu.CsrPlugin_mie_MEIE O=$abc$159056$n6400 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n6336 I1=murax.system_cpu.execute_SRC_ADD_SUB[11] I2=$abc$159056$n6402 I3=$abc$159056$n6404 O=$abc$159056$n6401 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000010001111 .gate SB_LUT4 I0=$abc$159056$n6403 I1=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[1] I3=$abc$159056$n6330 O=$abc$159056$n6402 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111100000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[11] I3=murax.system_cpu.decode_to_execute_SRC2[11] O=$abc$159056$n6403 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6405 I1=$abc$159056$n6392 I2=$abc$159056$n6328_1 I3=$abc$159056$n3401 O=$abc$159056$n6404 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[12] I1=murax.system_cpu.decode_to_execute_SRC1[12] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6405 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n6411 I1=$abc$159056$n6407 I2=$false I3=$false O=murax.system_cpu._zz_60_[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n6409 I1=$abc$159056$n6408 I2=$abc$159056$n3401 I3=$abc$159056$n3616_1 O=$abc$159056$n6407 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110011110101 .gate SB_LUT4 I0=$abc$159056$n6355_1 I1=murax.system_cpu.CsrPlugin_mstatus_MPP[1] I2=$false I3=$false O=$abc$159056$n6408 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n6410 I1=murax.system_cpu.execute_SRC_ADD_SUB[12] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6409 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[12] I3=murax.system_cpu.decode_to_execute_SRC2[12] O=$abc$159056$n6410 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6412_1 I1=$abc$159056$n6395 I2=$abc$159056$n6328_1 I3=$abc$159056$n3401 O=$abc$159056$n6411 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[13] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[13] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6412_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6414 I1=$abc$159056$n3616_1 I2=$abc$159056$n6416 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6415 I1=murax.system_cpu.execute_SRC_ADD_SUB[13] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6414 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[13] I3=murax.system_cpu.decode_to_execute_SRC2[13] O=$abc$159056$n6415 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6417_1 I1=$abc$159056$n6405 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6416 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[14] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[14] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6417_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6419 I1=$abc$159056$n3616_1 I2=$abc$159056$n6421 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6420_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[14] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6419 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[14] I3=murax.system_cpu.decode_to_execute_SRC2[14] O=$abc$159056$n6420_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6422 I1=$abc$159056$n6412_1 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6421 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[15] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[15] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6422 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6424 I1=$abc$159056$n3616_1 I2=$abc$159056$n6426 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6425 I1=murax.system_cpu.execute_SRC_ADD_SUB[15] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6424 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[15] I3=murax.system_cpu.decode_to_execute_SRC2[15] O=$abc$159056$n6425 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6427 I1=$abc$159056$n6417_1 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6426 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[16] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[16] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6427 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6429 I1=$abc$159056$n3616_1 I2=$abc$159056$n6431_1 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6430 I1=murax.system_cpu.execute_SRC_ADD_SUB[16] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6429 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[16] I3=murax.system_cpu.decode_to_execute_SRC2[16] O=$abc$159056$n6430 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6432 I1=$abc$159056$n6422 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6431_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[17] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[17] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6432 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6434_1 I1=$abc$159056$n3616_1 I2=$abc$159056$n6436 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6435 I1=murax.system_cpu.execute_SRC_ADD_SUB[17] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6434_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[17] I3=murax.system_cpu.decode_to_execute_SRC2[17] O=$abc$159056$n6435 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6437_1 I1=$abc$159056$n6427 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6436 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[18] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[18] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6437_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6439 I1=$abc$159056$n3616_1 I2=$abc$159056$n6441 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6440_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[18] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6439 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[18] I3=murax.system_cpu.decode_to_execute_SRC2[18] O=$abc$159056$n6440_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6442 I1=$abc$159056$n6432 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6441 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[19] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[19] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6442 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6444 I1=$abc$159056$n3616_1 I2=$abc$159056$n6446_1 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6445 I1=murax.system_cpu.execute_SRC_ADD_SUB[19] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6444 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[19] I3=murax.system_cpu.decode_to_execute_SRC2[19] O=$abc$159056$n6445 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6447 I1=$abc$159056$n6437_1 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6446_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[20] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[20] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6447 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6449_1 I1=$abc$159056$n3616_1 I2=$abc$159056$n6451 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6450 I1=murax.system_cpu.execute_SRC_ADD_SUB[20] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6449_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[20] I3=murax.system_cpu.decode_to_execute_SRC2[20] O=$abc$159056$n6450 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6452_1 I1=$abc$159056$n6442 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6451 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[21] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[21] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6452_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6454_1 I1=$abc$159056$n3616_1 I2=$abc$159056$n6456_1 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6455_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[21] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6454_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[21] I3=murax.system_cpu.decode_to_execute_SRC2[21] O=$abc$159056$n6455_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6457_1 I1=$abc$159056$n6447 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6456_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[22] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[22] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6457_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6459_1 I1=$abc$159056$n3616_1 I2=$abc$159056$n6461_1 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6460_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[22] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6459_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[22] I3=murax.system_cpu.decode_to_execute_SRC2[22] O=$abc$159056$n6460_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6462 I1=$abc$159056$n6452_1 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6461_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[23] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[23] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6462 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6464 I1=$abc$159056$n3616_1 I2=$abc$159056$n6466 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6465 I1=murax.system_cpu.execute_SRC_ADD_SUB[23] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6464 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[23] I3=murax.system_cpu.decode_to_execute_SRC2[23] O=$abc$159056$n6465 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6467 I1=$abc$159056$n6457_1 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6466 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[24] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[24] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6467 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6469 I1=$abc$159056$n3616_1 I2=$abc$159056$n6471 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6470 I1=murax.system_cpu.execute_SRC_ADD_SUB[24] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6469 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[24] I3=murax.system_cpu.decode_to_execute_SRC2[24] O=$abc$159056$n6470 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6472 I1=$abc$159056$n6462 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6471 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[25] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[25] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6472 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6474 I1=$abc$159056$n3616_1 I2=$abc$159056$n6476 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6475 I1=murax.system_cpu.execute_SRC_ADD_SUB[25] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6474 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[25] I3=murax.system_cpu.decode_to_execute_SRC2[25] O=$abc$159056$n6475 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6477 I1=$abc$159056$n6467 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6476 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[26] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[26] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6477 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6479 I1=$abc$159056$n3616_1 I2=$abc$159056$n6481 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6480 I1=murax.system_cpu.execute_SRC_ADD_SUB[26] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6479 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[26] I3=murax.system_cpu.decode_to_execute_SRC2[26] O=$abc$159056$n6480 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6482 I1=$abc$159056$n6472 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6481 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[27] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[27] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6482 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6484 I1=$abc$159056$n3616_1 I2=$abc$159056$n6486 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6485 I1=murax.system_cpu.execute_SRC_ADD_SUB[27] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6484 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[27] I3=murax.system_cpu.decode_to_execute_SRC2[27] O=$abc$159056$n6485 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6487 I1=$abc$159056$n6477 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6486 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[28] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[28] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6487 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6489 I1=$abc$159056$n3616_1 I2=$abc$159056$n6491_1 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6490_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[28] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6489 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[28] I3=murax.system_cpu.decode_to_execute_SRC2[28] O=$abc$159056$n6490_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6492 I1=$abc$159056$n6482 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6491_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[29] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[29] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6492 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6494 I1=$abc$159056$n3616_1 I2=$abc$159056$n6496 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6495 I1=murax.system_cpu.execute_SRC_ADD_SUB[29] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6494 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[29] I3=murax.system_cpu.decode_to_execute_SRC2[29] O=$abc$159056$n6495 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6497 I1=$abc$159056$n6487 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6496 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[30] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[30] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6497 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6499 I1=$abc$159056$n3616_1 I2=$abc$159056$n6501 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=$abc$159056$n6500 I1=murax.system_cpu.execute_SRC_ADD_SUB[30] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6499 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[30] I3=murax.system_cpu.decode_to_execute_SRC2[30] O=$abc$159056$n6500 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=$abc$159056$n6502_1 I1=$abc$159056$n6492 I2=$abc$159056$n6328_1 I3=$false O=$abc$159056$n6501 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[31] I1=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[31] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=$abc$159056$n6502_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=$abc$159056$n6506 I1=$abc$159056$n6330 I2=$abc$159056$n6504 I3=$false O=murax.system_cpu._zz_60_[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=$abc$159056$n6505 I1=$abc$159056$n3401 I2=$abc$159056$n6324 I3=$false O=$abc$159056$n6504 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=$abc$159056$n6502_1 I1=$abc$159056$n6497 I2=murax.system_cpu.decode_to_execute_SHIFT_CTRL[1] I3=murax.system_cpu.decode_to_execute_SHIFT_CTRL[0] O=$abc$159056$n6505 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101001100000000 .gate SB_LUT4 I0=$abc$159056$n6507 I1=murax.system_cpu.execute_SRC_ADD_SUB[31] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n6506 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011101011110011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] I1=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] I2=murax.system_cpu.decode_to_execute_SRC1[31] I3=murax.system_cpu.decode_to_execute_SRC2[31] O=$abc$159056$n6507 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001110001001111 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[16] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[24] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] O=$abc$159056$n6511 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_cpu.writeBack_arbitration_isValid I1=murax.system_cpu.memory_to_writeBack_MEMORY_ENABLE I2=$false I3=$false O=$abc$159056$n6512_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[17] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[25] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] O=$abc$159056$n6516 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n6518_1 I1=$abc$159056$n6519_1 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[2] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011111110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[18] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[26] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] O=$abc$159056$n6518_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[2] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[10] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] O=$abc$159056$n6519_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[19] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[27] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] O=$abc$159056$n6523 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] I1=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I2=$false I3=$false O=$abc$159056$n6526_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[12] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[28] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] O=$abc$159056$n6527 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[21] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[29] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] O=$abc$159056$n6532 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n6534_1 I1=$abc$159056$n6535_1 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[6] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011111110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[22] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[30] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] O=$abc$159056$n6534_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[6] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[14] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] O=$abc$159056$n6535_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[7] I1=$abc$159056$n8080 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=$abc$159056$n6544 I1=$abc$159056$n6542 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[8] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111011110000 .gate SB_LUT4 I0=$abc$159056$n8080 I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[14] I2=$abc$159056$n6543_1 I3=$false O=$abc$159056$n6542 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00010000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[12] I2=$false I3=$false O=$abc$159056$n6543_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[8] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[24] I2=$abc$159056$n6543_1 I3=$abc$159056$n6526_1 O=$abc$159056$n6544 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n6546 I1=$abc$159056$n6542 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[9] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111011110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[9] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[25] I2=$abc$159056$n6543_1 I3=$abc$159056$n6526_1 O=$abc$159056$n6546 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n6548 I1=$abc$159056$n6542 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[10] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111011110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[10] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[26] I2=$abc$159056$n6543_1 I3=$abc$159056$n6526_1 O=$abc$159056$n6548 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n6550 I1=$abc$159056$n6542 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[11] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111011110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[11] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[27] I2=$abc$159056$n6543_1 I3=$abc$159056$n6526_1 O=$abc$159056$n6550 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n6552 I1=$abc$159056$n6542 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[12] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111011110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[12] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[28] I2=$abc$159056$n6543_1 I3=$abc$159056$n6526_1 O=$abc$159056$n6552 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n6554_1 I1=$abc$159056$n6542 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[13] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111011110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[13] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[29] I2=$abc$159056$n6543_1 I3=$abc$159056$n6526_1 O=$abc$159056$n6554_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n6556 I1=$abc$159056$n6542 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[14] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111011110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[14] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[30] I2=$abc$159056$n6543_1 I3=$abc$159056$n6526_1 O=$abc$159056$n6556 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110000001010 .gate SB_LUT4 I0=$abc$159056$n6558_1 I1=$abc$159056$n6542 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[15] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111011110000 .gate SB_LUT4 I0=$abc$159056$n6559_1 I1=$abc$159056$n6543_1 I2=$false I3=$false O=$abc$159056$n6558_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[15] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[31] I2=$abc$159056$n6526_1 I3=$false O=$abc$159056$n6559_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[16] I1=$abc$159056$n6561 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[16] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6561 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=$abc$159056$n6542 I1=$abc$159056$n6563 I2=$false I3=$false O=$abc$159056$n6562 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n6559_1 I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=murax.system_cpu.memory_to_writeBack_INSTRUCTION[14] I3=murax.system_cpu.memory_to_writeBack_INSTRUCTION[12] O=$abc$159056$n6563 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[17] I1=$abc$159056$n6565 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[17] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6565 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[18] I1=$abc$159056$n6567 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[18] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6567 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[19] I1=$abc$159056$n6569 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[19] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6569 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[20] I1=$abc$159056$n6571 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[20] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6571 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[21] I1=$abc$159056$n6573_1 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[21] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6573_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[22] I1=$abc$159056$n6575_1 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[22] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6575_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[23] I1=$abc$159056$n6577 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[23] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6577 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[24] I1=$abc$159056$n6579 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[24] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6579 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[25] I1=$abc$159056$n6581 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[25] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6581 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[26] I1=$abc$159056$n6583 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[26] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6583 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[27] I1=$abc$159056$n6585 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[27] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6585 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[28] I1=$abc$159056$n6587 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[28] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6587 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[29] I1=$abc$159056$n6589 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[29] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6589 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[30] I1=$abc$159056$n6591 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[30] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6591 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[31] I1=$abc$159056$n6593 I2=$abc$159056$n6512_1 I3=$false O=murax.system_cpu._zz_66_[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[31] I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] I2=$abc$159056$n6562 I3=$false O=$abc$159056$n6593 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=$abc$159056$n6595 I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] I2=murax.system_cpu.IBusSimplePlugin_fetchPc_inc I3=$abc$159056$n3605 O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011110001010101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[2] I2=murax.system_cpu.CsrPlugin_mepc[2] I3=$abc$159056$n3607_1 O=$abc$159056$n6595 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6597 I1=$abc$159056$n5359 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[3] I2=murax.system_cpu.CsrPlugin_mepc[3] I3=$abc$159056$n3607_1 O=$abc$159056$n6597 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6599_1 I1=$abc$159056$n5362 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[4] I2=murax.system_cpu.CsrPlugin_mepc[4] I3=$abc$159056$n3607_1 O=$abc$159056$n6599_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6601 I1=$abc$159056$n5365 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[5] I2=murax.system_cpu.CsrPlugin_mepc[5] I3=$abc$159056$n3607_1 O=$abc$159056$n6601 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000011101110 .gate SB_LUT4 I0=$abc$159056$n6603 I1=$abc$159056$n5368 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[6] I2=murax.system_cpu.CsrPlugin_mepc[6] I3=$abc$159056$n3607_1 O=$abc$159056$n6603 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6605 I1=$abc$159056$n5371 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[7] I2=murax.system_cpu.CsrPlugin_mepc[7] I3=$abc$159056$n3607_1 O=$abc$159056$n6605 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6607_1 I1=$abc$159056$n5374 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[8] I2=murax.system_cpu.CsrPlugin_mepc[8] I3=$abc$159056$n3607_1 O=$abc$159056$n6607_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6609 I1=$abc$159056$n5377 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[9] I2=murax.system_cpu.CsrPlugin_mepc[9] I3=$abc$159056$n3607_1 O=$abc$159056$n6609 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6611 I1=$abc$159056$n5380 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[10] I2=murax.system_cpu.CsrPlugin_mepc[10] I3=$abc$159056$n3607_1 O=$abc$159056$n6611 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6613 I1=$abc$159056$n5383 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[11] I2=murax.system_cpu.CsrPlugin_mepc[11] I3=$abc$159056$n3607_1 O=$abc$159056$n6613 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6615 I1=$abc$159056$n5386 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[12] I2=murax.system_cpu.CsrPlugin_mepc[12] I3=$abc$159056$n3607_1 O=$abc$159056$n6615 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6617 I1=$abc$159056$n5389 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[13] I2=murax.system_cpu.CsrPlugin_mepc[13] I3=$abc$159056$n3607_1 O=$abc$159056$n6617 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6619 I1=$abc$159056$n5392 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[14] I2=murax.system_cpu.CsrPlugin_mepc[14] I3=$abc$159056$n3607_1 O=$abc$159056$n6619 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6621 I1=$abc$159056$n5395 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[15] I2=murax.system_cpu.CsrPlugin_mepc[15] I3=$abc$159056$n3607_1 O=$abc$159056$n6621 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6623 I1=$abc$159056$n5398 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[16] I2=murax.system_cpu.CsrPlugin_mepc[16] I3=$abc$159056$n3607_1 O=$abc$159056$n6623 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6625_1 I1=$abc$159056$n5401 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[17] I2=murax.system_cpu.CsrPlugin_mepc[17] I3=$abc$159056$n3607_1 O=$abc$159056$n6625_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6627 I1=$abc$159056$n5404 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[18] I2=murax.system_cpu.CsrPlugin_mepc[18] I3=$abc$159056$n3607_1 O=$abc$159056$n6627 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6629 I1=$abc$159056$n5407 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[19] I2=murax.system_cpu.CsrPlugin_mepc[19] I3=$abc$159056$n3607_1 O=$abc$159056$n6629 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6631 I1=$abc$159056$n5410 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[20] I2=murax.system_cpu.CsrPlugin_mepc[20] I3=$abc$159056$n3607_1 O=$abc$159056$n6631 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6633 I1=$abc$159056$n5413 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[21] I2=murax.system_cpu.CsrPlugin_mepc[21] I3=$abc$159056$n3607_1 O=$abc$159056$n6633 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6635_1 I1=$abc$159056$n5416 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[22] I2=murax.system_cpu.CsrPlugin_mepc[22] I3=$abc$159056$n3607_1 O=$abc$159056$n6635_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6637 I1=$abc$159056$n5419 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[23] I2=murax.system_cpu.CsrPlugin_mepc[23] I3=$abc$159056$n3607_1 O=$abc$159056$n6637 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6639 I1=$abc$159056$n5422 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[24] I2=murax.system_cpu.CsrPlugin_mepc[24] I3=$abc$159056$n3607_1 O=$abc$159056$n6639 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6641 I1=$abc$159056$n5425 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[25] I2=murax.system_cpu.CsrPlugin_mepc[25] I3=$abc$159056$n3607_1 O=$abc$159056$n6641 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6643_1 I1=$abc$159056$n5428 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[26] I2=murax.system_cpu.CsrPlugin_mepc[26] I3=$abc$159056$n3607_1 O=$abc$159056$n6643_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6645 I1=$abc$159056$n5431 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[27] I2=murax.system_cpu.CsrPlugin_mepc[27] I3=$abc$159056$n3607_1 O=$abc$159056$n6645 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6647 I1=$abc$159056$n5434 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[28] I2=murax.system_cpu.CsrPlugin_mepc[28] I3=$abc$159056$n3607_1 O=$abc$159056$n6647 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6649 I1=$abc$159056$n5437 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[29] I2=murax.system_cpu.CsrPlugin_mepc[29] I3=$abc$159056$n3607_1 O=$abc$159056$n6649 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6651 I1=$abc$159056$n5440 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[30] I2=murax.system_cpu.CsrPlugin_mepc[30] I3=$abc$159056$n3607_1 O=$abc$159056$n6651 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6653 I1=$abc$159056$n5443 I2=$abc$159056$n3605 I3=$false O=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.execute_to_memory_BRANCH_CALC[31] I2=murax.system_cpu.CsrPlugin_mepc[31] I3=$abc$159056$n3607_1 O=$abc$159056$n6653 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000011101110 .gate SB_LUT4 I0=$abc$159056$n6191 I1=murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready I2=murax.system_cpu._zz_171_ I3=$abc$159056$n3605 O=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=$abc$159056$n6352_1 I1=murax.system_cpu.decode_to_execute_INSTRUCTION[12] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_SRC1[3] O=murax.system_cpu._zz_206_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011111101010000 .gate SB_LUT4 I0=$abc$159056$n6376_1 I1=murax.system_cpu.decode_to_execute_INSTRUCTION[12] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_SRC1[7] O=murax.system_cpu._zz_205_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011111101010000 .gate SB_LUT4 I0=$abc$159056$n6399 I1=murax.system_cpu.decode_to_execute_INSTRUCTION[12] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_SRC1[11] O=murax.system_cpu._zz_208_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011111101010000 .gate SB_LUT4 I0=murax.system_cpu._zz_136_ I1=murax.system_cpu._zz_125_ I2=$false I3=$false O=$abc$159056$n10628 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_cpu.DebugPlugin_busReadDataReg[3] I1=murax.system_cpu.DebugPlugin_haltedByBreak I2=murax.system_cpu._zz_149_ I3=$false O=murax.jtagBridge_1_.io_remote_rsp_payload_data[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.DebugPlugin_resetIt I1=murax.system_cpu.DebugPlugin_busReadDataReg[0] I2=murax.system_cpu._zz_149_ I3=$false O=murax.jtagBridge_1_.io_remote_rsp_payload_data[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.DebugPlugin_busReadDataReg[1] I1=murax.system_cpu.DebugPlugin_haltIt I2=murax.system_cpu._zz_149_ I3=$false O=murax.jtagBridge_1_.io_remote_rsp_payload_data[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.DebugPlugin_isPipActive_regNext I1=murax.system_cpu.DebugPlugin_isPipActive I2=murax.system_cpu.DebugPlugin_busReadDataReg[2] I3=murax.system_cpu._zz_149_ O=murax.jtagBridge_1_.io_remote_rsp_payload_data[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000011101110 .gate SB_LUT4 I0=murax.system_cpu.DebugPlugin_busReadDataReg[4] I1=murax.system_cpu.DebugPlugin_stepIt I2=murax.system_cpu._zz_149_ I3=$false O=murax.jtagBridge_1_.io_remote_rsp_payload_data[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=$abc$159056$n3473 I1=$abc$159056$n118 I2=$abc$159056$n5576 I3=$false O=$abc$159056$n5557 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n5576 I1=$abc$159056$n10665 I2=murax.system_cpu.execute_arbitration_isValid I3=$false O=$abc$159056$n5558 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3606 I1=$abc$159056$n10664 I2=murax.system_cpu.memory_arbitration_isValid I3=$false O=$abc$159056$n5559 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.CsrPlugin_privilege[0] I2=murax.system_cpu.CsrPlugin_mstatus_MPP[0] I3=$abc$159056$n6668 O=$abc$159056$n5562 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000011101110 .gate SB_LUT4 I0=$abc$159056$n3607_1 I1=murax.system_cpu.memory_to_writeBack_INSTRUCTION[28] I2=murax.system_cpu.memory_to_writeBack_INSTRUCTION[29] I3=$false O=$abc$159056$n6668 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.CsrPlugin_privilege[1] I2=murax.system_cpu.CsrPlugin_mstatus_MPP[1] I3=$abc$159056$n6668 O=$abc$159056$n5565 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000011101110 .gate SB_LUT4 I0=$abc$159056$n5576 I1=murax.system_cpu._zz_171_ I2=$false I3=$false O=$abc$159056$n5570 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3569 I1=$abc$159056$n5576 I2=murax.system_cpu._zz_94_ I3=$false O=$abc$159056$n5571 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n5576 I1=murax.system_cpu.IBusSimplePlugin_injector_nextPcCalc_valids_0 I2=$false I3=$false O=$abc$159056$n5573 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n5576 I1=murax.system_cpu.IBusSimplePlugin_injector_nextPcCalc_valids_1 I2=$false I3=$false O=$abc$159056$n5575 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[0] I1=$abc$159056$n5577 I2=$abc$159056$n5576 I3=$false O=$abc$159056$n5579 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[1] I1=$abc$159056$n5580 I2=$abc$159056$n5576 I3=$false O=$abc$159056$n5582 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[2] I1=$abc$159056$n5583 I2=$abc$159056$n5576 I3=$false O=$abc$159056$n5585 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n6678_1 I1=murax.system_cpu._zz_206_ I2=$abc$159056$n6679_1 I3=$false O=$abc$159056$n5588 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11000101 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.CsrPlugin_mstatus_MIE I2=murax.system_cpu.CsrPlugin_mstatus_MPIE I3=$abc$159056$n6668 O=$abc$159056$n6678_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n3615 I1=$abc$159056$n6355_1 I2=$false I3=$false O=$abc$159056$n6679_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n6668 I1=$abc$159056$n6681 I2=murax.system_cpu._zz_205_ I3=$abc$159056$n6679_1 O=$abc$159056$n5594 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000010111011 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_interruptJump I1=murax.system_cpu.CsrPlugin_mstatus_MPIE I2=$false I3=$false O=$abc$159056$n6681 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n6668 I1=$abc$159056$n6683 I2=murax.system_cpu._zz_208_ I3=$abc$159056$n6679_1 O=$abc$159056$n5599 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000001000100 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mstatus_MPP[0] I1=murax.system_cpu.CsrPlugin_privilege[0] I2=murax.system_cpu.CsrPlugin_interruptJump I3=$false O=$abc$159056$n6683 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n6685 I1=$abc$159056$n6668 I2=$abc$159056$n6686 I3=$abc$159056$n6679_1 O=$abc$159056$n5602 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111100010001 .gate SB_LUT4 I0=murax.system_cpu.CsrPlugin_mstatus_MPP[1] I1=murax.system_cpu.CsrPlugin_privilege[1] I2=murax.system_cpu.CsrPlugin_interruptJump I3=$false O=$abc$159056$n6685 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00110101 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[12] I1=$abc$159056$n6408 I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_SRC1[12] O=$abc$159056$n6686 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010000000111111 .gate SB_LUT4 I0=$abc$159056$n3465 I1=$abc$159056$n5576 I2=$false I3=$false O=$abc$159056$n5607 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[34] I1=$abc$159056$n6689_1 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5616 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[3] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6689_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[35] I1=$abc$159056$n6691 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5619 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[4] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6691 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[36] I1=$abc$159056$n6693 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5622 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[5] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6693 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[37] I1=$abc$159056$n6695 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5625 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[6] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6695 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[38] I1=$abc$159056$n6697 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5628 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[7] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6697 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[39] I1=$abc$159056$n6699 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5631 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[8] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6699 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[40] I1=$abc$159056$n6701 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5634 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[9] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6701 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[41] I1=$abc$159056$n6703 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5637 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[10] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6703 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[42] I1=$abc$159056$n6705 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5640 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[11] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6705 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[43] I1=$abc$159056$n6707 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5643 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[12] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6707 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[44] I1=$abc$159056$n6709 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5646 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[13] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6709 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[45] I1=$abc$159056$n6711 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5649 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[14] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6711 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[46] I1=$abc$159056$n6713 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5652 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[15] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6713 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[15] I1=$abc$159056$n6715 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[16] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6715 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[47] I1=murax.system_cpu._zz_73_[15] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5655 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[16] I1=$abc$159056$n6718 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[17] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6718 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[48] I1=murax.system_cpu._zz_73_[16] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5657 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[17] I1=$abc$159056$n6721 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[18] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6721 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[49] I1=murax.system_cpu._zz_73_[17] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5660 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[18] I1=$abc$159056$n6724 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[19] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6724 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[50] I1=murax.system_cpu._zz_73_[18] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5663 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[19] I1=$abc$159056$n6727 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[20] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6727 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[51] I1=murax.system_cpu._zz_73_[19] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5666 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[20] I1=$abc$159056$n6730 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[21] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6730 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[52] I1=murax.system_cpu._zz_73_[20] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5669 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[21] I1=$abc$159056$n6733 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[22] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6733 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[53] I1=murax.system_cpu._zz_73_[21] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5672 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[22] I1=$abc$159056$n6736_1 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[23] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6736_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[54] I1=murax.system_cpu._zz_73_[22] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5675 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[23] I1=$abc$159056$n6739 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[24] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6739 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[55] I1=murax.system_cpu._zz_73_[23] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5678 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[24] I1=$abc$159056$n6742 I2=$abc$159056$n118 I3=$false O=murax.system_cpu._zz_73_[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[25] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6742 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[56] I1=murax.system_cpu._zz_73_[24] I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5680 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[57] I1=$abc$159056$n6745_1 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5683 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[26] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6745_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[58] I1=$abc$159056$n6747 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5686 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[27] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6747 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[59] I1=$abc$159056$n6749 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5689 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[28] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6749 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[60] I1=$abc$159056$n6751 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5692 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[29] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6751 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[61] I1=$abc$159056$n6753_1 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5695 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[30] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6753_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[62] I1=$abc$159056$n6755_1 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5698 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[31] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6755_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[63] I1=$abc$159056$n6757 I2=$abc$159056$n3476 I3=$false O=$abc$159056$n5701 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00111010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[32] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy I3=$false O=$abc$159056$n6757 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[0] I1=murax.system_cpu._zz_66_[0] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5703 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[1] I1=murax.system_cpu._zz_66_[1] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5705 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[2] I1=murax.system_cpu._zz_66_[2] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5707 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[3] I1=murax.system_cpu._zz_66_[3] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5709 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[4] I1=murax.system_cpu._zz_66_[4] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5711 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[5] I1=murax.system_cpu._zz_66_[5] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5713 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[6] I1=murax.system_cpu._zz_66_[6] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5715 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[7] I1=murax.system_cpu._zz_66_[7] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5717 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[8] I1=murax.system_cpu._zz_66_[8] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5719 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[9] I1=murax.system_cpu._zz_66_[9] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5721 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[10] I1=murax.system_cpu._zz_66_[10] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5723 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[11] I1=murax.system_cpu._zz_66_[11] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5725 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[12] I1=murax.system_cpu._zz_66_[12] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5727 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[13] I1=murax.system_cpu._zz_66_[13] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5729 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[14] I1=murax.system_cpu._zz_66_[14] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5731 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[15] I1=murax.system_cpu._zz_66_[15] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5733 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[16] I1=murax.system_cpu._zz_66_[16] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5735 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[17] I1=murax.system_cpu._zz_66_[17] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5737 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[18] I1=murax.system_cpu._zz_66_[18] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5739 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[19] I1=murax.system_cpu._zz_66_[19] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5741 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[20] I1=murax.system_cpu._zz_66_[20] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5743 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[21] I1=murax.system_cpu._zz_66_[21] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5745 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[22] I1=murax.system_cpu._zz_66_[22] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5747 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[23] I1=murax.system_cpu._zz_66_[23] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5749 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[24] I1=murax.system_cpu._zz_66_[24] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5751 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[25] I1=murax.system_cpu._zz_66_[25] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5753 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[26] I1=murax.system_cpu._zz_66_[26] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5755 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[27] I1=murax.system_cpu._zz_66_[27] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5757 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[28] I1=murax.system_cpu._zz_66_[28] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5759 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[29] I1=murax.system_cpu._zz_66_[29] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5761 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[30] I1=murax.system_cpu._zz_66_[30] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5763 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_PC[31] I1=murax.system_cpu._zz_66_[31] I2=$abc$159056$n3405 I3=$false O=$abc$159056$n5765 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=$abc$159056$n3608 I1=$abc$159056$n3473 I2=$abc$159056$n6192 I3=$abc$159056$n6791 O=$abc$159056$n5769 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111100001011 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[49] I1=murax.system_cpu.DebugPlugin_haltIt I2=murax.systemDebugger_1_.dispatcher_dataShifter[57] I3=$abc$159056$n272 O=$abc$159056$n6791 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111011001100 .gate SB_LUT4 I0=$abc$159056$n272 I1=murax.systemDebugger_1_.dispatcher_dataShifter[57] I2=murax.system_cpu.DebugPlugin_haltedByBreak I3=$abc$159056$n3608 O=$abc$159056$n5778 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111101110000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[0] I1=murax.system_cpu.decode_to_execute_PC[0] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[1] I1=murax.system_cpu.decode_to_execute_PC[1] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[2] I1=murax.system_cpu.decode_to_execute_PC[2] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[3] I1=murax.system_cpu.decode_to_execute_PC[3] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[4] I1=murax.system_cpu.decode_to_execute_PC[4] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[5] I1=murax.system_cpu.decode_to_execute_PC[5] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[6] I1=murax.system_cpu.decode_to_execute_PC[6] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[7] I1=murax.system_cpu.decode_to_execute_PC[7] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[8] I1=murax.system_cpu.decode_to_execute_PC[8] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[9] I1=murax.system_cpu.decode_to_execute_PC[9] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[10] I1=murax.system_cpu.decode_to_execute_PC[10] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[11] I1=murax.system_cpu.decode_to_execute_PC[11] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[12] I1=murax.system_cpu.decode_to_execute_PC[12] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[13] I1=murax.system_cpu.decode_to_execute_PC[13] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[14] I1=murax.system_cpu.decode_to_execute_PC[14] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[15] I1=murax.system_cpu.decode_to_execute_PC[15] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[16] I1=murax.system_cpu.decode_to_execute_PC[16] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[17] I1=murax.system_cpu.decode_to_execute_PC[17] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[18] I1=murax.system_cpu.decode_to_execute_PC[18] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[19] I1=murax.system_cpu.decode_to_execute_PC[19] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[20] I1=murax.system_cpu.decode_to_execute_PC[20] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[21] I1=murax.system_cpu.decode_to_execute_PC[21] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[22] I1=murax.system_cpu.decode_to_execute_PC[22] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[23] I1=murax.system_cpu.decode_to_execute_PC[23] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[24] I1=murax.system_cpu.decode_to_execute_PC[24] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[25] I1=murax.system_cpu.decode_to_execute_PC[25] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[26] I1=murax.system_cpu.decode_to_execute_PC[26] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[27] I1=murax.system_cpu.decode_to_execute_PC[27] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[28] I1=murax.system_cpu.decode_to_execute_PC[28] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[29] I1=murax.system_cpu.decode_to_execute_PC[29] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[30] I1=murax.system_cpu.decode_to_execute_PC[30] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS1[31] I1=murax.system_cpu.decode_to_execute_PC[31] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu.execute_BranchPlugin_branch_src1[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1010110011001100 .gate SB_LUT4 I0=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[0] I1=murax.system_cpu.decode_to_execute_SRC2[0] I2=murax.system_cpu.execute_LightShifterPlugin_isActive I3=$false O=murax.system_cpu.execute_LightShifterPlugin_amplitude[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[0] I1=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I2=$false I3=$false O=murax.system_cpu._zz_195_[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[1] I1=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I2=$false I3=$false O=murax.system_cpu._zz_195_[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[2] I1=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I2=$false I3=$false O=murax.system_cpu._zz_195_[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[3] I1=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I2=$false I3=$false O=murax.system_cpu._zz_195_[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[4] I1=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I2=$false I3=$false O=murax.system_cpu._zz_195_[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[5] I2=$false I3=$false O=murax.system_cpu._zz_195_[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[6] I2=$false I3=$false O=murax.system_cpu._zz_195_[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[7] I2=$false I3=$false O=murax.system_cpu._zz_195_[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[8] I2=$false I3=$false O=murax.system_cpu._zz_195_[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[9] I2=$false I3=$false O=murax.system_cpu._zz_195_[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[10] I2=$false I3=$false O=murax.system_cpu._zz_195_[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[11] I2=$false I3=$false O=murax.system_cpu._zz_195_[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[12] I2=$false I3=$false O=murax.system_cpu._zz_195_[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[13] I2=$false I3=$false O=murax.system_cpu._zz_195_[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[14] I2=$false I3=$false O=murax.system_cpu._zz_195_[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[15] I2=$false I3=$false O=murax.system_cpu._zz_195_[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[16] I2=$false I3=$false O=murax.system_cpu._zz_195_[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[17] I2=$false I3=$false O=murax.system_cpu._zz_195_[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[18] I2=$false I3=$false O=murax.system_cpu._zz_195_[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[19] I2=$false I3=$false O=murax.system_cpu._zz_195_[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[20] I2=$false I3=$false O=murax.system_cpu._zz_195_[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[21] I2=$false I3=$false O=murax.system_cpu._zz_195_[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[22] I2=$false I3=$false O=murax.system_cpu._zz_195_[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[23] I2=$false I3=$false O=murax.system_cpu._zz_195_[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[24] I2=$false I3=$false O=murax.system_cpu._zz_195_[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[25] I2=$false I3=$false O=murax.system_cpu._zz_195_[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[26] I2=$false I3=$false O=murax.system_cpu._zz_195_[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[27] I2=$false I3=$false O=murax.system_cpu._zz_195_[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[28] I2=$false I3=$false O=murax.system_cpu._zz_195_[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[29] I2=$false I3=$false O=murax.system_cpu._zz_195_[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC2[30] I2=$false I3=$false O=murax.system_cpu._zz_195_[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[31] I1=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I2=$false I3=$false O=murax.system_cpu._zz_195_[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[2] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[3] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[4] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[5] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[6] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[7] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[8] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[9] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[10] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[11] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] I1=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[12] I2=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I3=$false O=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I1=$abc$159056$n6870 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n6196 I1=$abc$159056$n6872 I2=$abc$159056$n6871_1 I3=murax.system_apbBridge.state O=$abc$159056$n6870 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111100000000 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write I1=$abc$159056$n3205_1 I2=murax.system_drygascon128.core_read I3=$false O=$abc$159056$n6871_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid I1=$abc$159056$n3207_1 I2=$abc$159056$n6873 I3=$false O=$abc$159056$n6872 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11010000 .gate SB_LUT4 I0=murax.apb3Router_1_.selIndex[1] I1=murax.apb3Router_1_.selIndex[0] I2=$false I3=$false O=$abc$159056$n6873 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3567 I1=$abc$159056$n6875 I2=$abc$159056$n6870 I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid O=$abc$159056$n6136 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111101000100 .gate SB_LUT4 I0=$abc$159056$n3589_1 I1=murax.system_mainBusDecoder_logic_hits_1 I2=$false I3=$false O=$abc$159056$n6875 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_apbBridge.state I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid I2=$abc$159056$n6870 I3=$false O=$abc$159056$n6139 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001110 .gate SB_LUT4 I0=$abc$159056$n4480 I1=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] I2=$false I3=$false O=$abc$159056$n6211 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n5576 I1=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ I2=$false I3=$false O=$abc$159056$n6283 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n6889 I1=$abc$159056$n6884 I2=$abc$159056$n6881 I3=$abc$159056$n6880 O=$abc$159056$n6286 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n6871_1 I1=$abc$159056$n3205_1 I2=$abc$159056$n3209 I3=$false O=$abc$159056$n6880 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[32] I2=$abc$159056$n6882 I3=$abc$159056$n4976_1 O=$abc$159056$n6881 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[0] I1=$abc$159056$n3212 I2=$abc$159056$n6883 I3=$false O=$abc$159056$n6882 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[64] I1=murax.system_drygascon128.core.r[96] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6883 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[0] I1=$abc$159056$n3949_1 I2=$abc$159056$n6888 I3=$abc$159056$n6885 O=$abc$159056$n6884 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[128] I1=$abc$159056$n3691_1 I2=$abc$159056$n6887_1 I3=$abc$159056$n6886 O=$abc$159056$n6885 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000111 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[96] I1=murax.system_drygascon128.core.c[224] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6886 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=$abc$159056$n4932_1 I2=murax.system_drygascon128.core.c[256] I3=$false O=$abc$159056$n6887_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[64] I1=murax.system_drygascon128.core.c[192] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6888 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[288] I2=$abc$159056$n6890 I3=$abc$159056$n3936 O=$abc$159056$n6889 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[32] I2=murax.system_drygascon128.core.c[160] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6890 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n6900 I1=$abc$159056$n6895 I2=$abc$159056$n6892 I3=$abc$159056$n6880 O=$abc$159056$n6289 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[33] I2=$abc$159056$n6893 I3=$abc$159056$n4976_1 O=$abc$159056$n6892 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[97] I1=$abc$159056$n3796_1 I2=$abc$159056$n6894_1 I3=$false O=$abc$159056$n6893 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[1] I1=murax.system_drygascon128.core.r[65] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6894_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n6896 I1=$abc$159056$n6898 I2=$abc$159056$n6899 I3=$false O=$abc$159056$n6895 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[257] I2=$abc$159056$n6897 I3=$abc$159056$n3212 O=$abc$159056$n6896 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[1] I2=murax.system_drygascon128.core.c[129] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6897 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[97] I1=murax.system_drygascon128.core.c[225] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6898 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[65] I1=murax.system_drygascon128.core.c[193] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6899 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[161] I2=$abc$159056$n6901 I3=$abc$159056$n3936 O=$abc$159056$n6900 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[33] I1=murax.system_drygascon128.core.c[289] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n6901 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n6912 I1=$abc$159056$n6906 I2=$abc$159056$n6903_1 I3=$abc$159056$n6880 O=$abc$159056$n6292 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n6905 I1=$abc$159056$n6904 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n6903_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[66] I1=murax.system_drygascon128.core.r[98] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6904 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[2] I1=murax.system_drygascon128.core.r[34] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n6905 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n6907 I1=$abc$159056$n6909 I2=$abc$159056$n6911 I3=$false O=$abc$159056$n6906 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[162] I2=$abc$159056$n6908 I3=$abc$159056$n3936 O=$abc$159056$n6907 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[34] I1=murax.system_drygascon128.core.c[290] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n6908 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[258] I2=$abc$159056$n6910_1 I3=$abc$159056$n3212 O=$abc$159056$n6909 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[2] I2=murax.system_drygascon128.core.c[130] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6910_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[66] I1=murax.system_drygascon128.core.c[194] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6911 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[98] I1=murax.system_drygascon128.core.c[226] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6912 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n6922 I1=$abc$159056$n6917 I2=$abc$159056$n6914 I3=$abc$159056$n6880 O=$abc$159056$n6295 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[35] I2=$abc$159056$n6915 I3=$abc$159056$n4976_1 O=$abc$159056$n6914 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[99] I1=$abc$159056$n3796_1 I2=$abc$159056$n6916 I3=$false O=$abc$159056$n6915 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[3] I1=murax.system_drygascon128.core.r[67] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6916 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n6918 I1=$abc$159056$n6920 I2=$abc$159056$n6921 I3=$false O=$abc$159056$n6917 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[259] I2=$abc$159056$n6919_1 I3=$abc$159056$n3212 O=$abc$159056$n6918 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[3] I2=murax.system_drygascon128.core.c[131] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6919_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[99] I1=murax.system_drygascon128.core.c[227] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6920 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[67] I1=murax.system_drygascon128.core.c[195] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6921 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[163] I2=$abc$159056$n6923 I3=$abc$159056$n3936 O=$abc$159056$n6922 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[35] I1=murax.system_drygascon128.core.c[291] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n6923 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n6934 I1=$abc$159056$n6928 I2=$abc$159056$n6925 I3=$abc$159056$n6880 O=$abc$159056$n6298 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n6927 I1=$abc$159056$n6926_1 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n6925 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[68] I1=murax.system_drygascon128.core.r[100] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6926_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[4] I1=murax.system_drygascon128.core.r[36] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n6927 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n6929 I1=$abc$159056$n6931 I2=$abc$159056$n6933 I3=$false O=$abc$159056$n6928 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[164] I2=$abc$159056$n6930 I3=$abc$159056$n3936 O=$abc$159056$n6929 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[36] I1=murax.system_drygascon128.core.c[292] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n6930 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[260] I2=$abc$159056$n6932 I3=$abc$159056$n3212 O=$abc$159056$n6931 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[4] I2=murax.system_drygascon128.core.c[132] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6932 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[68] I1=murax.system_drygascon128.core.c[196] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6933 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[100] I1=murax.system_drygascon128.core.c[228] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6934 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n6945 I1=$abc$159056$n6939 I2=$abc$159056$n6936 I3=$abc$159056$n6880 O=$abc$159056$n6301 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n6938 I1=$abc$159056$n6937 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n6936 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[69] I1=murax.system_drygascon128.core.r[101] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6937 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[5] I1=murax.system_drygascon128.core.r[37] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n6938 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n6940 I1=$abc$159056$n6942_1 I2=$abc$159056$n6944 I3=$false O=$abc$159056$n6939 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[165] I2=$abc$159056$n6941 I3=$abc$159056$n3936 O=$abc$159056$n6940 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[37] I1=murax.system_drygascon128.core.c[293] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n6941 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[261] I2=$abc$159056$n6943 I3=$abc$159056$n3212 O=$abc$159056$n6942_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[5] I2=murax.system_drygascon128.core.c[133] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6943 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[69] I1=murax.system_drygascon128.core.c[197] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6944 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[101] I1=murax.system_drygascon128.core.c[229] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6945 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n6956 I1=$abc$159056$n6950 I2=$abc$159056$n6947 I3=$abc$159056$n6880 O=$abc$159056$n6304 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n6949 I1=$abc$159056$n6948 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n6947 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[70] I1=murax.system_drygascon128.core.r[102] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6948 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[6] I1=murax.system_drygascon128.core.r[38] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n6949 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n6951_1 I1=$abc$159056$n6953 I2=$abc$159056$n6955 I3=$false O=$abc$159056$n6950 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[294] I2=$abc$159056$n6952 I3=$abc$159056$n3936 O=$abc$159056$n6951_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[38] I2=murax.system_drygascon128.core.c[166] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6952 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[262] I2=$abc$159056$n6954 I3=$abc$159056$n3212 O=$abc$159056$n6953 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[6] I2=murax.system_drygascon128.core.c[134] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6954 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[70] I1=murax.system_drygascon128.core.c[198] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6955 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[102] I1=murax.system_drygascon128.core.c[230] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6956 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n6967_1 I1=$abc$159056$n6961 I2=$abc$159056$n6958_1 I3=$abc$159056$n6880 O=$abc$159056$n6307 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[39] I2=$abc$159056$n6959 I3=$abc$159056$n4976_1 O=$abc$159056$n6958_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[7] I1=$abc$159056$n3212 I2=$abc$159056$n6960 I3=$false O=$abc$159056$n6959 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[71] I1=murax.system_drygascon128.core.r[103] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6960 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n6962 I1=$abc$159056$n6964 I2=$abc$159056$n6966 I3=$false O=$abc$159056$n6961 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[295] I2=$abc$159056$n6963 I3=$abc$159056$n3936 O=$abc$159056$n6962 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[39] I2=murax.system_drygascon128.core.c[167] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6963 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[263] I2=$abc$159056$n6965 I3=$abc$159056$n3212 O=$abc$159056$n6964 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[7] I2=murax.system_drygascon128.core.c[135] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6965 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[71] I1=murax.system_drygascon128.core.c[199] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6966 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[103] I1=murax.system_drygascon128.core.c[231] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6967_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n6978 I1=$abc$159056$n6973 I2=$abc$159056$n8083 I3=$abc$159056$n6880 O=$abc$159056$n6310 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n6974_1 I1=$abc$159056$n6976 I2=$abc$159056$n6977 I3=$false O=$abc$159056$n6973 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[264] I2=$abc$159056$n6975 I3=$abc$159056$n3212 O=$abc$159056$n6974_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[8] I2=murax.system_drygascon128.core.c[136] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6975 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[104] I1=murax.system_drygascon128.core.c[232] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6976 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[72] I1=murax.system_drygascon128.core.c[200] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6977 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[296] I2=$abc$159056$n6979 I3=$abc$159056$n3936 O=$abc$159056$n6978 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[40] I2=murax.system_drygascon128.core.c[168] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6979 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[297] I2=$abc$159056$n6986 I3=$abc$159056$n3936 O=$abc$159056$n6985 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[41] I2=murax.system_drygascon128.core.c[169] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n6986 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[105] I1=murax.system_drygascon128.core.c[233] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n6987 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[73] I1=murax.system_drygascon128.core.c[201] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n6988 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7002 I1=$abc$159056$n6996 I2=$abc$159056$n6993 I3=$abc$159056$n6880 O=$abc$159056$n6316 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[42] I2=$abc$159056$n6994 I3=$abc$159056$n4976_1 O=$abc$159056$n6993 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[10] I1=$abc$159056$n3212 I2=$abc$159056$n6995 I3=$false O=$abc$159056$n6994 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[74] I1=murax.system_drygascon128.core.r[106] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n6995 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n6997 I1=$abc$159056$n6999 I2=$abc$159056$n7001 I3=$false O=$abc$159056$n6996 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[170] I2=$abc$159056$n6998_1 I3=$abc$159056$n3936 O=$abc$159056$n6997 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[42] I1=murax.system_drygascon128.core.c[298] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n6998_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[266] I2=$abc$159056$n7000 I3=$abc$159056$n3212 O=$abc$159056$n6999 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[10] I2=murax.system_drygascon128.core.c[138] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7000 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[74] I1=murax.system_drygascon128.core.c[202] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7001 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[106] I1=murax.system_drygascon128.core.c[234] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7002 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[299] I2=$abc$159056$n7009 I3=$abc$159056$n3936 O=$abc$159056$n7008 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[43] I2=murax.system_drygascon128.core.c[171] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7009 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[107] I1=murax.system_drygascon128.core.c[235] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7010 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[75] I1=murax.system_drygascon128.core.c[203] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7011 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7025 I1=$abc$159056$n7019 I2=$abc$159056$n7016 I3=$abc$159056$n6880 O=$abc$159056$n6322 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=murax.system_drygascon128.core.r[12] I2=$abc$159056$n7017 I3=$abc$159056$n4976_1 O=$abc$159056$n7016 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[44] I1=$abc$159056$n3936 I2=$abc$159056$n7018 I3=$false O=$abc$159056$n7017 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[76] I1=murax.system_drygascon128.core.r[108] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7018 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n7020 I1=$abc$159056$n7022_1 I2=$abc$159056$n7024 I3=$false O=$abc$159056$n7019 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[300] I2=$abc$159056$n7021 I3=$abc$159056$n3936 O=$abc$159056$n7020 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[44] I2=murax.system_drygascon128.core.c[172] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7021 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[268] I2=$abc$159056$n7023 I3=$abc$159056$n3212 O=$abc$159056$n7022_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[12] I2=murax.system_drygascon128.core.c[140] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7023 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[76] I1=murax.system_drygascon128.core.c[204] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7024 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[108] I1=murax.system_drygascon128.core.c[236] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7025 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7036 I1=$abc$159056$n7030_1 I2=$abc$159056$n7027 I3=$abc$159056$n6880 O=$abc$159056$n6325 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n7029 I1=$abc$159056$n7028 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n7027 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[77] I1=murax.system_drygascon128.core.r[109] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7028 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[13] I1=murax.system_drygascon128.core.r[45] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n7029 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n7031 I1=$abc$159056$n7033 I2=$abc$159056$n7035 I3=$false O=$abc$159056$n7030_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[173] I2=$abc$159056$n7032 I3=$abc$159056$n3936 O=$abc$159056$n7031 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[45] I1=murax.system_drygascon128.core.c[301] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7032 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[269] I2=$abc$159056$n7034 I3=$abc$159056$n3212 O=$abc$159056$n7033 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[13] I2=murax.system_drygascon128.core.c[141] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7034 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[77] I1=murax.system_drygascon128.core.c[205] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7035 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[109] I1=murax.system_drygascon128.core.c[237] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7036 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7046_1 I1=$abc$159056$n7041 I2=$abc$159056$n7038_1 I3=$abc$159056$n6880 O=$abc$159056$n6328 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3279 I1=murax.system_drygascon128.core.r[78] I2=$abc$159056$n7039 I3=$abc$159056$n4976_1 O=$abc$159056$n7038_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[46] I1=$abc$159056$n3936 I2=$abc$159056$n7040 I3=$false O=$abc$159056$n7039 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[14] I1=murax.system_drygascon128.core.r[110] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n7040 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011111111110101 .gate SB_LUT4 I0=$abc$159056$n7042 I1=$abc$159056$n7044 I2=$abc$159056$n7045 I3=$false O=$abc$159056$n7041 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[270] I2=$abc$159056$n7043 I3=$abc$159056$n3212 O=$abc$159056$n7042 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[14] I2=murax.system_drygascon128.core.c[142] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7043 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[110] I1=murax.system_drygascon128.core.c[238] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7044 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[78] I1=murax.system_drygascon128.core.c[206] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7045 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[174] I2=$abc$159056$n7047 I3=$abc$159056$n3936 O=$abc$159056$n7046_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[46] I1=murax.system_drygascon128.core.c[302] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7047 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n7058 I1=$abc$159056$n7052 I2=$abc$159056$n7049 I3=$abc$159056$n6880 O=$abc$159056$n6331 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n7051 I1=$abc$159056$n7050 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n7049 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[79] I1=murax.system_drygascon128.core.r[47] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7050 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010100111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[15] I1=murax.system_drygascon128.core.r[111] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n7051 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011111111110101 .gate SB_LUT4 I0=$abc$159056$n7053 I1=$abc$159056$n7055 I2=$abc$159056$n7057 I3=$false O=$abc$159056$n7052 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[175] I2=$abc$159056$n7054_1 I3=$abc$159056$n3936 O=$abc$159056$n7053 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[47] I1=murax.system_drygascon128.core.c[303] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7054_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[271] I2=$abc$159056$n7056 I3=$abc$159056$n3212 O=$abc$159056$n7055 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[15] I2=murax.system_drygascon128.core.c[143] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7056 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[79] I1=murax.system_drygascon128.core.c[207] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7057 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[111] I1=murax.system_drygascon128.core.c[239] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7058 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7069 I1=$abc$159056$n7063 I2=$abc$159056$n7060 I3=$abc$159056$n6880 O=$abc$159056$n6334 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n7062_1 I1=$abc$159056$n7061 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n7060 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[80] I1=murax.system_drygascon128.core.r[48] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7061 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010100111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[16] I1=murax.system_drygascon128.core.r[112] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n7062_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011111111110101 .gate SB_LUT4 I0=$abc$159056$n7064 I1=$abc$159056$n7066 I2=$abc$159056$n7068 I3=$false O=$abc$159056$n7063 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[304] I2=$abc$159056$n7065 I3=$abc$159056$n3936 O=$abc$159056$n7064 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[48] I2=murax.system_drygascon128.core.c[176] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7065 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[272] I2=$abc$159056$n7067 I3=$abc$159056$n3212 O=$abc$159056$n7066 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[16] I2=murax.system_drygascon128.core.c[144] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7067 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[80] I1=murax.system_drygascon128.core.c[208] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7068 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[112] I1=murax.system_drygascon128.core.c[240] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7069 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[273] I2=$abc$159056$n7076 I3=$abc$159056$n3212 O=$abc$159056$n7075 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[17] I2=murax.system_drygascon128.core.c[145] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7076 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[305] I2=$abc$159056$n7081 I3=$abc$159056$n3936 O=$abc$159056$n7080 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[49] I2=murax.system_drygascon128.core.c[177] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7081 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n7092 I1=$abc$159056$n7087 I2=$abc$159056$n8102_1 I3=$abc$159056$n6880 O=$abc$159056$n6340 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n7088 I1=$abc$159056$n7090 I2=$abc$159056$n7091 I3=$false O=$abc$159056$n7087 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[274] I2=$abc$159056$n7089 I3=$abc$159056$n3212 O=$abc$159056$n7088 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[18] I2=murax.system_drygascon128.core.c[146] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7089 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[114] I1=murax.system_drygascon128.core.c[242] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7090 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[82] I1=murax.system_drygascon128.core.c[210] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7091 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[178] I2=$abc$159056$n7093 I3=$abc$159056$n3936 O=$abc$159056$n7092 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[50] I1=murax.system_drygascon128.core.c[306] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7093 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n7104 I1=$abc$159056$n7099 I2=$abc$159056$n8105_1 I3=$abc$159056$n6880 O=$abc$159056$n6343 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n7100 I1=$abc$159056$n7102_1 I2=$abc$159056$n7103 I3=$false O=$abc$159056$n7099 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[275] I2=$abc$159056$n7101 I3=$abc$159056$n3212 O=$abc$159056$n7100 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[19] I2=murax.system_drygascon128.core.c[147] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7101 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[115] I1=murax.system_drygascon128.core.c[243] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7102_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[83] I1=murax.system_drygascon128.core.c[211] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7103 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3280 I1=murax.system_drygascon128.core.c[51] I2=$abc$159056$n7105 I3=$abc$159056$n3936 O=$abc$159056$n7104 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[307] I2=murax.system_drygascon128.core.c[179] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7105 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111101110111 .gate SB_LUT4 I0=$abc$159056$n7115 I1=$abc$159056$n7110_1 I2=$abc$159056$n7107 I3=$abc$159056$n6880 O=$abc$159056$n6346 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=murax.system_drygascon128.core.r[20] I2=$abc$159056$n7108 I3=$abc$159056$n4976_1 O=$abc$159056$n7107 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[116] I1=$abc$159056$n3796_1 I2=$abc$159056$n7109 I3=$false O=$abc$159056$n7108 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[84] I1=murax.system_drygascon128.core.r[52] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7109 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010100111111 .gate SB_LUT4 I0=$abc$159056$n7111 I1=$abc$159056$n7113 I2=$abc$159056$n7114 I3=$false O=$abc$159056$n7110_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[276] I2=$abc$159056$n7112 I3=$abc$159056$n3212 O=$abc$159056$n7111 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[20] I2=murax.system_drygascon128.core.c[148] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7112 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[116] I1=murax.system_drygascon128.core.c[244] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7113 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[84] I1=murax.system_drygascon128.core.c[212] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7114 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[308] I2=$abc$159056$n7116 I3=$abc$159056$n3936 O=$abc$159056$n7115 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[52] I2=murax.system_drygascon128.core.c[180] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7116 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n7127 I1=$abc$159056$n7121 I2=$abc$159056$n7118_1 I3=$abc$159056$n6880 O=$abc$159056$n6349 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[53] I2=$abc$159056$n7119 I3=$abc$159056$n4976_1 O=$abc$159056$n7118_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[21] I1=$abc$159056$n3212 I2=$abc$159056$n7120 I3=$false O=$abc$159056$n7119 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[85] I1=murax.system_drygascon128.core.r[117] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7120 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n7122 I1=$abc$159056$n7124 I2=$abc$159056$n7126_1 I3=$false O=$abc$159056$n7121 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[181] I2=$abc$159056$n7123 I3=$abc$159056$n3936 O=$abc$159056$n7122 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[53] I1=murax.system_drygascon128.core.c[309] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7123 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[277] I2=$abc$159056$n7125 I3=$abc$159056$n3212 O=$abc$159056$n7124 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[21] I2=murax.system_drygascon128.core.c[149] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7125 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[85] I1=murax.system_drygascon128.core.c[213] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7126_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[117] I1=murax.system_drygascon128.core.c[245] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7127 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7138 I1=$abc$159056$n7132 I2=$abc$159056$n7129 I3=$abc$159056$n6880 O=$abc$159056$n6352 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[54] I2=$abc$159056$n7130 I3=$abc$159056$n4976_1 O=$abc$159056$n7129 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[22] I1=$abc$159056$n3212 I2=$abc$159056$n7131 I3=$false O=$abc$159056$n7130 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[86] I1=murax.system_drygascon128.core.r[118] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7131 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n7133 I1=$abc$159056$n7135 I2=$abc$159056$n7137 I3=$false O=$abc$159056$n7132 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[182] I2=$abc$159056$n7134_1 I3=$abc$159056$n3936 O=$abc$159056$n7133 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[54] I1=murax.system_drygascon128.core.c[310] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7134_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[278] I2=$abc$159056$n7136 I3=$abc$159056$n3212 O=$abc$159056$n7135 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[22] I2=murax.system_drygascon128.core.c[150] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7136 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[86] I1=murax.system_drygascon128.core.c[214] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7137 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[118] I1=murax.system_drygascon128.core.c[246] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7138 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7149 I1=$abc$159056$n7143 I2=$abc$159056$n7140 I3=$abc$159056$n6880 O=$abc$159056$n6355 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n7142_1 I1=$abc$159056$n7141 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n7140 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[87] I1=murax.system_drygascon128.core.r[119] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7141 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[23] I1=murax.system_drygascon128.core.r[55] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n7142_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n7144 I1=$abc$159056$n7146 I2=$abc$159056$n7148 I3=$false O=$abc$159056$n7143 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[183] I2=$abc$159056$n7145 I3=$abc$159056$n3936 O=$abc$159056$n7144 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[55] I1=murax.system_drygascon128.core.c[311] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7145 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[279] I2=$abc$159056$n7147 I3=$abc$159056$n3212 O=$abc$159056$n7146 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[23] I2=murax.system_drygascon128.core.c[151] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7147 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[87] I1=murax.system_drygascon128.core.c[215] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7148 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[119] I1=murax.system_drygascon128.core.c[247] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7149 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7160 I1=$abc$159056$n7154 I2=$abc$159056$n7151 I3=$abc$159056$n6880 O=$abc$159056$n6358 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[56] I2=$abc$159056$n7152 I3=$abc$159056$n4976_1 O=$abc$159056$n7151 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[24] I1=$abc$159056$n3212 I2=$abc$159056$n7153 I3=$false O=$abc$159056$n7152 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[88] I1=murax.system_drygascon128.core.r[120] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7153 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n7155 I1=$abc$159056$n7157 I2=$abc$159056$n7159 I3=$false O=$abc$159056$n7154 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[184] I2=$abc$159056$n7156 I3=$abc$159056$n3936 O=$abc$159056$n7155 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[56] I1=murax.system_drygascon128.core.c[312] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7156 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[280] I2=$abc$159056$n7158_1 I3=$abc$159056$n3212 O=$abc$159056$n7157 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[24] I2=murax.system_drygascon128.core.c[152] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7158_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[88] I1=murax.system_drygascon128.core.c[216] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7159 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[120] I1=murax.system_drygascon128.core.c[248] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7160 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7170 I1=$abc$159056$n7165 I2=$abc$159056$n7162 I3=$abc$159056$n6880 O=$abc$159056$n6361 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3936 I1=murax.system_drygascon128.core.r[57] I2=$abc$159056$n7163 I3=$abc$159056$n4976_1 O=$abc$159056$n7162 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[25] I1=$abc$159056$n3212 I2=$abc$159056$n7164 I3=$false O=$abc$159056$n7163 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[89] I1=murax.system_drygascon128.core.r[121] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7164 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n7167 I1=$abc$159056$n7168 I2=$abc$159056$n7169 I3=$abc$159056$n7166_1 O=$abc$159056$n7165 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[25] I1=$abc$159056$n3949_1 I2=$abc$159056$n3691_1 I3=murax.system_drygascon128.core.c[153] O=$abc$159056$n7166_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[121] I1=murax.system_drygascon128.core.c[249] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7167 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[89] I1=murax.system_drygascon128.core.c[217] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7168 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=$abc$159056$n4932_1 I2=murax.system_drygascon128.core.c[281] I3=$false O=$abc$159056$n7169 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[313] I2=$abc$159056$n7171 I3=$abc$159056$n3936 O=$abc$159056$n7170 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[57] I2=murax.system_drygascon128.core.c[185] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7171 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n7181 I1=$abc$159056$n7176 I2=$abc$159056$n7173 I3=$abc$159056$n6880 O=$abc$159056$n6364 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=murax.system_drygascon128.core.r[26] I2=$abc$159056$n7174_1 I3=$abc$159056$n4976_1 O=$abc$159056$n7173 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[58] I1=$abc$159056$n3936 I2=$abc$159056$n7175 I3=$false O=$abc$159056$n7174_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[90] I1=murax.system_drygascon128.core.r[122] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7175 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011010111111111 .gate SB_LUT4 I0=$abc$159056$n7178 I1=$abc$159056$n7179 I2=$abc$159056$n7180 I3=$abc$159056$n7177 O=$abc$159056$n7176 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[26] I1=$abc$159056$n3949_1 I2=$abc$159056$n3691_1 I3=murax.system_drygascon128.core.c[154] O=$abc$159056$n7177 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[122] I1=murax.system_drygascon128.core.c[250] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7178 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[90] I1=murax.system_drygascon128.core.c[218] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7179 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=$abc$159056$n4932_1 I2=murax.system_drygascon128.core.c[282] I3=$false O=$abc$159056$n7180 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[314] I2=$abc$159056$n7182_1 I3=$abc$159056$n3936 O=$abc$159056$n7181 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[58] I2=murax.system_drygascon128.core.c[186] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7182_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n7192 I1=$abc$159056$n7187 I2=$abc$159056$n7184 I3=$abc$159056$n6880 O=$abc$159056$n6367 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=murax.system_drygascon128.core.r[27] I2=$abc$159056$n7185 I3=$abc$159056$n4976_1 O=$abc$159056$n7184 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[123] I1=$abc$159056$n3796_1 I2=$abc$159056$n7186 I3=$false O=$abc$159056$n7185 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[91] I1=murax.system_drygascon128.core.r[59] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7186 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010100111111 .gate SB_LUT4 I0=$abc$159056$n7189 I1=$abc$159056$n7190_1 I2=$abc$159056$n7191 I3=$abc$159056$n7188 O=$abc$159056$n7187 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[27] I1=$abc$159056$n3949_1 I2=$abc$159056$n3691_1 I3=murax.system_drygascon128.core.c[155] O=$abc$159056$n7188 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[123] I1=murax.system_drygascon128.core.c[251] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7189 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[91] I1=murax.system_drygascon128.core.c[219] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7190_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=$abc$159056$n4932_1 I2=murax.system_drygascon128.core.c[283] I3=$false O=$abc$159056$n7191 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[315] I2=$abc$159056$n7193 I3=$abc$159056$n3936 O=$abc$159056$n7192 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[59] I2=murax.system_drygascon128.core.c[187] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7193 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n7204 I1=$abc$159056$n7198_1 I2=$abc$159056$n7195 I3=$abc$159056$n6880 O=$abc$159056$n6370 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n7197 I1=$abc$159056$n7196 I2=$abc$159056$n4976_1 I3=$false O=$abc$159056$n7195 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[92] I1=murax.system_drygascon128.core.r[60] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7196 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010100111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[28] I1=murax.system_drygascon128.core.r[124] I2=murax.system_drygascon128.core.cnt[1] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n7197 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011111111110101 .gate SB_LUT4 I0=$abc$159056$n7199 I1=$abc$159056$n7201 I2=$abc$159056$n7203 I3=$false O=$abc$159056$n7198_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[316] I2=$abc$159056$n7200 I3=$abc$159056$n3936 O=$abc$159056$n7199 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[60] I2=murax.system_drygascon128.core.c[188] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7200 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[284] I2=$abc$159056$n7202 I3=$abc$159056$n3212 O=$abc$159056$n7201 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[28] I2=murax.system_drygascon128.core.c[156] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7202 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[92] I1=murax.system_drygascon128.core.c[220] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7203 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[124] I1=murax.system_drygascon128.core.c[252] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7204 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7215 I1=$abc$159056$n7210 I2=$abc$159056$n8108_1 I3=$abc$159056$n6880 O=$abc$159056$n6373 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n7211 I1=$abc$159056$n7213 I2=$abc$159056$n7214_1 I3=$false O=$abc$159056$n7210 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[285] I2=$abc$159056$n7212 I3=$abc$159056$n3212 O=$abc$159056$n7211 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[29] I2=murax.system_drygascon128.core.c[157] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7212 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[125] I1=murax.system_drygascon128.core.c[253] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7213 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[93] I1=murax.system_drygascon128.core.c[221] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7214_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[189] I2=$abc$159056$n7216 I3=$abc$159056$n3936 O=$abc$159056$n7215 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[61] I1=murax.system_drygascon128.core.c[317] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7216 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[318] I2=$abc$159056$n7223 I3=$abc$159056$n3936 O=$abc$159056$n7222_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[62] I2=murax.system_drygascon128.core.c[190] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7223 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[126] I1=murax.system_drygascon128.core.c[254] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7224 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[94] I1=murax.system_drygascon128.core.c[222] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7225 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=$abc$159056$n7239 I1=$abc$159056$n7233 I2=$abc$159056$n7230_1 I3=$abc$159056$n6880 O=$abc$159056$n6379 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011101111110000 .gate SB_LUT4 I0=$abc$159056$n3212 I1=murax.system_drygascon128.core.r[31] I2=$abc$159056$n7231 I3=$abc$159056$n4976_1 O=$abc$159056$n7230_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[127] I1=$abc$159056$n3796_1 I2=$abc$159056$n7232 I3=$false O=$abc$159056$n7231 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[95] I1=murax.system_drygascon128.core.r[63] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n7232 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010100111111 .gate SB_LUT4 I0=$abc$159056$n7234 I1=$abc$159056$n7236 I2=$abc$159056$n7238_1 I3=$false O=$abc$159056$n7233 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000001 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=murax.system_drygascon128.core.c[191] I2=$abc$159056$n7235 I3=$abc$159056$n3936 O=$abc$159056$n7234 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[63] I1=murax.system_drygascon128.core.c[319] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[3] O=$abc$159056$n7235 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n4932_1 I1=murax.system_drygascon128.core.c[287] I2=$abc$159056$n7237 I3=$abc$159056$n3212 O=$abc$159056$n7236 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.c[31] I2=murax.system_drygascon128.core.c[159] I3=murax.system_drygascon128.core.cnt[2] O=$abc$159056$n7237 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110111011 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[95] I1=murax.system_drygascon128.core.c[223] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3279 O=$abc$159056$n7238_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[127] I1=murax.system_drygascon128.core.c[255] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n3796_1 O=$abc$159056$n7239 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101000000000 .gate SB_LUT4 I0=murax.system_timer._zz_10_ I1=murax.system_timer.timerB._zz_1_ I2=$false I3=$false O=$abc$159056$n8756 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_timer._zz_8_ I1=murax.system_timer.timerA._zz_1_ I2=$false I3=$false O=$abc$159056$n8757 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8758 I2=$false I3=$false O=$abc$159056$n8759 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8762 I2=$false I3=$false O=$abc$159056$n8763 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8764 I2=$false I3=$false O=$abc$159056$n8765 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8766 I2=$false I3=$false O=$abc$159056$n8767 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8768 I2=$false I3=$false O=$abc$159056$n8769 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8770 I2=$false I3=$false O=$abc$159056$n8771 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8772 I2=$false I3=$false O=$abc$159056$n8773 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8774 I2=$false I3=$false O=$abc$159056$n8775 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8776 I2=$false I3=$false O=$abc$159056$n8777 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8778 I2=$false I3=$false O=$abc$159056$n8779 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8780 I2=$false I3=$false O=$abc$159056$n8781 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8782 I2=$false I3=$false O=$abc$159056$n8783 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8784 I2=$false I3=$false O=$abc$159056$n8785 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8786 I2=$false I3=$false O=$abc$159056$n8787 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8788 I2=$false I3=$false O=$abc$159056$n8789 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8790 I2=$false I3=$false O=$abc$159056$n8791 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8792 I2=$false I3=$false O=$abc$159056$n8793 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8794 I2=$false I3=$false O=$abc$159056$n8795 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=$abc$159056$n8796 I2=$false I3=$false O=$abc$159056$n8797 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[0] I1=$abc$159056$n7262_1 I2=$abc$159056$n3677 I3=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_tick O=$abc$159056$n8803 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110011111010 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[0] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[1] I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[2] I3=$abc$159056$n8813 O=$abc$159056$n7262_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111000000000 .gate SB_LUT4 I0=$abc$159056$n3677 I1=$abc$159056$n7264 I2=$false I3=$false O=$abc$159056$n8806 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[2] I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[0] I2=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_tick I3=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[1] O=$abc$159056$n7264 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011000011011111 .gate SB_LUT4 I0=$abc$159056$n7266 I1=$abc$159056$n3677 I2=$false I3=$false O=$abc$159056$n8809 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=$abc$159056$n8815 I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[2] I2=$abc$159056$n3556_1 I3=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_tick O=$abc$159056$n7266 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010100000011 .gate SB_LUT4 I0=$abc$159056$n3679_1 I1=$abc$159056$n8828 I2=$false I3=$false O=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_valueNext[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3679_1 I1=$abc$159056$n8830 I2=$false I3=$false O=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_valueNext[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n3679_1 I1=$abc$159056$n8832 I2=$false I3=$false O=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_valueNext[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu.decode_MEMORY_ENABLE I1=$abc$159056$n3438 I2=$false I3=$false O=$abc$159056$n7274 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n7293 I1=murax.system_cpu._zz_99_[25] I2=$abc$159056$n7292 I3=$false O=murax.system_cpu.decode_SRC2[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[5] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[5] O=$abc$159056$n7292 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_cpu.decode_MEMORY_ENABLE I1=murax.system_cpu._zz_99_[5] I2=murax.system_cpu._zz_116_ I3=$false O=$abc$159056$n7293 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11110100 .gate SB_LUT4 I0=$abc$159056$n7293 I1=murax.system_cpu._zz_99_[26] I2=$abc$159056$n7295 I3=$false O=murax.system_cpu.decode_SRC2[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[6] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[6] O=$abc$159056$n7295 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7293 I1=murax.system_cpu._zz_99_[27] I2=$abc$159056$n7297 I3=$false O=murax.system_cpu.decode_SRC2[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[7] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[7] O=$abc$159056$n7297 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7293 I1=murax.system_cpu._zz_99_[28] I2=$abc$159056$n7299 I3=$false O=murax.system_cpu.decode_SRC2[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[8] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[8] O=$abc$159056$n7299 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7293 I1=murax.system_cpu._zz_99_[29] I2=$abc$159056$n7301 I3=$false O=murax.system_cpu.decode_SRC2[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[9] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[9] O=$abc$159056$n7301 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7293 I1=murax.system_cpu._zz_99_[30] I2=$abc$159056$n7303 I3=$false O=murax.system_cpu.decode_SRC2[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[10] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[10] O=$abc$159056$n7303 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7306 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7293 I1=murax.system_cpu._zz_128_ I2=$false I3=$false O=$abc$159056$n7305 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[11] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[11] O=$abc$159056$n7306 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7308 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[12] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[12] O=$abc$159056$n7308 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7310_1 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[13] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[13] O=$abc$159056$n7310_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7312 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[14] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[14] O=$abc$159056$n7312 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7314 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[15] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[15] O=$abc$159056$n7314 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7316 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[16] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[16] O=$abc$159056$n7316 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7318_1 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[17] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[17] O=$abc$159056$n7318_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7320 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[18] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[18] O=$abc$159056$n7320 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7322 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[19] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[19] O=$abc$159056$n7322 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7324 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[20] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[20] O=$abc$159056$n7324 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7326_1 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[21] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[21] O=$abc$159056$n7326_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7328 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[22] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[22] O=$abc$159056$n7328 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7330 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[23] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[23] O=$abc$159056$n7330 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7332 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[24] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[24] O=$abc$159056$n7332 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7334_1 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[25] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[25] O=$abc$159056$n7334_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7336 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[26] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[26] O=$abc$159056$n7336 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7338 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[27] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[27] O=$abc$159056$n7338 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7340 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[28] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[28] O=$abc$159056$n7340 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7342_1 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[29] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[29] O=$abc$159056$n7342_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7344 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[30] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[30] O=$abc$159056$n7344 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7305 I1=$abc$159056$n7346 I2=$false I3=$false O=murax.system_cpu.decode_SRC2[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu._zz_97_[31] I1=murax.system_cpu._zz_116_ I2=$abc$159056$n7274 I3=murax.system_cpu._zz_153_[31] O=$abc$159056$n7346 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[15] I1=$abc$159056$n1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[0] O=murax.system_cpu.decode_SRC1[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[16] I1=$abc$159056$n1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[1] O=murax.system_cpu.decode_SRC1[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=$abc$159056$n1 I1=murax.system_cpu._zz_99_[17] I2=$abc$159056$n7350 I3=$false O=murax.system_cpu.decode_SRC1[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11111000 .gate SB_LUT4 I0=murax.system_cpu._zz_152_[2] I1=murax.system_cpu._zz_112_ I2=$abc$159056$n5031_1 I3=$false O=$abc$159056$n7350 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11100000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[18] I1=$abc$159056$n1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[3] O=murax.system_cpu.decode_SRC1[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[19] I1=$abc$159056$n1 I2=$abc$159056$n5030_1 I3=murax.system_cpu._zz_152_[4] O=murax.system_cpu.decode_SRC1[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=$abc$159056$n7356 I1=$abc$159056$n5068 I2=io_F15 I3=$false O=$abc$159056$n7355 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[3] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[0] O=$abc$159056$n7356 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111111111110 .gate SB_LUT4 I0=$abc$159056$n7359 I1=$abc$159056$n7376 I2=$abc$159056$n7363 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11101111 .gate SB_LUT4 I0=$abc$159056$n7362 I1=$abc$159056$n7360 I2=$abc$159056$n6873 I3=$false O=$abc$159056$n7359 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11010000 .gate SB_LUT4 I0=$abc$159056$n3487_1 I1=$abc$159056$n7361 I2=$abc$159056$n3205_1 I3=$false O=$abc$159056$n7360 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=$abc$159056$n3209 I1=$abc$159056$n4399_1 I2=$false I3=$false O=$abc$159056$n7361 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.system_drygascon128.rounds[0] I1=murax.system_drygascon128.core.dout[0] I2=$abc$159056$n7361 I3=$false O=$abc$159056$n7362 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n7367 I1=$abc$159056$n7364 I2=$abc$159056$n7375 I3=$abc$159056$n7371 O=$abc$159056$n7363 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_timer.timerB_io_limit__driver[0] I1=$abc$159056$n3481_1 I2=$abc$159056$n7365 I3=$false O=$abc$159056$n7364 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_timer.timerA_io_limit__driver[0] I1=$abc$159056$n3484_1 I2=$abc$159056$n7366 I3=$false O=$abc$159056$n7365 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01110000 .gate SB_LUT4 I0=murax.system_timer.timerABridge_ticksEnable[0] I1=$abc$159056$n3637_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[0] O=$abc$159056$n7366 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[0] I1=$abc$159056$n3550_1 I2=$abc$159056$n7368 I3=$abc$159056$n7370 O=$abc$159056$n7367 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=$abc$159056$n7369 I1=murax.system_timer.interruptCtrl_1_.pendings[0] I2=$abc$159056$n3634_1 I3=murax.system_timer.interruptCtrl_1__io_masks__driver[0] O=$abc$159056$n7368 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100000000000 .gate SB_LUT4 I0=$abc$159056$n3488 I1=$abc$159056$n3635 I2=$false I3=$false O=$abc$159056$n7369 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_timer.timerBBridge_ticksEnable[0] I1=$abc$159056$n3632 I2=$abc$159056$n3529_1 I3=murax.system_timer.timerB.counter[0] O=$abc$159056$n7370 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7373 I1=$abc$159056$n7374 I2=$abc$159056$n7372_1 I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[0] O=$abc$159056$n7371 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=murax.apb3Router_1_.selIndex[1] I1=$abc$159056$n3488 I2=murax.apb3Router_1_.selIndex[0] I3=$false O=$abc$159056$n7372_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[0] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[0] O=$abc$159056$n7373 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.apb3Router_1_.selIndex[1] I1=murax.apb3Router_1_.selIndex[0] I2=$false I3=$false O=$abc$159056$n7374 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0001 .gate SB_LUT4 I0=murax.apb3Router_1_.selIndex[0] I1=murax.apb3Router_1_.selIndex[1] I2=$false I3=$false O=$abc$159056$n7375 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0100 .gate SB_LUT4 I0=$abc$159056$n7377 I1=murax.system_uartCtrl.bridge_interruptCtrl_writeIntEnable I2=$false I3=$false O=$abc$159056$n7376 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.apb3Router_1_.selIndex[1] I1=$abc$159056$n3211 I2=murax.apb3Router_1_.selIndex[0] I3=$false O=$abc$159056$n7377 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n7374 I1=$abc$159056$n7389 I2=$abc$159056$n7379_1 I3=$abc$159056$n7381 O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001011111111 .gate SB_LUT4 I0=$abc$159056$n7380 I1=$abc$159056$n7360 I2=$abc$159056$n6873 I3=$false O=$abc$159056$n7379_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11010000 .gate SB_LUT4 I0=murax.system_drygascon128.rounds[1] I1=murax.system_drygascon128.core.dout[1] I2=$abc$159056$n7361 I3=$false O=$abc$159056$n7380 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n7385 I1=$abc$159056$n7382 I2=$abc$159056$n7375 I3=$abc$159056$n7388 O=$abc$159056$n7381 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_timer.timerA_io_limit__driver[1] I1=$abc$159056$n3484_1 I2=$abc$159056$n7383 I3=$abc$159056$n7384 O=$abc$159056$n7382 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=$abc$159056$n3481_1 I1=murax.system_timer.timerB_io_limit__driver[1] I2=$false I3=$false O=$abc$159056$n7383 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3637_1 I1=murax.system_timer.timerABridge_ticksEnable[1] I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[1] O=$abc$159056$n7384 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[1] I1=$abc$159056$n3529_1 I2=$abc$159056$n7386_1 I3=$abc$159056$n7387 O=$abc$159056$n7385 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=$abc$159056$n7369 I1=murax.system_timer.interruptCtrl_1_.pendings[1] I2=$abc$159056$n3634_1 I3=murax.system_timer.interruptCtrl_1__io_masks__driver[1] O=$abc$159056$n7386_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100000000000 .gate SB_LUT4 I0=murax.system_timer.timerBBridge_ticksEnable[1] I1=$abc$159056$n3632 I2=$abc$159056$n3550_1 I3=murax.system_timer.timerA.counter[1] O=$abc$159056$n7387 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_interruptCtrl_readIntEnable I1=$abc$159056$n7377 I2=$abc$159056$n7372_1 I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[1] O=$abc$159056$n7388 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[1] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[1] O=$abc$159056$n7389 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7398 I1=$abc$159056$n7374 I2=$abc$159056$n7391 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=$abc$159056$n7360 I1=$abc$159056$n7397 I2=$abc$159056$n6873 I3=$abc$159056$n7392 O=$abc$159056$n7391 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111100000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[2] I1=$abc$159056$n7372_1 I2=$abc$159056$n7393 I3=$false O=$abc$159056$n7392 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=$abc$159056$n7395 I1=$abc$159056$n7396 I2=$abc$159056$n7394_1 I3=$abc$159056$n7375 O=$abc$159056$n7393 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111100000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[2] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[2] O=$abc$159056$n7394_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3529_1 I1=murax.system_timer.timerB.counter[2] I2=$false I3=$false O=$abc$159056$n7395 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[2] I1=$abc$159056$n3550_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[2] O=$abc$159056$n7396 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.rounds[2] I1=murax.system_drygascon128.core.dout[2] I2=$abc$159056$n7361 I3=$false O=$abc$159056$n7397 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[2] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[2] O=$abc$159056$n7398 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7407 I1=$abc$159056$n7374 I2=$abc$159056$n7400 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=$abc$159056$n7360 I1=$abc$159056$n7406 I2=$abc$159056$n6873 I3=$abc$159056$n7401 O=$abc$159056$n7400 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111100000000 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[3] I1=$abc$159056$n7372_1 I2=$abc$159056$n7402_1 I3=$false O=$abc$159056$n7401 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00000111 .gate SB_LUT4 I0=$abc$159056$n7404 I1=$abc$159056$n7405 I2=$abc$159056$n7403 I3=$abc$159056$n7375 O=$abc$159056$n7402_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111100000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[3] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[3] O=$abc$159056$n7403 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3550_1 I1=murax.system_timer.timerA.counter[3] I2=$false I3=$false O=$abc$159056$n7404 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[3] I1=$abc$159056$n3529_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[3] O=$abc$159056$n7405 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.rounds[3] I1=murax.system_drygascon128.core.dout[3] I2=$abc$159056$n7361 I3=$false O=$abc$159056$n7406 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[3] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[3] O=$abc$159056$n7407 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7416 I1=murax.system_drygascon128.core.dout[4] I2=$abc$159056$n7409 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7375 I1=$abc$159056$n7413 I2=$abc$159056$n7410_1 I3=$false O=$abc$159056$n7409 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11010000 .gate SB_LUT4 I0=murax.system_drygascon128.ds[0] I1=$abc$159056$n6196 I2=$abc$159056$n6873 I3=$abc$159056$n7411 O=$abc$159056$n7410_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111111100000000 .gate SB_LUT4 I0=$abc$159056$n7412 I1=$abc$159056$n7374 I2=$abc$159056$n7372_1 I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[4] O=$abc$159056$n7411 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[4] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[4] O=$abc$159056$n7412 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer._zz_1_[4] I1=$abc$159056$n3487_1 I2=$abc$159056$n7414 I3=$abc$159056$n7415 O=$abc$159056$n7413 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[4] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[4] O=$abc$159056$n7414 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3550_1 I1=murax.system_timer.timerA.counter[4] I2=$abc$159056$n3529_1 I3=murax.system_timer.timerB.counter[4] O=$abc$159056$n7415 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7361 I1=$abc$159056$n3205_1 I2=$abc$159056$n6873 I3=$false O=$abc$159056$n7416 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n7372_1 I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[5] I2=$abc$159056$n7418_1 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7360 I1=$abc$159056$n7425 I2=$abc$159056$n6873 I3=$abc$159056$n7419 O=$abc$159056$n7418_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111100000000 .gate SB_LUT4 I0=$abc$159056$n7374 I1=$abc$159056$n7424 I2=$abc$159056$n7420 I3=$false O=$abc$159056$n7419 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001101 .gate SB_LUT4 I0=$abc$159056$n7423 I1=$abc$159056$n7422 I2=$abc$159056$n7421 I3=$abc$159056$n7375 O=$abc$159056$n7420 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111100000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[5] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[5] O=$abc$159056$n7421 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3550_1 I1=murax.system_timer.timerA.counter[5] I2=$abc$159056$n3529_1 I3=murax.system_timer.timerB.counter[5] O=$abc$159056$n7422 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3487_1 I1=murax.system_timer._zz_1_[5] I2=$false I3=$false O=$abc$159056$n7423 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[5] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[5] O=$abc$159056$n7424 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.ds[1] I1=murax.system_drygascon128.core.dout[5] I2=$abc$159056$n7361 I3=$false O=$abc$159056$n7425 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n7372_1 I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[6] I2=$abc$159056$n7427 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7360 I1=$abc$159056$n7434_1 I2=$abc$159056$n6873 I3=$abc$159056$n7428 O=$abc$159056$n7427 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111100000000 .gate SB_LUT4 I0=$abc$159056$n7374 I1=$abc$159056$n7433 I2=$abc$159056$n7429 I3=$false O=$abc$159056$n7428 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001101 .gate SB_LUT4 I0=$abc$159056$n7432 I1=$abc$159056$n7431 I2=$abc$159056$n7430 I3=$abc$159056$n7375 O=$abc$159056$n7429 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111100000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[6] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[6] O=$abc$159056$n7430 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3550_1 I1=murax.system_timer.timerA.counter[6] I2=$abc$159056$n3529_1 I3=murax.system_timer.timerB.counter[6] O=$abc$159056$n7431 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3487_1 I1=murax.system_timer._zz_1_[6] I2=$false I3=$false O=$abc$159056$n7432 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[6] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[6] O=$abc$159056$n7433 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.ds[2] I1=murax.system_drygascon128.core.dout[6] I2=$abc$159056$n7361 I3=$false O=$abc$159056$n7434_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n7372_1 I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[7] I2=$abc$159056$n7436 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7360 I1=$abc$159056$n7443 I2=$abc$159056$n6873 I3=$abc$159056$n7437 O=$abc$159056$n7436 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0100111100000000 .gate SB_LUT4 I0=$abc$159056$n7374 I1=$abc$159056$n7442_1 I2=$abc$159056$n7438 I3=$false O=$abc$159056$n7437 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001101 .gate SB_LUT4 I0=$abc$159056$n7441 I1=$abc$159056$n7440 I2=$abc$159056$n7439 I3=$abc$159056$n7375 O=$abc$159056$n7438 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011111100000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[7] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[7] O=$abc$159056$n7439 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3550_1 I1=murax.system_timer.timerA.counter[7] I2=$abc$159056$n3529_1 I3=murax.system_timer.timerB.counter[7] O=$abc$159056$n7440 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3487_1 I1=murax.system_timer._zz_1_[7] I2=$false I3=$false O=$abc$159056$n7441 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[7] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[7] O=$abc$159056$n7442_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_drygascon128.ds[3] I1=murax.system_drygascon128.core.dout[7] I2=$abc$159056$n7361 I3=$false O=$abc$159056$n7443 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01010011 .gate SB_LUT4 I0=$abc$159056$n7416 I1=murax.system_drygascon128.core.dout[8] I2=$abc$159056$n7445 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7374 I1=$abc$159056$n7451 I2=$abc$159056$n7450_1 I3=$abc$159056$n7446 O=$abc$159056$n7445 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110100000000 .gate SB_LUT4 I0=$abc$159056$n7376 I1=$abc$159056$n3680 I2=$abc$159056$n7447 I3=$abc$159056$n7375 O=$abc$159056$n7446 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000001110111 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[8] I1=$abc$159056$n3529_1 I2=$abc$159056$n7448 I3=$abc$159056$n7449 O=$abc$159056$n7447 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[8] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[8] O=$abc$159056$n7448 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[8] I1=$abc$159056$n3550_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[8] O=$abc$159056$n7449 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3205_1 I1=$abc$159056$n3487_1 I2=$abc$159056$n6873 I3=murax.system_drygascon128.start O=$abc$159056$n7450_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[8] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[8] O=$abc$159056$n7451 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7453 I1=$abc$159056$n7459 I2=$abc$159056$n7454 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11101111 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[9] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7453 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7458_1 I1=$abc$159056$n7374 I2=$abc$159056$n7455 I3=$abc$159056$n7375 O=$abc$159056$n7454 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000010111011 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[9] I1=$abc$159056$n3529_1 I2=$abc$159056$n7456 I3=$abc$159056$n7457 O=$abc$159056$n7455 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[9] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[9] O=$abc$159056$n7456 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[9] I1=$abc$159056$n3550_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[9] O=$abc$159056$n7457 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[9] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[9] O=$abc$159056$n7458_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n6198 I1=$abc$159056$n7377 I2=murax.system_uartCtrl.bridge_interruptCtrl_readIntEnable I3=$false O=$abc$159056$n7459 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=$abc$159056$n7461 I1=$abc$159056$n7462 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[10] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7461 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7466 I1=$abc$159056$n7374 I2=$abc$159056$n7463 I3=$abc$159056$n7375 O=$abc$159056$n7462 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000010111011 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[10] I1=$abc$159056$n3550_1 I2=$abc$159056$n7464 I3=$abc$159056$n7465 O=$abc$159056$n7463 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[10] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[10] O=$abc$159056$n7464 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[10] I1=$abc$159056$n3529_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[10] O=$abc$159056$n7465 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[10] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[10] O=$abc$159056$n7466 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7468 I1=$abc$159056$n7469 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[11] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7468 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7473 I1=$abc$159056$n7374 I2=$abc$159056$n7470 I3=$abc$159056$n7375 O=$abc$159056$n7469 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000010111011 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[11] I1=$abc$159056$n3529_1 I2=$abc$159056$n7471 I3=$abc$159056$n7472 O=$abc$159056$n7470 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[11] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[11] O=$abc$159056$n7471 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[11] I1=$abc$159056$n3550_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[11] O=$abc$159056$n7472 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[11] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[11] O=$abc$159056$n7473 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7475 I1=$abc$159056$n7476 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[12] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7475 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7480_1 I1=$abc$159056$n7374 I2=$abc$159056$n7477 I3=$abc$159056$n7375 O=$abc$159056$n7476 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000010111011 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[12] I1=$abc$159056$n3550_1 I2=$abc$159056$n7478 I3=$abc$159056$n7479 O=$abc$159056$n7477 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[12] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[12] O=$abc$159056$n7478 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[12] I1=$abc$159056$n3529_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[12] O=$abc$159056$n7479 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[12] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[12] O=$abc$159056$n7480_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7482 I1=$abc$159056$n7483 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[13] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7482 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7487 I1=$abc$159056$n7374 I2=$abc$159056$n7484 I3=$abc$159056$n7375 O=$abc$159056$n7483 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000010111011 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[13] I1=$abc$159056$n3529_1 I2=$abc$159056$n7485 I3=$abc$159056$n7486 O=$abc$159056$n7484 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[13] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[13] O=$abc$159056$n7485 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[13] I1=$abc$159056$n3550_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[13] O=$abc$159056$n7486 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[13] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[13] O=$abc$159056$n7487 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7416 I1=murax.system_drygascon128.core.dout[14] I2=$abc$159056$n7489 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7493 I1=$abc$159056$n7374 I2=$abc$159056$n7490 I3=$abc$159056$n7375 O=$abc$159056$n7489 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000010111011 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[14] I1=$abc$159056$n3550_1 I2=$abc$159056$n7491 I3=$abc$159056$n7492 O=$abc$159056$n7490 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[14] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[14] O=$abc$159056$n7491 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[14] I1=$abc$159056$n3529_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[14] O=$abc$159056$n7492 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[14] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[14] O=$abc$159056$n7493 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7495 I1=$abc$159056$n7496_1 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[15] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7495 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7500_1 I1=$abc$159056$n7374 I2=$abc$159056$n7497 I3=$abc$159056$n7375 O=$abc$159056$n7496_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1011000010111011 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[15] I1=$abc$159056$n3529_1 I2=$abc$159056$n7498 I3=$abc$159056$n7499 O=$abc$159056$n7497 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111000000000000 .gate SB_LUT4 I0=$abc$159056$n3484_1 I1=murax.system_timer.timerA_io_limit__driver[15] I2=$abc$159056$n3481_1 I3=murax.system_timer.timerB_io_limit__driver[15] O=$abc$159056$n7498 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[15] I1=$abc$159056$n3550_1 I2=$abc$159056$n3487_1 I3=murax.system_timer._zz_1_[15] O=$abc$159056$n7499 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[15] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[15] O=$abc$159056$n7500_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7506 I1=$abc$159056$n7375 I2=$abc$159056$n7502 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=$abc$159056$n7372_1 I1=$abc$159056$n6198 I2=$abc$159056$n7503 I3=$abc$159056$n7504 O=$abc$159056$n7502 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000110100000000 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[16] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7503 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7505 I1=$abc$159056$n7374 I2=$abc$159056$n7377 I3=murax.system_uartCtrl._zz_8_[0] O=$abc$159056$n7504 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[16] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[16] O=$abc$159056$n7505 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n3637_1 I1=murax.system_timer.timerABridge_clearsEnable I2=$abc$159056$n3632 I3=murax.system_timer.timerBBridge_clearsEnable O=$abc$159056$n7506 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7508_1 I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[1] I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[0] I3=$abc$159056$n7377 O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111110101010101 .gate SB_LUT4 I0=$abc$159056$n7509 I1=$abc$159056$n7374 I2=$abc$159056$n7416 I3=murax.system_drygascon128.core.dout[17] O=$abc$159056$n7508_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[17] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[17] O=$abc$159056$n7509 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7511 I1=$abc$159056$n7512 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[18] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7511 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7513 I1=$abc$159056$n7374 I2=$abc$159056$n7377 I3=murax.system_uartCtrl._zz_8_[2] O=$abc$159056$n7512 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[18] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[18] O=$abc$159056$n7513 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7515 I1=$abc$159056$n7516_1 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[19] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7515 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7517 I1=$abc$159056$n7374 I2=$abc$159056$n7377 I3=murax.system_uartCtrl._zz_8_[3] O=$abc$159056$n7516_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[19] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[19] O=$abc$159056$n7517 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7416 I1=murax.system_drygascon128.core.dout[20] I2=$abc$159056$n7519_1 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7520 I1=$abc$159056$n7374 I2=$abc$159056$n7377 I3=murax.system_uartCtrl._zz_8_[4] O=$abc$159056$n7519_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[20] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[20] O=$abc$159056$n7520 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7523 I1=$abc$159056$n7522_1 I2=murax.apb3Router_1_.selIndex[1] I3=murax.apb3Router_1_.selIndex[0] O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011000000000101 .gate SB_LUT4 I0=murax.system_drygascon128.core.dout[21] I1=$abc$159056$n7361 I2=$abc$159056$n7360 I3=$false O=$abc$159056$n7522_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001101 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[21] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[21] O=$abc$159056$n7523 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7525_1 I1=$abc$159056$n7374 I2=$abc$159056$n7416 I3=murax.system_drygascon128.core.dout[22] O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010001000100 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[22] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[22] O=$abc$159056$n7525_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7528_1 I1=$abc$159056$n7527 I2=murax.apb3Router_1_.selIndex[1] I3=murax.apb3Router_1_.selIndex[0] O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011000000000101 .gate SB_LUT4 I0=murax.system_drygascon128.core.dout[23] I1=$abc$159056$n7361 I2=$abc$159056$n7360 I3=$false O=$abc$159056$n7527 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001101 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[23] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[23] O=$abc$159056$n7528_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7416 I1=murax.system_drygascon128.core.dout[24] I2=$abc$159056$n7530 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7531_1 I1=$abc$159056$n7374 I2=$abc$159056$n7377 I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[0] O=$abc$159056$n7530 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[24] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[24] O=$abc$159056$n7531_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7533 I1=$abc$159056$n7534_1 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[25] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7533 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7535 I1=$abc$159056$n7374 I2=$abc$159056$n7377 I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[1] O=$abc$159056$n7534_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[25] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[25] O=$abc$159056$n7535 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7537_1 I1=$abc$159056$n7538 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[26] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7537_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7539 I1=$abc$159056$n7374 I2=$abc$159056$n7377 I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[2] O=$abc$159056$n7538 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[26] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[26] O=$abc$159056$n7539 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7541 I1=$abc$159056$n7542 I2=$false I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n7361 I1=murax.system_drygascon128.core.dout[27] I2=$abc$159056$n7360 I3=$abc$159056$n6873 O=$abc$159056$n7541 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010000000000 .gate SB_LUT4 I0=$abc$159056$n7543_1 I1=$abc$159056$n7374 I2=$abc$159056$n7377 I3=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[3] O=$abc$159056$n7542 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[27] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[27] O=$abc$159056$n7543_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7416 I1=murax.system_drygascon128.core.dout[28] I2=$abc$159056$n7545 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7546_1 I1=$abc$159056$n7374 I2=$abc$159056$n6221_1 I3=$abc$159056$n7377 O=$abc$159056$n7545 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000101110111011 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[28] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[28] O=$abc$159056$n7546_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7548 I1=$abc$159056$n7374 I2=$abc$159056$n7416 I3=murax.system_drygascon128.core.dout[29] O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010001000100 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[29] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[29] O=$abc$159056$n7548 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7550 I1=$abc$159056$n7374 I2=$abc$159056$n7416 I3=murax.system_drygascon128.core.dout[30] O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111010001000100 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[30] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[30] O=$abc$159056$n7550 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=$abc$159056$n7416 I1=murax.system_drygascon128.core.dout[31] I2=$abc$159056$n7552_1 I3=$false O=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10001111 .gate SB_LUT4 I0=$abc$159056$n7374 I1=$abc$159056$n7554 I2=$abc$159056$n7553 I3=$false O=$abc$159056$n7552_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 00001101 .gate SB_LUT4 I0=$abc$159056$n6196 I1=$abc$159056$n6873 I2=murax.system_drygascon128.core.idle I3=$false O=$abc$159056$n7553 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=$abc$159056$n3530 I1=murax.system_gpioACtrl.io_gpio_writeEnable__driver[31] I2=$abc$159056$n3211 I3=murax.system_gpioACtrl.io_gpio_write__driver[31] O=$abc$159056$n7554 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011101110111 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[20] I1=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] I3=$false O=murax.system_cpu._zz_148_[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[8] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[21] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] I3=$false O=murax.system_cpu._zz_148_[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[9] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[22] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] I3=$false O=murax.system_cpu._zz_148_[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[10] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[23] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] I3=$false O=murax.system_cpu._zz_148_[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[11] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[24] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] I3=$false O=murax.system_cpu._zz_148_[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[7] I2=$abc$159056$n7561_1 I3=$false O=murax.system_cpu._zz_148_[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01001111 .gate SB_LUT4 I0=murax.system_cpu._zz_142_ I1=murax.system_cpu.decode_to_execute_INSTRUCTION[20] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=$abc$159056$n7561_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101001111111111 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[12] I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu._zz_148_[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101011001100 .gate SB_LUT4 I0=murax.system_cpu._zz_165_ I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu._zz_148_[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[14] I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu._zz_148_[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[15] I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu._zz_148_[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[16] I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu._zz_148_[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[17] I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu._zz_148_[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[18] I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu._zz_148_[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101011001100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[19] I1=murax.system_cpu._zz_142_ I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I3=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] O=murax.system_cpu._zz_148_[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100101011001100 .gate SB_LUT4 I0=$abc$159056$n7574 I1=$abc$159056$n7579_1 I2=$abc$159056$n7584 I3=$abc$159056$n7589 O=$abc$159056$n7573_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=$abc$159056$n7575 I1=$abc$159056$n7576_1 I2=$abc$159056$n7577 I3=$abc$159056$n7578 O=$abc$159056$n7574 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[19] I1=murax.system_cpu.decode_to_execute_SRC2[19] I2=murax.system_cpu.decode_to_execute_SRC1[20] I3=murax.system_cpu.decode_to_execute_SRC2[20] O=$abc$159056$n7575 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[21] I1=murax.system_cpu.decode_to_execute_SRC2[21] I2=murax.system_cpu.decode_to_execute_SRC1[22] I3=murax.system_cpu.decode_to_execute_SRC2[22] O=$abc$159056$n7576_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[15] I1=murax.system_cpu.decode_to_execute_SRC2[15] I2=murax.system_cpu.decode_to_execute_SRC1[16] I3=murax.system_cpu.decode_to_execute_SRC2[16] O=$abc$159056$n7577 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[17] I1=murax.system_cpu.decode_to_execute_SRC2[17] I2=murax.system_cpu.decode_to_execute_SRC1[18] I3=murax.system_cpu.decode_to_execute_SRC2[18] O=$abc$159056$n7578 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n7580 I1=$abc$159056$n7581 I2=$abc$159056$n7582_1 I3=$abc$159056$n7583 O=$abc$159056$n7579_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[27] I1=murax.system_cpu.decode_to_execute_SRC2[27] I2=murax.system_cpu.decode_to_execute_SRC1[28] I3=murax.system_cpu.decode_to_execute_SRC2[28] O=$abc$159056$n7580 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[29] I1=murax.system_cpu.decode_to_execute_SRC2[29] I2=murax.system_cpu.decode_to_execute_SRC1[30] I3=murax.system_cpu.decode_to_execute_SRC2[30] O=$abc$159056$n7581 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[23] I1=murax.system_cpu.decode_to_execute_SRC2[23] I2=murax.system_cpu.decode_to_execute_SRC1[24] I3=murax.system_cpu.decode_to_execute_SRC2[24] O=$abc$159056$n7582_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[25] I1=murax.system_cpu.decode_to_execute_SRC2[25] I2=murax.system_cpu.decode_to_execute_SRC1[26] I3=murax.system_cpu.decode_to_execute_SRC2[26] O=$abc$159056$n7583 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n7585_1 I1=$abc$159056$n7586 I2=$abc$159056$n7587 I3=$abc$159056$n7588_1 O=$abc$159056$n7584 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[3] I1=murax.system_cpu.decode_to_execute_SRC1[3] I2=murax.system_cpu.decode_to_execute_SRC2[4] I3=murax.system_cpu.decode_to_execute_SRC1[4] O=$abc$159056$n7585_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[5] I1=murax.system_cpu.decode_to_execute_SRC2[5] I2=murax.system_cpu.decode_to_execute_SRC1[6] I3=murax.system_cpu.decode_to_execute_SRC2[6] O=$abc$159056$n7586 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[0] I1=murax.system_cpu.decode_to_execute_SRC1[0] I2=murax.system_cpu.decode_to_execute_SRC1[31] I3=murax.system_cpu.decode_to_execute_SRC2[31] O=$abc$159056$n7587 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC2[1] I1=murax.system_cpu.decode_to_execute_SRC1[1] I2=murax.system_cpu.decode_to_execute_SRC2[2] I3=murax.system_cpu.decode_to_execute_SRC1[2] O=$abc$159056$n7588_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n7590 I1=$abc$159056$n7591_1 I2=$abc$159056$n7592 I3=$abc$159056$n7593 O=$abc$159056$n7589 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[11] I1=murax.system_cpu.decode_to_execute_SRC2[11] I2=murax.system_cpu.decode_to_execute_SRC1[12] I3=murax.system_cpu.decode_to_execute_SRC2[12] O=$abc$159056$n7590 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[13] I1=murax.system_cpu.decode_to_execute_SRC2[13] I2=murax.system_cpu.decode_to_execute_SRC1[14] I3=murax.system_cpu.decode_to_execute_SRC2[14] O=$abc$159056$n7591_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[7] I1=murax.system_cpu.decode_to_execute_SRC2[7] I2=murax.system_cpu.decode_to_execute_SRC1[8] I3=murax.system_cpu.decode_to_execute_SRC2[8] O=$abc$159056$n7592 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_SRC1[9] I1=murax.system_cpu.decode_to_execute_SRC2[9] I2=murax.system_cpu.decode_to_execute_SRC1[10] I3=murax.system_cpu.decode_to_execute_SRC2[10] O=$abc$159056$n7593 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[0] I1=murax.system_cpu.decode_to_execute_RS2[8] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_INSTRUCTION[12] O=murax.system_cpu_dBus_cmd_payload_data[8] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110011001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[1] I1=murax.system_cpu.decode_to_execute_RS2[9] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_INSTRUCTION[12] O=murax.system_cpu_dBus_cmd_payload_data[9] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110011001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[2] I1=murax.system_cpu.decode_to_execute_RS2[10] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_INSTRUCTION[12] O=murax.system_cpu_dBus_cmd_payload_data[10] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110011001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[3] I1=murax.system_cpu.decode_to_execute_RS2[11] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_INSTRUCTION[12] O=murax.system_cpu_dBus_cmd_payload_data[11] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110011001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[4] I1=murax.system_cpu.decode_to_execute_RS2[12] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_INSTRUCTION[12] O=murax.system_cpu_dBus_cmd_payload_data[12] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110011001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[5] I1=murax.system_cpu.decode_to_execute_RS2[13] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_INSTRUCTION[12] O=murax.system_cpu_dBus_cmd_payload_data[13] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110011001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[6] I1=murax.system_cpu.decode_to_execute_RS2[14] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_INSTRUCTION[12] O=murax.system_cpu_dBus_cmd_payload_data[14] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110011001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[7] I1=murax.system_cpu.decode_to_execute_RS2[15] I2=murax.system_cpu._zz_165_ I3=murax.system_cpu.decode_to_execute_INSTRUCTION[12] O=murax.system_cpu_dBus_cmd_payload_data[15] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110011001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[0] I1=murax.system_cpu.decode_to_execute_RS2[16] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[16] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[1] I1=murax.system_cpu.decode_to_execute_RS2[17] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[17] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[2] I1=murax.system_cpu.decode_to_execute_RS2[18] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[18] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[3] I1=murax.system_cpu.decode_to_execute_RS2[19] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[19] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[4] I1=murax.system_cpu.decode_to_execute_RS2[20] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[20] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[5] I1=murax.system_cpu.decode_to_execute_RS2[21] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[21] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[6] I1=murax.system_cpu.decode_to_execute_RS2[22] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[22] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[7] I1=murax.system_cpu.decode_to_execute_RS2[23] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[23] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[24] I1=murax.system_cpu_dBus_cmd_payload_data[8] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[24] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[25] I1=murax.system_cpu_dBus_cmd_payload_data[9] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[25] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[26] I1=murax.system_cpu_dBus_cmd_payload_data[10] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[26] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[27] I1=murax.system_cpu_dBus_cmd_payload_data[11] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[27] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[28] I1=murax.system_cpu_dBus_cmd_payload_data[12] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[28] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[29] I1=murax.system_cpu_dBus_cmd_payload_data[13] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[29] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[30] I1=murax.system_cpu_dBus_cmd_payload_data[14] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[30] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_RS2[31] I1=murax.system_cpu_dBus_cmd_payload_data[15] I2=murax.system_cpu._zz_165_ I3=$false O=murax.system_cpu_dBus_cmd_payload_data[31] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=murax.system_cpu.execute_LightShifterPlugin_amplitude[1] I1=murax.system_cpu.execute_LightShifterPlugin_amplitude[0] I2=$false I3=$false O=$abc$159056$n9947 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1001 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[2] I1=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[0] I2=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[1] I3=$abc$159056$n3571_1 O=$abc$159056$n10633 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000111111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.absorb I1=murax.system_drygascon128.core.cnt[0] I2=$false I3=$false O=$abc$159056$n10646 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_pendingCmd[0] I1=$abc$159056$n3571_1 I2=$false I3=$false O=$abc$159056$n10659 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1011 .gate SB_LUT4 I0=$abc$159056$n3571_1 I1=murax.system_cpu.IBusSimplePlugin_pendingCmd[0] I2=$false I3=$false O=$abc$159056$n10660 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.buffers_1 I1=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_hit I2=$false I3=$false O=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_valid .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=$abc$159056$n3533 I1=$abc$159056$n7635 I2=$false I3=$false O=$abc$159056$n10841 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=$abc$159056$n3479 I1=$abc$159056$n7369 I2=murax.system_uartCtrl._zz_6_ I3=murax.system_timer.interruptCtrl_1_.pendings[0] O=$abc$159056$n7635 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111111100000000 .gate SB_LUT4 I0=$abc$159056$n3501 I1=$abc$159056$n7637 I2=$false I3=$false O=$abc$159056$n10843 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1110 .gate SB_LUT4 I0=$abc$159056$n3479 I1=$abc$159056$n7369 I2=murax.system_uartCtrl._zz_7_ I3=murax.system_timer.interruptCtrl_1_.pendings[1] O=$abc$159056$n7637 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111111100000000 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_6_ I2=$false I3=$false O=$abc$159056$n10878 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_6_ I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ I2=$false I3=$false O=$abc$159056$n10888 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0110 .gate SB_LUT4 I0=murax.resetCtrl_systemReset I1=$abc$159056$n3694_1 I2=murax.system_drygascon128.core.state[1] I3=$false O=$abc$159056$n12433 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.absorb I1=$abc$159056$n4398 I2=murax.system_drygascon128.core.state[0] I3=$false O=$abc$159056$n12469 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11100000 .gate SB_LUT4 I0=$abc$159056$n5030_1 I1=murax.system_cpu._zz_152_[5] I2=$false I3=$false O=$abc$159056$n12588 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n5030_1 I1=murax.system_cpu._zz_152_[6] I2=$false I3=$false O=$abc$159056$n12590 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n5030_1 I1=murax.system_cpu._zz_152_[7] I2=$false I3=$false O=$abc$159056$n12592 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n5030_1 I1=murax.system_cpu._zz_152_[8] I2=$false I3=$false O=$abc$159056$n12594 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n5030_1 I1=murax.system_cpu._zz_152_[9] I2=$false I3=$false O=$abc$159056$n12596 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n5030_1 I1=murax.system_cpu._zz_152_[10] I2=$false I3=$false O=$abc$159056$n12598 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=$abc$159056$n5030_1 I1=murax.system_cpu._zz_152_[11] I2=$false I3=$false O=$abc$159056$n12600 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I1=$false I2=$false I3=$false O=$abc$159056$n5 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=$abc$159056$n5576 I1=$false I2=$false I3=$false O=$abc$159056$n251 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[0] I1=$false I2=$false I3=$false O=$abc$159056$n309 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=$abc$159056$n88 I1=$false I2=$false I3=$false O=$abc$159056$n403 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_pendingCmd[1] I1=$false I2=$false I3=$false O=$abc$159056$n733 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_pendingCmd[2] I1=$false I2=$false I3=$false O=$abc$159056$n735 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=$false I2=$false I3=$false O=$abc$159056$n958 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[2] I1=$false I2=$false I3=$false O=$abc$159056$n959 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[1] I1=$false I2=$false I3=$false O=$abc$159056$n961 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_target I1=$false I2=$false I3=$false O=$abc$159056$n4329 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=$abc$159056$n5576 I1=$abc$159056$n6277_1 I2=$abc$159056$n3574_1 I3=murax.system_cpu_dBus_cmd_halfPipe_regs_valid O=$abc$159056$n4937 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000001110111 .gate SB_LUT4 I0=$abc$159056$n221 I1=$false I2=$false I3=$false O=$abc$159056$n5049 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=$abc$159056$n10628 I1=$false I2=$false I3=$false O=murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_valid .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.systemDebugger_1_.dispatcher_dataShifter[56] I1=$false I2=$false I3=$false O=$abc$159056$n5766 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=$abc$159056$n3567 I1=$abc$159056$n6875 I2=$abc$159056$n6870 I3=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid O=$abc$159056$n6137 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111000010111011 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[1] I1=$false I2=$false I3=$false O=$abc$159056$n8761 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.resetCtrl_systemClkResetCounter[1] I1=$false I2=$false I3=$false O=$abc$159056$n9955 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[1] I1=$false I2=$false I3=$false O=$abc$159056$n9957 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[1] I1=$false I2=$false I3=$false O=$abc$159056$n9959 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[3] I1=$false I2=$false I3=$false O=$abc$159056$n10632 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[0] I1=$false I2=$false I3=$false O=$abc$159056$n10635 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[1] I1=$false I2=$false I3=$false O=$abc$159056$n10637 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[2] I1=$false I2=$false I3=$false O=$abc$159056$n10639 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[0] I1=$false I2=$false I3=$false O=$abc$159056$n10640 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[2] I1=$false I2=$false I3=$false O=$abc$159056$n10642 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[3] I1=$false I2=$false I3=$false O=$abc$159056$n10644 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[1] I1=$false I2=$false I3=$false O=$abc$159056$n10649 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[2] I1=$false I2=$false I3=$false O=$abc$159056$n10651 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[0] I1=$false I2=$false I3=$false O=$abc$159056$n10653 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[3] I1=$false I2=$false I3=$false O=$abc$159056$n10655 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid I1=$false I2=$false I3=$false O=$abc$159056$n10666 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready I1=$abc$159056$n6191 I2=$false I3=$false O=$abc$159056$n5569 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 1000 .gate SB_LUT4 I0=murax.system_cpu_dBus_cmd_halfPipe_regs_valid I1=$false I2=$false I3=$false O=$abc$159056$n10663 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:40" .param LUT_INIT 01 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[36] I1=murax.system_drygascon128.core.x[100] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n7685_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[4] I1=murax.system_drygascon128.core.x[68] I2=murax.system_drygascon128.core.d[4] I3=$abc$159056$n7685_1 O=$abc$159056$n7686 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110000001010 .gate SB_LUT4 I0=murax.system_drygascon128.core.absorb I1=$abc$159056$n7686 I2=$abc$159056$n3251 I3=$false O=$abc$159056$n7687 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000111 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[33] I1=murax.system_drygascon128.core.x[97] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n7688_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[65] I1=murax.system_drygascon128.core.x[1] I2=murax.system_drygascon128.core.d[4] I3=$abc$159056$n7688_1 O=$abc$159056$n7689 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=$abc$159056$n7689 I1=murax.system_drygascon128.core.cnt[1] I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[129] O=$abc$159056$n7690 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[20] I1=murax.system_cpu._zz_138_[0] I2=murax.system_cpu._zz_99_[21] I3=murax.system_cpu._zz_138_[1] O=$abc$159056$n7691_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[22] I1=murax.system_cpu._zz_138_[2] I2=murax.system_cpu._zz_99_[23] I3=murax.system_cpu._zz_138_[3] O=$abc$159056$n7692 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n7691_1 I1=$abc$159056$n7692 I2=$abc$159056$n3435 I3=$false O=$abc$159056$n7693 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01111111 .gate SB_LUT4 I0=$abc$159056$n3419 I1=$abc$159056$n3424 I2=$abc$159056$n3428 I3=$abc$159056$n7693 O=$abc$159056$n7694_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[15] I1=murax.system_cpu._zz_138_[0] I2=murax.system_cpu._zz_99_[16] I3=murax.system_cpu._zz_138_[1] O=$abc$159056$n7695 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[17] I1=murax.system_cpu._zz_138_[2] I2=murax.system_cpu._zz_99_[18] I3=murax.system_cpu._zz_138_[3] O=$abc$159056$n7696 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n7695 I1=$abc$159056$n7696 I2=$abc$159056$n3443 I3=$false O=$abc$159056$n7697_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01111111 .gate SB_LUT4 I0=$abc$159056$n3446 I1=$abc$159056$n3450 I2=$abc$159056$n3454_1 I3=$abc$159056$n7697_1 O=$abc$159056$n7698 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000100000000 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[11] I1=murax.system_timer._zz_1_[11] I2=murax.system_timer.prescaler_1_.counter[15] I3=murax.system_timer._zz_1_[15] O=$abc$159056$n7699 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[1] I1=murax.system_timer._zz_1_[1] I2=$abc$159056$n7699 I3=$abc$159056$n3513 O=$abc$159056$n7700_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_timer.prescaler_1_.counter[2] I1=murax.system_timer._zz_1_[2] I2=murax.system_timer.prescaler_1_.counter[5] I3=murax.system_timer._zz_1_[5] O=$abc$159056$n7701 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n7700_1 I1=$abc$159056$n7701 I2=$abc$159056$n3504 I3=$false O=$abc$159056$n7702 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10000000 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[11] I1=murax.system_timer.timerB_io_limit__driver[11] I2=murax.system_timer.timerB.counter[15] I3=murax.system_timer.timerB_io_limit__driver[15] O=$abc$159056$n7703_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[1] I1=murax.system_timer.timerB_io_limit__driver[1] I2=$abc$159056$n7703_1 I3=$abc$159056$n3526_1 O=$abc$159056$n7704 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_timer.timerB.counter[2] I1=murax.system_timer.timerB_io_limit__driver[2] I2=murax.system_timer.timerB.counter[5] I3=murax.system_timer.timerB_io_limit__driver[5] O=$abc$159056$n7705 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n7704 I1=$abc$159056$n7705 I2=$abc$159056$n3517_1 I3=$false O=murax.system_timer.timerB._zz_1_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01111111 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[1] I1=murax.system_timer.timerA_io_limit__driver[1] I2=$abc$159056$n3542 I3=$abc$159056$n3545 O=$abc$159056$n7707 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000000000 .gate SB_LUT4 I0=murax.system_timer.timerA.counter[2] I1=murax.system_timer.timerA_io_limit__driver[2] I2=murax.system_timer.timerA.counter[5] I3=murax.system_timer.timerA_io_limit__driver[5] O=$abc$159056$n7708 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1001000000001001 .gate SB_LUT4 I0=$abc$159056$n7708 I1=$abc$159056$n3538_1 I2=$abc$159056$n3541_1 I3=$abc$159056$n3548 O=$abc$159056$n7709_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000000000000000 .gate SB_LUT4 I0=$abc$159056$n7707 I1=$abc$159056$n7709_1 I2=$false I3=$false O=murax.system_timer.timerA._zz_1_ .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:44" .param LUT_INIT 0111 .gate SB_LUT4 I0=murax.system_drygascon128.core.absorb I1=murax.system_drygascon128.core.state[0] I2=murax.system_drygascon128.start I3=$false O=$abc$159056$n7711 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[3] I1=murax.system_drygascon128.core.state[2] I2=$abc$159056$n3691_1 I3=$abc$159056$n7711 O=$abc$159056$n7712_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111111100000000 .gate SB_LUT4 I0=$abc$159056$n3694_1 I1=murax.system_drygascon128.core.state[1] I2=$abc$159056$n7712_1 I3=murax.resetCtrl_systemReset O=$abc$159056$n930 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000001001111 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[34] I1=murax.system_drygascon128.core.x[98] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n7714 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[66] I1=murax.system_drygascon128.core.x[2] I2=murax.system_drygascon128.core.d[4] I3=$abc$159056$n7714 O=$abc$159056$n7715_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=$abc$159056$n7715_1 I1=murax.system_drygascon128.core.cnt[2] I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[130] O=$abc$159056$n7716 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[32] I1=murax.system_drygascon128.core.x[96] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n7717 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[64] I1=murax.system_drygascon128.core.x[0] I2=murax.system_drygascon128.core.d[4] I3=$abc$159056$n7717 O=$abc$159056$n7718_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=$abc$159056$n7718_1 I1=murax.system_drygascon128.core.cnt[0] I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[128] O=$abc$159056$n7719 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[39] I1=murax.system_drygascon128.core.x[103] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n7720 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[71] I1=murax.system_drygascon128.core.x[7] I2=murax.system_drygascon128.core.d[4] I3=$abc$159056$n7720 O=$abc$159056$n7721_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=$abc$159056$n7721_1 I1=murax.system_drygascon128.core.cnt[3] I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[135] O=$abc$159056$n7722 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[38] I1=murax.system_drygascon128.core.x[102] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n7723 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[70] I1=murax.system_drygascon128.core.x[6] I2=murax.system_drygascon128.core.d[4] I3=$abc$159056$n7723 O=$abc$159056$n7724_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=$abc$159056$n7724_1 I1=murax.system_drygascon128.core.cnt[2] I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[134] O=$abc$159056$n7725 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[37] I1=murax.system_drygascon128.core.x[101] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n7726 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[69] I1=murax.system_drygascon128.core.x[5] I2=murax.system_drygascon128.core.d[4] I3=$abc$159056$n7726 O=$abc$159056$n7727_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=$abc$159056$n7727_1 I1=murax.system_drygascon128.core.cnt[1] I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[133] O=$abc$159056$n7728 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[117] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[117] I3=murax.system_drygascon128.core.c[149] O=$abc$159056$n7729 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7729 I3=murax.system_drygascon128.core.r[117] O=$abc$159056$n7730_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[127] I2=$abc$159056$n4418_1 I3=$abc$159056$n7730_1 O=$abc$159056$n1389 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[115] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[115] I3=murax.system_drygascon128.core.c[147] O=$abc$159056$n7732 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7732 I3=murax.system_drygascon128.core.r[115] O=$abc$159056$n7733_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[125] I2=$abc$159056$n4424 I3=$abc$159056$n7733_1 O=$abc$159056$n1396 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[113] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[113] I3=murax.system_drygascon128.core.c[145] O=$abc$159056$n7735 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7735 I3=murax.system_drygascon128.core.r[113] O=$abc$159056$n7736_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[123] I2=$abc$159056$n4429 I3=$abc$159056$n7736_1 O=$abc$159056$n1403 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[111] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[111] I3=murax.system_drygascon128.core.c[143] O=$abc$159056$n7738 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7738 I3=murax.system_drygascon128.core.r[111] O=$abc$159056$n7739_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[121] I2=$abc$159056$n4434 I3=$abc$159056$n7739_1 O=$abc$159056$n1410 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[109] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[109] I3=murax.system_drygascon128.core.c[141] O=$abc$159056$n7741 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7741 I3=murax.system_drygascon128.core.r[109] O=$abc$159056$n7742_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[119] I2=$abc$159056$n4440_1 I3=$abc$159056$n7742_1 O=$abc$159056$n1417 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[107] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[107] I3=murax.system_drygascon128.core.c[139] O=$abc$159056$n7744 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7744 I3=murax.system_drygascon128.core.r[107] O=$abc$159056$n7745_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[117] I2=$abc$159056$n4445 I3=$abc$159056$n7745_1 O=$abc$159056$n1424 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[105] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[105] I3=murax.system_drygascon128.core.c[137] O=$abc$159056$n7747 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7747 I3=murax.system_drygascon128.core.r[105] O=$abc$159056$n7748_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[115] I2=$abc$159056$n4450 I3=$abc$159056$n7748_1 O=$abc$159056$n1431 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[99] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[99] I3=murax.system_drygascon128.core.c[131] O=$abc$159056$n7750 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7750 I3=murax.system_drygascon128.core.r[99] O=$abc$159056$n7751_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[109] I2=$abc$159056$n4455_1 I3=$abc$159056$n7751_1 O=$abc$159056$n1438 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[97] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[97] I3=murax.system_drygascon128.core.c[129] O=$abc$159056$n7753 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7753 I3=murax.system_drygascon128.core.r[97] O=$abc$159056$n7754_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[107] I2=$abc$159056$n4460 I3=$abc$159056$n7754_1 O=$abc$159056$n1445 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[95] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[95] I3=murax.system_drygascon128.core.c[255] O=$abc$159056$n7756 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7756 I3=murax.system_drygascon128.core.r[95] O=$abc$159056$n7757_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[105] I2=$abc$159056$n4465_1 I3=$abc$159056$n7757_1 O=$abc$159056$n1452 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[93] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[93] I3=murax.system_drygascon128.core.c[253] O=$abc$159056$n7759 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7759 I3=murax.system_drygascon128.core.r[93] O=$abc$159056$n7760_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[103] I2=$abc$159056$n4471_1 I3=$abc$159056$n7760_1 O=$abc$159056$n1459 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[91] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[91] I3=murax.system_drygascon128.core.c[251] O=$abc$159056$n7762 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7762 I3=murax.system_drygascon128.core.r[91] O=$abc$159056$n7763_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[101] I2=$abc$159056$n4477 I3=$abc$159056$n7763_1 O=$abc$159056$n1466 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[118] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[118] I3=murax.system_drygascon128.core.c[150] O=$abc$159056$n7765 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7765 I3=murax.system_drygascon128.core.r[118] O=$abc$159056$n7766_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3707 I1=murax.system_drygascon128.ds[0] I2=$abc$159056$n4486 I3=$abc$159056$n7766_1 O=$abc$159056$n1476 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[116] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[116] I3=murax.system_drygascon128.core.c[148] O=$abc$159056$n7768 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7768 I3=murax.system_drygascon128.core.r[116] O=$abc$159056$n7769_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[126] I2=$abc$159056$n4491 I3=$abc$159056$n7769_1 O=$abc$159056$n1483 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[114] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[114] I3=murax.system_drygascon128.core.c[146] O=$abc$159056$n7771 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7771 I3=murax.system_drygascon128.core.r[114] O=$abc$159056$n7772_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[124] I2=$abc$159056$n4496_1 I3=$abc$159056$n7772_1 O=$abc$159056$n1490 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[112] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[112] I3=murax.system_drygascon128.core.c[144] O=$abc$159056$n7774 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7774 I3=murax.system_drygascon128.core.r[112] O=$abc$159056$n7775_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[122] I2=$abc$159056$n4501 I3=$abc$159056$n7775_1 O=$abc$159056$n1497 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[110] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[110] I3=murax.system_drygascon128.core.c[142] O=$abc$159056$n7777 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7777 I3=murax.system_drygascon128.core.r[110] O=$abc$159056$n7778_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[120] I2=$abc$159056$n4506_1 I3=$abc$159056$n7778_1 O=$abc$159056$n1504 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[108] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[108] I3=murax.system_drygascon128.core.c[140] O=$abc$159056$n7780 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7780 I3=murax.system_drygascon128.core.r[108] O=$abc$159056$n7781_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[118] I2=$abc$159056$n4511 I3=$abc$159056$n7781_1 O=$abc$159056$n1511 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[104] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[104] I3=murax.system_drygascon128.core.c[136] O=$abc$159056$n7783 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7783 I3=murax.system_drygascon128.core.r[104] O=$abc$159056$n7784_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[114] I2=$abc$159056$n4516 I3=$abc$159056$n7784_1 O=$abc$159056$n1518 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[102] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[102] I3=murax.system_drygascon128.core.c[134] O=$abc$159056$n7786 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7786 I3=murax.system_drygascon128.core.r[102] O=$abc$159056$n7787_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[112] I2=$abc$159056$n4521 I3=$abc$159056$n7787_1 O=$abc$159056$n1525 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[100] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[100] I3=murax.system_drygascon128.core.c[132] O=$abc$159056$n7789 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7789 I3=murax.system_drygascon128.core.r[100] O=$abc$159056$n7790_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[110] I2=$abc$159056$n4526_1 I3=$abc$159056$n7790_1 O=$abc$159056$n1532 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[98] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[98] I3=murax.system_drygascon128.core.c[130] O=$abc$159056$n7792 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7792 I3=murax.system_drygascon128.core.r[98] O=$abc$159056$n7793_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[108] I2=$abc$159056$n4531_1 I3=$abc$159056$n7793_1 O=$abc$159056$n1539 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[96] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[96] I3=murax.system_drygascon128.core.c[128] O=$abc$159056$n7795 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7795 I3=murax.system_drygascon128.core.r[96] O=$abc$159056$n7796_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[106] I2=$abc$159056$n4536_1 I3=$abc$159056$n7796_1 O=$abc$159056$n1546 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[94] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[94] I3=murax.system_drygascon128.core.c[254] O=$abc$159056$n7798 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7798 I3=murax.system_drygascon128.core.r[94] O=$abc$159056$n7799_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[104] I2=$abc$159056$n4542 I3=$abc$159056$n7799_1 O=$abc$159056$n1553 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[92] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[92] I3=murax.system_drygascon128.core.c[252] O=$abc$159056$n7801 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7801 I3=murax.system_drygascon128.core.r[92] O=$abc$159056$n7802_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[102] I2=$abc$159056$n4547 I3=$abc$159056$n7802_1 O=$abc$159056$n1560 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[90] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[90] I3=murax.system_drygascon128.core.c[250] O=$abc$159056$n7804 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7804 I3=murax.system_drygascon128.core.r[90] O=$abc$159056$n7805_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[100] I2=$abc$159056$n4552_1 I3=$abc$159056$n7805_1 O=$abc$159056$n1567 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[89] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[89] I3=murax.system_drygascon128.core.c[249] O=$abc$159056$n7807 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7807 I3=murax.system_drygascon128.core.r[89] O=$abc$159056$n7808_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[99] I2=$abc$159056$n4557 I3=$abc$159056$n7808_1 O=$abc$159056$n1574 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[88] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[88] I3=murax.system_drygascon128.core.c[248] O=$abc$159056$n7810 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7810 I3=murax.system_drygascon128.core.r[88] O=$abc$159056$n7811_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[98] I2=$abc$159056$n4562_1 I3=$abc$159056$n7811_1 O=$abc$159056$n1581 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[86] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[86] I3=murax.system_drygascon128.core.c[246] O=$abc$159056$n7813 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7813 I3=murax.system_drygascon128.core.r[86] O=$abc$159056$n7814_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[96] I2=$abc$159056$n4567_1 I3=$abc$159056$n7814_1 O=$abc$159056$n1588 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[85] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[85] I3=murax.system_drygascon128.core.c[245] O=$abc$159056$n7816 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7816 I3=murax.system_drygascon128.core.r[85] O=$abc$159056$n7817_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[95] I2=$abc$159056$n4572 I3=$abc$159056$n7817_1 O=$abc$159056$n1595 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[83] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[83] I3=murax.system_drygascon128.core.c[243] O=$abc$159056$n7819 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7819 I3=murax.system_drygascon128.core.r[83] O=$abc$159056$n7820_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[93] I2=$abc$159056$n4578 I3=$abc$159056$n7820_1 O=$abc$159056$n1602 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[82] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[82] I3=murax.system_drygascon128.core.c[242] O=$abc$159056$n7822 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7822 I3=murax.system_drygascon128.core.r[82] O=$abc$159056$n7823_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[92] I2=$abc$159056$n4583_1 I3=$abc$159056$n7823_1 O=$abc$159056$n1609 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[81] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[81] I3=murax.system_drygascon128.core.c[241] O=$abc$159056$n7825 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7825 I3=murax.system_drygascon128.core.r[81] O=$abc$159056$n7826_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[91] I2=$abc$159056$n4588_1 I3=$abc$159056$n7826_1 O=$abc$159056$n1616 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[80] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[80] I3=murax.system_drygascon128.core.c[240] O=$abc$159056$n7828 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7828 I3=murax.system_drygascon128.core.r[80] O=$abc$159056$n7829_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[90] I2=$abc$159056$n4593 I3=$abc$159056$n7829_1 O=$abc$159056$n1623 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[79] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[79] I3=murax.system_drygascon128.core.c[239] O=$abc$159056$n7831 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7831 I3=murax.system_drygascon128.core.r[79] O=$abc$159056$n7832_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[89] I2=$abc$159056$n4598_1 I3=$abc$159056$n7832_1 O=$abc$159056$n1630 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[78] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[78] I3=murax.system_drygascon128.core.c[238] O=$abc$159056$n7834 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7834 I3=murax.system_drygascon128.core.r[78] O=$abc$159056$n7835_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[88] I2=$abc$159056$n4603_1 I3=$abc$159056$n7835_1 O=$abc$159056$n1637 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[77] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[77] I3=murax.system_drygascon128.core.c[237] O=$abc$159056$n7837 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7837 I3=murax.system_drygascon128.core.r[77] O=$abc$159056$n7838_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[87] I2=$abc$159056$n4608 I3=$abc$159056$n7838_1 O=$abc$159056$n1644 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[76] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[76] I3=murax.system_drygascon128.core.c[236] O=$abc$159056$n7840 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7840 I3=murax.system_drygascon128.core.r[76] O=$abc$159056$n7841_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[86] I2=$abc$159056$n4613 I3=$abc$159056$n7841_1 O=$abc$159056$n1651 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[75] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[75] I3=murax.system_drygascon128.core.c[235] O=$abc$159056$n7843 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7843 I3=murax.system_drygascon128.core.r[75] O=$abc$159056$n7844_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[85] I2=$abc$159056$n4618 I3=$abc$159056$n7844_1 O=$abc$159056$n1658 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[74] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[74] I3=murax.system_drygascon128.core.c[234] O=$abc$159056$n7846 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7846 I3=murax.system_drygascon128.core.r[74] O=$abc$159056$n7847_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[84] I2=$abc$159056$n4623_1 I3=$abc$159056$n7847_1 O=$abc$159056$n1665 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[73] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[73] I3=murax.system_drygascon128.core.c[233] O=$abc$159056$n7849 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7849 I3=murax.system_drygascon128.core.r[73] O=$abc$159056$n7850_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[83] I2=$abc$159056$n4628_1 I3=$abc$159056$n7850_1 O=$abc$159056$n1672 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[69] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[69] I3=murax.system_drygascon128.core.c[229] O=$abc$159056$n7852 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7852 I3=murax.system_drygascon128.core.r[69] O=$abc$159056$n7853_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[79] I2=$abc$159056$n4643_1 I3=$abc$159056$n7853_1 O=$abc$159056$n1693 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[67] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[67] I3=murax.system_drygascon128.core.c[227] O=$abc$159056$n7855 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7855 I3=murax.system_drygascon128.core.r[67] O=$abc$159056$n7856_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[77] I2=$abc$159056$n4648 I3=$abc$159056$n7856_1 O=$abc$159056$n1700 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[66] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[66] I3=murax.system_drygascon128.core.c[226] O=$abc$159056$n7858 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7858 I3=murax.system_drygascon128.core.r[66] O=$abc$159056$n7859_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[76] I2=$abc$159056$n4654 I3=$abc$159056$n7859_1 O=$abc$159056$n1707 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[65] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[65] I3=murax.system_drygascon128.core.c[225] O=$abc$159056$n7861 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7861 I3=murax.system_drygascon128.core.r[65] O=$abc$159056$n7862_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[75] I2=$abc$159056$n4659_1 I3=$abc$159056$n7862_1 O=$abc$159056$n1714 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[64] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[64] I3=murax.system_drygascon128.core.c[224] O=$abc$159056$n7864 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7864 I3=murax.system_drygascon128.core.r[64] O=$abc$159056$n7865_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[74] I2=$abc$159056$n4664_1 I3=$abc$159056$n7865_1 O=$abc$159056$n1721 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[63] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[63] I3=murax.system_drygascon128.core.c[223] O=$abc$159056$n7867 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7867 I3=murax.system_drygascon128.core.r[63] O=$abc$159056$n7868_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[73] I2=$abc$159056$n4669 I3=$abc$159056$n7868_1 O=$abc$159056$n1728 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[62] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[62] I3=murax.system_drygascon128.core.c[222] O=$abc$159056$n7870 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7870 I3=murax.system_drygascon128.core.r[62] O=$abc$159056$n7871_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[72] I2=$abc$159056$n4675 I3=$abc$159056$n7871_1 O=$abc$159056$n1735 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[61] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[61] I3=murax.system_drygascon128.core.c[221] O=$abc$159056$n7873 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7873 I3=murax.system_drygascon128.core.r[61] O=$abc$159056$n7874_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[71] I2=$abc$159056$n4680_1 I3=$abc$159056$n7874_1 O=$abc$159056$n1742 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[60] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[60] I3=murax.system_drygascon128.core.c[220] O=$abc$159056$n7876 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7876 I3=murax.system_drygascon128.core.r[60] O=$abc$159056$n7877_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[70] I2=$abc$159056$n4685_1 I3=$abc$159056$n7877_1 O=$abc$159056$n1749 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[59] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[59] I3=murax.system_drygascon128.core.c[219] O=$abc$159056$n7879 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7879 I3=murax.system_drygascon128.core.r[59] O=$abc$159056$n7880_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[69] I2=$abc$159056$n4690 I3=$abc$159056$n7880_1 O=$abc$159056$n1756 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[57] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[57] I3=murax.system_drygascon128.core.c[217] O=$abc$159056$n7882 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7882 I3=murax.system_drygascon128.core.r[57] O=$abc$159056$n7883_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[67] I2=$abc$159056$n4700_1 I3=$abc$159056$n7883_1 O=$abc$159056$n1770 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[56] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[56] I3=murax.system_drygascon128.core.c[216] O=$abc$159056$n7885 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7885 I3=murax.system_drygascon128.core.r[56] O=$abc$159056$n7886_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[66] I2=$abc$159056$n4705 I3=$abc$159056$n7886_1 O=$abc$159056$n1777 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[24] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[24] I3=murax.system_drygascon128.core.c[184] O=$abc$159056$n7888 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7888 I3=murax.system_drygascon128.core.r[24] O=$abc$159056$n7889_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[34] I2=$abc$159056$n4710_1 I3=$abc$159056$n7889_1 O=$abc$159056$n1784 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[55] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[55] I3=murax.system_drygascon128.core.c[215] O=$abc$159056$n7891 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7891 I3=murax.system_drygascon128.core.r[55] O=$abc$159056$n7892_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[65] I2=$abc$159056$n4716_1 I3=$abc$159056$n7892_1 O=$abc$159056$n1791 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[23] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[23] I3=murax.system_drygascon128.core.c[183] O=$abc$159056$n7894 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7894 I3=murax.system_drygascon128.core.r[23] O=$abc$159056$n7895_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[33] I2=$abc$159056$n4721_1 I3=$abc$159056$n7895_1 O=$abc$159056$n1798 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[54] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[54] I3=murax.system_drygascon128.core.c[214] O=$abc$159056$n7897 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7897 I3=murax.system_drygascon128.core.r[54] O=$abc$159056$n7898_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[64] I2=$abc$159056$n4726 I3=$abc$159056$n7898_1 O=$abc$159056$n1805 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[22] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[22] I3=murax.system_drygascon128.core.c[182] O=$abc$159056$n7900 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7900 I3=murax.system_drygascon128.core.r[22] O=$abc$159056$n7901_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[32] I2=$abc$159056$n4731_1 I3=$abc$159056$n7901_1 O=$abc$159056$n1812 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[53] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[53] I3=murax.system_drygascon128.core.c[213] O=$abc$159056$n7903 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7903 I3=murax.system_drygascon128.core.r[53] O=$abc$159056$n7904_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[63] I2=$abc$159056$n4736_1 I3=$abc$159056$n7904_1 O=$abc$159056$n1819 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[21] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[21] I3=murax.system_drygascon128.core.c[181] O=$abc$159056$n7906 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7906 I3=murax.system_drygascon128.core.r[21] O=$abc$159056$n7907_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[31] I2=$abc$159056$n4741 I3=$abc$159056$n7907_1 O=$abc$159056$n1826 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[20] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[20] I3=murax.system_drygascon128.core.c[180] O=$abc$159056$n7909 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7909 I3=murax.system_drygascon128.core.r[20] O=$abc$159056$n7910_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[30] I2=$abc$159056$n4746_1 I3=$abc$159056$n7910_1 O=$abc$159056$n1833 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[19] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[19] I3=murax.system_drygascon128.core.c[179] O=$abc$159056$n7912 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7912 I3=murax.system_drygascon128.core.r[19] O=$abc$159056$n7913_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[29] I2=$abc$159056$n4756 I3=$abc$159056$n7913_1 O=$abc$159056$n1847 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[50] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[50] I3=murax.system_drygascon128.core.c[210] O=$abc$159056$n7915 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7915 I3=murax.system_drygascon128.core.r[50] O=$abc$159056$n7916_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[60] I2=$abc$159056$n4761_1 I3=$abc$159056$n7916_1 O=$abc$159056$n1854 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[18] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[18] I3=murax.system_drygascon128.core.c[178] O=$abc$159056$n7918 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7918 I3=murax.system_drygascon128.core.r[18] O=$abc$159056$n7919_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[28] I2=$abc$159056$n4766_1 I3=$abc$159056$n7919_1 O=$abc$159056$n1861 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[49] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[49] I3=murax.system_drygascon128.core.c[209] O=$abc$159056$n7921 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7921 I3=murax.system_drygascon128.core.r[49] O=$abc$159056$n7922_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[59] I2=$abc$159056$n4771 I3=$abc$159056$n7922_1 O=$abc$159056$n1868 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[48] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[48] I3=murax.system_drygascon128.core.c[208] O=$abc$159056$n7924 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7924 I3=murax.system_drygascon128.core.r[48] O=$abc$159056$n7925_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[58] I2=$abc$159056$n4781_1 I3=$abc$159056$n7925_1 O=$abc$159056$n1882 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[16] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[16] I3=murax.system_drygascon128.core.c[176] O=$abc$159056$n7927 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7927 I3=murax.system_drygascon128.core.r[16] O=$abc$159056$n7928_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[26] I2=$abc$159056$n4786 I3=$abc$159056$n7928_1 O=$abc$159056$n1889 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[47] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[47] I3=murax.system_drygascon128.core.c[207] O=$abc$159056$n7930 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7930 I3=murax.system_drygascon128.core.r[47] O=$abc$159056$n7931_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[57] I2=$abc$159056$n4791_1 I3=$abc$159056$n7931_1 O=$abc$159056$n1896 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[15] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[15] I3=murax.system_drygascon128.core.c[175] O=$abc$159056$n7933 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7933 I3=murax.system_drygascon128.core.r[15] O=$abc$159056$n7934_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[25] I2=$abc$159056$n4796_1 I3=$abc$159056$n7934_1 O=$abc$159056$n1903 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[46] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[46] I3=murax.system_drygascon128.core.c[206] O=$abc$159056$n7936 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7936 I3=murax.system_drygascon128.core.r[46] O=$abc$159056$n7937_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[56] I2=$abc$159056$n4801 I3=$abc$159056$n7937_1 O=$abc$159056$n1910 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[14] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[14] I3=murax.system_drygascon128.core.c[174] O=$abc$159056$n7939 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7939 I3=murax.system_drygascon128.core.r[14] O=$abc$159056$n7940_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[24] I2=$abc$159056$n4806_1 I3=$abc$159056$n7940_1 O=$abc$159056$n1917 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[45] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[45] I3=murax.system_drygascon128.core.c[205] O=$abc$159056$n7942 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7942 I3=murax.system_drygascon128.core.r[45] O=$abc$159056$n7943_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[55] I2=$abc$159056$n4811_1 I3=$abc$159056$n7943_1 O=$abc$159056$n1924 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[13] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[13] I3=murax.system_drygascon128.core.c[173] O=$abc$159056$n7945 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7945 I3=murax.system_drygascon128.core.r[13] O=$abc$159056$n7946_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[23] I2=$abc$159056$n4816_1 I3=$abc$159056$n7946_1 O=$abc$159056$n1931 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[44] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[44] I3=murax.system_drygascon128.core.c[204] O=$abc$159056$n7948 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7948 I3=murax.system_drygascon128.core.r[44] O=$abc$159056$n7949_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[54] I2=$abc$159056$n4821_1 I3=$abc$159056$n7949_1 O=$abc$159056$n1938 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[12] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[12] I3=murax.system_drygascon128.core.c[172] O=$abc$159056$n7951 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7951 I3=murax.system_drygascon128.core.r[12] O=$abc$159056$n7952_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[22] I2=$abc$159056$n4826_1 I3=$abc$159056$n7952_1 O=$abc$159056$n1945 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[42] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[42] I3=murax.system_drygascon128.core.c[202] O=$abc$159056$n7954 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7954 I3=murax.system_drygascon128.core.r[42] O=$abc$159056$n7955_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[52] I2=$abc$159056$n4841_1 I3=$abc$159056$n7955_1 O=$abc$159056$n1966 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[10] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[10] I3=murax.system_drygascon128.core.c[170] O=$abc$159056$n7957 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7957 I3=murax.system_drygascon128.core.r[10] O=$abc$159056$n7958_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[20] I2=$abc$159056$n4846_1 I3=$abc$159056$n7958_1 O=$abc$159056$n1973 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[9] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[9] I3=murax.system_drygascon128.core.c[169] O=$abc$159056$n7960 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7960 I3=murax.system_drygascon128.core.r[9] O=$abc$159056$n7961_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[19] I2=$abc$159056$n4857_1 I3=$abc$159056$n7961_1 O=$abc$159056$n1987 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[40] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[40] I3=murax.system_drygascon128.core.c[200] O=$abc$159056$n7963 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7963 I3=murax.system_drygascon128.core.r[40] O=$abc$159056$n7964_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[50] I2=$abc$159056$n4862_1 I3=$abc$159056$n7964_1 O=$abc$159056$n1994 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[8] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[8] I3=murax.system_drygascon128.core.c[168] O=$abc$159056$n7966 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7966 I3=murax.system_drygascon128.core.r[8] O=$abc$159056$n7967_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[18] I2=$abc$159056$n4867_1 I3=$abc$159056$n7967_1 O=$abc$159056$n2001 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[38] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[38] I3=murax.system_drygascon128.core.c[198] O=$abc$159056$n7969 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7969 I3=murax.system_drygascon128.core.r[38] O=$abc$159056$n7970_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[48] I2=$abc$159056$n4872_1 I3=$abc$159056$n7970_1 O=$abc$159056$n2008 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[36] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[36] I3=murax.system_drygascon128.core.c[196] O=$abc$159056$n7972 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7972 I3=murax.system_drygascon128.core.r[36] O=$abc$159056$n7973_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[46] I2=$abc$159056$n4877_1 I3=$abc$159056$n7973_1 O=$abc$159056$n2015 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[6] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[6] I3=murax.system_drygascon128.core.c[166] O=$abc$159056$n7975 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7975 I3=murax.system_drygascon128.core.r[6] O=$abc$159056$n7976_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[16] I2=$abc$159056$n4882_1 I3=$abc$159056$n7976_1 O=$abc$159056$n2022 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[5] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[5] I3=murax.system_drygascon128.core.c[165] O=$abc$159056$n7978 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7978 I3=murax.system_drygascon128.core.r[5] O=$abc$159056$n7979_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[15] I2=$abc$159056$n4887_1 I3=$abc$159056$n7979_1 O=$abc$159056$n2029 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[32] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[32] I3=murax.system_drygascon128.core.c[192] O=$abc$159056$n7981 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7981 I3=murax.system_drygascon128.core.r[32] O=$abc$159056$n7982_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[42] I2=$abc$159056$n4892_1 I3=$abc$159056$n7982_1 O=$abc$159056$n2036 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[4] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[4] I3=murax.system_drygascon128.core.c[164] O=$abc$159056$n7984 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7984 I3=murax.system_drygascon128.core.r[4] O=$abc$159056$n7985_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[14] I2=$abc$159056$n4897_1 I3=$abc$159056$n7985_1 O=$abc$159056$n2043 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[3] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[3] I3=murax.system_drygascon128.core.c[163] O=$abc$159056$n7987 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7987 I3=murax.system_drygascon128.core.r[3] O=$abc$159056$n7988_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[13] I2=$abc$159056$n4902_1 I3=$abc$159056$n7988_1 O=$abc$159056$n2050 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[28] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[28] I3=murax.system_drygascon128.core.c[188] O=$abc$159056$n7990 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7990 I3=murax.system_drygascon128.core.r[28] O=$abc$159056$n7991_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[38] I2=$abc$159056$n4907_1 I3=$abc$159056$n7991_1 O=$abc$159056$n2057 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[1] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[1] I3=murax.system_drygascon128.core.c[161] O=$abc$159056$n7993 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7993 I3=murax.system_drygascon128.core.r[1] O=$abc$159056$n7994_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[11] I2=$abc$159056$n4912_1 I3=$abc$159056$n7994_1 O=$abc$159056$n2064 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[39] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[39] I3=murax.system_drygascon128.core.c[199] O=$abc$159056$n7996 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7996 I3=murax.system_drygascon128.core.r[39] O=$abc$159056$n7997_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[49] I2=$abc$159056$n4917_1 I3=$abc$159056$n7997_1 O=$abc$159056$n2071 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[0] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[0] I3=murax.system_drygascon128.core.c[160] O=$abc$159056$n7999 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n7999 I3=murax.system_drygascon128.core.r[0] O=$abc$159056$n8000_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[10] I2=$abc$159056$n4922_1 I3=$abc$159056$n8000_1 O=$abc$159056$n2078 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[37] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[37] I3=murax.system_drygascon128.core.c[197] O=$abc$159056$n8002 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8002 I3=murax.system_drygascon128.core.r[37] O=$abc$159056$n8003_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[47] I2=$abc$159056$n4951_1 I3=$abc$159056$n8003_1 O=$abc$159056$n2096 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[33] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[33] I3=murax.system_drygascon128.core.c[193] O=$abc$159056$n8005 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8005 I3=murax.system_drygascon128.core.r[33] O=$abc$159056$n8006_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[43] I2=$abc$159056$n4963_1 I3=$abc$159056$n8006_1 O=$abc$159056$n2113 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[25] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[25] I3=murax.system_drygascon128.core.c[185] O=$abc$159056$n8008 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8008 I3=murax.system_drygascon128.core.r[25] O=$abc$159056$n8009_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[35] I2=$abc$159056$n4968_1 I3=$abc$159056$n8009_1 O=$abc$159056$n2120 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_cpu._zz_150_[0] I1=$abc$159056$n3594 I2=$abc$159056$n3596 I3=murax.system_cpu._zz_150_[1] O=$abc$159056$n8011 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111111101000000 .gate SB_LUT4 I0=$abc$159056$n3416 I1=murax.system_cpu._zz_150_[0] I2=murax.system_cpu._zz_150_[2] I3=$abc$159056$n8011 O=$abc$159056$n2508 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[35] I1=murax.system_drygascon128.core.x[99] I2=murax.system_drygascon128.core.d[4] I3=murax.system_drygascon128.core.d[5] O=$abc$159056$n8013 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.x[67] I1=murax.system_drygascon128.core.x[3] I2=murax.system_drygascon128.core.d[4] I3=$abc$159056$n8013 O=$abc$159056$n8014 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=$abc$159056$n8014 I1=murax.system_drygascon128.core.cnt[3] I2=murax.system_drygascon128.core.absorb I3=murax.system_drygascon128.core.c[131] O=$abc$159056$n8015_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110010100011 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[103] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[103] I3=murax.system_drygascon128.core.c[135] O=$abc$159056$n8016 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8016 I3=murax.system_drygascon128.core.r[103] O=$abc$159056$n8017 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[113] I2=$abc$159056$n5263_1 I3=$abc$159056$n8017 O=$abc$159056$n3090 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[101] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[101] I3=murax.system_drygascon128.core.c[133] O=$abc$159056$n8019 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8019 I3=murax.system_drygascon128.core.r[101] O=$abc$159056$n8020 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[111] I2=$abc$159056$n5268_1 I3=$abc$159056$n8020 O=$abc$159056$n3097 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[106] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[106] I3=murax.system_drygascon128.core.c[138] O=$abc$159056$n8022 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8022 I3=murax.system_drygascon128.core.r[106] O=$abc$159056$n8023 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[116] I2=$abc$159056$n5273 I3=$abc$159056$n8023 O=$abc$159056$n3104 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[87] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[87] I3=murax.system_drygascon128.core.c[247] O=$abc$159056$n8025 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8025 I3=murax.system_drygascon128.core.r[87] O=$abc$159056$n8026 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[97] I2=$abc$159056$n5278_1 I3=$abc$159056$n8026 O=$abc$159056$n3111 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[68] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[68] I3=murax.system_drygascon128.core.c[228] O=$abc$159056$n8028 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8028 I3=murax.system_drygascon128.core.r[68] O=$abc$159056$n8029 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[78] I2=$abc$159056$n5293 I3=$abc$159056$n8029 O=$abc$159056$n3132 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[52] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[52] I3=murax.system_drygascon128.core.c[212] O=$abc$159056$n8031 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8031 I3=murax.system_drygascon128.core.r[52] O=$abc$159056$n8032 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[62] I2=$abc$159056$n5298_1 I3=$abc$159056$n8032 O=$abc$159056$n3139 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[34] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[34] I3=murax.system_drygascon128.core.c[194] O=$abc$159056$n8034 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8034 I3=murax.system_drygascon128.core.r[34] O=$abc$159056$n8035 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[44] I2=$abc$159056$n5308_1 I3=$abc$159056$n8035 O=$abc$159056$n3153 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[30] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[30] I3=murax.system_drygascon128.core.c[190] O=$abc$159056$n8037 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8037 I3=murax.system_drygascon128.core.r[30] O=$abc$159056$n8038 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[40] I2=$abc$159056$n5313 I3=$abc$159056$n8038 O=$abc$159056$n3160 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[2] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[2] I3=murax.system_drygascon128.core.c[162] O=$abc$159056$n8040 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8040 I3=murax.system_drygascon128.core.r[2] O=$abc$159056$n8041 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[12] I2=$abc$159056$n5318_1 I3=$abc$159056$n8041 O=$abc$159056$n3167 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[26] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[26] I3=murax.system_drygascon128.core.c[186] O=$abc$159056$n8043 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8043 I3=murax.system_drygascon128.core.r[26] O=$abc$159056$n8044 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[36] I2=$abc$159056$n5323 I3=$abc$159056$n8044 O=$abc$159056$n3174 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[35] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[35] I3=murax.system_drygascon128.core.c[195] O=$abc$159056$n8046 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8046 I3=murax.system_drygascon128.core.r[35] O=$abc$159056$n8047 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[45] I2=$abc$159056$n5328_1 I3=$abc$159056$n8047 O=$abc$159056$n3181 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[31] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[31] I3=murax.system_drygascon128.core.c[191] O=$abc$159056$n8049 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8049 I3=murax.system_drygascon128.core.r[31] O=$abc$159056$n8050 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[41] I2=$abc$159056$n5334_1 I3=$abc$159056$n8050 O=$abc$159056$n3188 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[27] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[27] I3=murax.system_drygascon128.core.c[187] O=$abc$159056$n8052 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8052 I3=murax.system_drygascon128.core.r[27] O=$abc$159056$n8053 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[37] I2=$abc$159056$n5339 I3=$abc$159056$n8053 O=$abc$159056$n3195 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[29] I1=$abc$159056$n4422 I2=murax.system_drygascon128.core.c[29] I3=murax.system_drygascon128.core.c[189] O=$abc$159056$n8055 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111111111000 .gate SB_LUT4 I0=$abc$159056$n4403 I1=$abc$159056$n4401_1 I2=$abc$159056$n8055 I3=murax.system_drygascon128.core.r[29] O=$abc$159056$n8056 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101000011001111 .gate SB_LUT4 I0=$abc$159056$n3706_1 I1=murax.system_drygascon128.core.r[39] I2=$abc$159056$n5344_1 I3=$abc$159056$n8056 O=$abc$159056$n3202 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100011111111 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[3] I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[7] I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I3=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[2] O=$abc$159056$n8058 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[2] I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[6] I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I3=$abc$159056$n8058 O=$abc$159056$n8059 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110000001010 .gate SB_LUT4 I0=$abc$159056$n8063_1 I1=$abc$159056$n8059 I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[1] I3=$false O=$abc$159056$n8060_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n8060_1 I1=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[3] I2=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[2] I3=$false O=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10100011 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[1] I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[5] I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I3=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[2] O=$abc$159056$n8062 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[0] I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[4] I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I3=$abc$159056$n8062 O=$abc$159056$n8063_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110000001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_readArea_shifter[0] I1=$abc$159056$n88 I2=$abc$159056$n3394 I3=$abc$159056$n6280_1 O=$abc$159056$n8064 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111110110000 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_idcodeArea_shifter[0] I1=$abc$159056$n8064 I2=$abc$159056$n3397 I3=$abc$159056$n3394 O=io_G16 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100110010100011 .gate SB_LUT4 I0=$abc$159056$n6333 I1=$abc$159056$n6335 I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=$false O=$abc$159056$n8066_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n8066_1 I1=murax.system_cpu.execute_SRC_ADD_SUB[0] I2=murax.system_cpu.decode_to_execute_ALU_CTRL[0] I3=murax.system_cpu.decode_to_execute_ALU_CTRL[1] O=$abc$159056$n8067 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100010101011100 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[0] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[8] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] O=$abc$159056$n8069_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n8069_1 I1=$abc$159056$n6511 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[0] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011111110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[1] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[9] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] O=$abc$159056$n8071 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n8071 I1=$abc$159056$n6516 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[1] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011111110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[3] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[11] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] O=$abc$159056$n8073 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n8073 I1=$abc$159056$n6523 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[3] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011111110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[4] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[20] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] O=$abc$159056$n8075_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n8075_1 I1=$abc$159056$n6527 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[4] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011111110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[5] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[13] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] O=$abc$159056$n8077 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001111110101 .gate SB_LUT4 I0=$abc$159056$n8077 I1=$abc$159056$n6532 I2=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[5] I3=$abc$159056$n6512_1 O=murax.system_cpu._zz_66_[5] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0111011111110000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[23] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[31] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] O=$abc$159056$n8079 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0011111101010000 .gate SB_LUT4 I0=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[7] I1=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[15] I2=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] I3=$abc$159056$n8079 O=$abc$159056$n8080 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001100000101 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[72] I1=murax.system_drygascon128.core.r[8] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n8081_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[40] I1=$abc$159056$n8081_1 I2=murax.system_drygascon128.core.cnt[0] I3=$false O=$abc$159056$n8082 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[104] I1=$abc$159056$n3796_1 I2=$abc$159056$n8082 I3=$abc$159056$n4976_1 O=$abc$159056$n8083 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[41] I1=murax.system_drygascon128.core.r[105] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n8084_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[9] I1=murax.system_drygascon128.core.r[73] I2=murax.system_drygascon128.core.cnt[0] I3=$abc$159056$n8084_1 O=$abc$159056$n8085 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110000001010 .gate SB_LUT4 I0=$abc$159056$n4976_1 I1=$abc$159056$n8085 I2=$abc$159056$n8089 I3=$abc$159056$n6880 O=$abc$159056$n6313 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110001000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[265] I1=$abc$159056$n4932_1 I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.c[137] O=$abc$159056$n8087_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=$abc$159056$n3949_1 I1=murax.system_drygascon128.core.c[9] I2=$abc$159056$n6987 I3=$abc$159056$n6988 O=$abc$159056$n8088 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000111 .gate SB_LUT4 I0=$abc$159056$n3212 I1=$abc$159056$n8087_1 I2=$abc$159056$n6985 I3=$abc$159056$n8088 O=$abc$159056$n8089 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[43] I1=murax.system_drygascon128.core.r[107] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n8090_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[11] I1=murax.system_drygascon128.core.r[75] I2=murax.system_drygascon128.core.cnt[0] I3=$abc$159056$n8090_1 O=$abc$159056$n8091 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110000001010 .gate SB_LUT4 I0=$abc$159056$n4976_1 I1=$abc$159056$n8091 I2=$abc$159056$n8095 I3=$abc$159056$n6880 O=$abc$159056$n6319 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110001000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[267] I1=$abc$159056$n4932_1 I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.c[139] O=$abc$159056$n8093_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=$abc$159056$n3949_1 I1=murax.system_drygascon128.core.c[11] I2=$abc$159056$n7010 I3=$abc$159056$n7011 O=$abc$159056$n8094 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000111 .gate SB_LUT4 I0=$abc$159056$n3212 I1=$abc$159056$n8093_1 I2=$abc$159056$n7008 I3=$abc$159056$n8094 O=$abc$159056$n8095 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[209] I1=murax.system_drygascon128.core.c[241] I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.cnt[0] O=$abc$159056$n8096_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[81] I1=murax.system_drygascon128.core.c[113] I2=murax.system_drygascon128.core.cnt[2] I3=$abc$159056$n8096_1 O=$abc$159056$n8097 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110000001010 .gate SB_LUT4 I0=murax.system_drygascon128.core.cnt[1] I1=$abc$159056$n8097 I2=$abc$159056$n7075 I3=$abc$159056$n7080 O=$abc$159056$n8098 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000111 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[18] I1=murax.system_drygascon128.core.r[82] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n8100 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001100000101 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[114] I1=$abc$159056$n8100 I2=murax.system_drygascon128.core.cnt[0] I3=$false O=$abc$159056$n8101 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[50] I1=$abc$159056$n3936 I2=$abc$159056$n8101 I3=$abc$159056$n4976_1 O=$abc$159056$n8102_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[19] I1=murax.system_drygascon128.core.r[83] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n8103 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111001100000101 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[115] I1=$abc$159056$n8103 I2=murax.system_drygascon128.core.cnt[0] I3=$false O=$abc$159056$n8104 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[51] I1=$abc$159056$n3936 I2=$abc$159056$n8104 I3=$abc$159056$n4976_1 O=$abc$159056$n8105_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[93] I1=murax.system_drygascon128.core.r[29] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n8106 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000010111110011 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[61] I1=$abc$159056$n8106 I2=murax.system_drygascon128.core.cnt[0] I3=$false O=$abc$159056$n8107 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 01111100 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[125] I1=$abc$159056$n3796_1 I2=$abc$159056$n8107 I3=$abc$159056$n4976_1 O=$abc$159056$n8108_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000111100000000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[62] I1=murax.system_drygascon128.core.r[126] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n8109 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[30] I1=murax.system_drygascon128.core.r[94] I2=murax.system_drygascon128.core.cnt[0] I3=$abc$159056$n8109 O=$abc$159056$n8110 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110000001010 .gate SB_LUT4 I0=$abc$159056$n4976_1 I1=$abc$159056$n8110 I2=$abc$159056$n8114_1 I3=$abc$159056$n6880 O=$abc$159056$n6376 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110001000 .gate SB_LUT4 I0=murax.system_drygascon128.core.c[286] I1=$abc$159056$n4932_1 I2=murax.system_drygascon128.core.cnt[2] I3=murax.system_drygascon128.core.c[158] O=$abc$159056$n8112 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111100010001000 .gate SB_LUT4 I0=$abc$159056$n3949_1 I1=murax.system_drygascon128.core.c[30] I2=$abc$159056$n7224 I3=$abc$159056$n7225 O=$abc$159056$n8113 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000000000000111 .gate SB_LUT4 I0=$abc$159056$n3212 I1=$abc$159056$n8112 I2=$abc$159056$n7222_1 I3=$abc$159056$n8113 O=$abc$159056$n8114_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000011100000000 .gate SB_LUT4 I0=murax.system_cpu._zz_153_[0] I1=murax.system_cpu._zz_99_[7] I2=murax.system_cpu.decode_MEMORY_ENABLE I3=$false O=$abc$159056$n8115 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n8115 I1=murax.system_cpu._zz_99_[20] I2=murax.system_cpu._zz_99_[5] I3=$false O=$abc$159056$n8116 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10101100 .gate SB_LUT4 I0=$abc$159056$n8116 I1=murax.system_cpu._zz_97_[0] I2=murax.system_cpu._zz_116_ I3=$false O=murax.system_cpu.decode_SRC2[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_153_[1] I1=murax.system_cpu._zz_99_[8] I2=murax.system_cpu.decode_MEMORY_ENABLE I3=$false O=$abc$159056$n8118 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[21] I1=$abc$159056$n8118 I2=murax.system_cpu._zz_99_[5] I3=$false O=$abc$159056$n8119 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n8119 I1=murax.system_cpu._zz_97_[1] I2=murax.system_cpu._zz_116_ I3=$false O=murax.system_cpu.decode_SRC2[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_153_[2] I1=murax.system_cpu._zz_99_[9] I2=murax.system_cpu.decode_MEMORY_ENABLE I3=$false O=$abc$159056$n8121 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[22] I1=$abc$159056$n8121 I2=murax.system_cpu._zz_99_[5] I3=$false O=$abc$159056$n8122 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n8122 I1=murax.system_cpu._zz_97_[2] I2=murax.system_cpu._zz_116_ I3=$false O=murax.system_cpu.decode_SRC2[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_153_[3] I1=murax.system_cpu._zz_99_[10] I2=murax.system_cpu.decode_MEMORY_ENABLE I3=$false O=$abc$159056$n8124 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[23] I1=$abc$159056$n8124 I2=murax.system_cpu._zz_99_[5] I3=$false O=$abc$159056$n8125 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n8125 I1=murax.system_cpu._zz_97_[3] I2=murax.system_cpu._zz_116_ I3=$false O=murax.system_cpu.decode_SRC2[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_153_[4] I1=murax.system_cpu._zz_99_[11] I2=murax.system_cpu.decode_MEMORY_ENABLE I3=$false O=$abc$159056$n8127 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.system_cpu._zz_99_[24] I1=$abc$159056$n8127 I2=murax.system_cpu._zz_99_[5] I3=$false O=$abc$159056$n8128 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=$abc$159056$n8128 I1=murax.system_cpu._zz_97_[4] I2=murax.system_cpu._zz_116_ I3=$false O=murax.system_cpu.decode_SRC2[4] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11001010 .gate SB_LUT4 I0=murax.jtagBridge_1_.jtag_tap_fsm_state[2] I1=murax.jtagBridge_1_.jtag_tap_fsm_state[0] I2=murax.jtagBridge_1_.jtag_tap_fsm_state[1] I3=murax.jtagBridge_1_.jtag_tap_fsm_state[3] O=$abc$159056$n8130 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0101110011111011 .gate SB_LUT4 I0=$abc$159056$n5055 I1=$abc$159056$n5059 I2=$abc$159056$n8130 I3=$abc$159056$n7355 O=murax.jtagBridge_1_._zz_1_[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1110111111111111 .gate SB_LUT4 I0=murax.system_cpu.decode_to_execute_INSTRUCTION[14] I1=$abc$159056$n7573_1 I2=murax.system_cpu.decode_to_execute_INSTRUCTION[12] I3=$false O=$abc$159056$n8132_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 10110100 .gate SB_LUT4 I0=murax.system_cpu._zz_165_ I1=$abc$159056$n6335 I2=$abc$159056$n8132_1 I3=murax.system_cpu.decode_to_execute_INSTRUCTION[14] O=$abc$159056$n8133 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100001101110010 .gate SB_LUT4 I0=$abc$159056$n8133 I1=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] I2=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] I3=$false O=murax.system_cpu.execute_BRANCH_DO .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:48" .param LUT_INIT 11111000 .gate SB_LUT4 I0=$abc$159056$n6325_1 I1=murax.system_cpu.CsrPlugin_mcause_exceptionCode[0] I2=$abc$159056$n8067 I3=$abc$159056$n3616_1 O=$abc$159056$n8135_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1000100011110000 .gate SB_LUT4 I0=$abc$159056$n6328_1 I1=$abc$159056$n6329 I2=$abc$159056$n8135_1 I3=$abc$159056$n3401 O=murax.system_cpu._zz_60_[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0001000111110000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[49] I1=murax.system_drygascon128.core.r[113] I2=murax.system_drygascon128.core.cnt[0] I3=murax.system_drygascon128.core.cnt[1] O=$abc$159056$n8137 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1100111110100000 .gate SB_LUT4 I0=murax.system_drygascon128.core.r[17] I1=murax.system_drygascon128.core.r[81] I2=murax.system_drygascon128.core.cnt[0] I3=$abc$159056$n8137 O=$abc$159056$n8138_1 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 1111110000001010 .gate SB_LUT4 I0=$abc$159056$n4976_1 I1=$abc$159056$n8138_1 I2=$abc$159056$n8098 I3=$abc$159056$n6880 O=$abc$159056$n6337 .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:52" .param LUT_INIT 0000111110001000 .gate SB_LUT4 I0=$false I1=$true I2=murax.systemDebugger_1_.dispatcher_counter[0] I3=$false O=$abc$159056$n5053 .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4430|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.systemDebugger_1_.dispatcher_counter[0] CO=$auto$alumacc.cc:474:replace_alu$71597.C[2] I0=$false I1=murax.systemDebugger_1_.dispatcher_counter[1] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4430|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.systemDebugger_1_.dispatcher_counter[2] I3=$auto$alumacc.cc:474:replace_alu$71597.C[2] O=$abc$159056$n5057 .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4430|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_6_ I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[0] I3=$false O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71600.C[1] I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_6_ I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[1] I3=$auto$alumacc.cc:474:replace_alu$71600.C[1] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71600.C[1] CO=$auto$alumacc.cc:474:replace_alu$71600.C[2] I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[2] I3=$auto$alumacc.cc:474:replace_alu$71600.C[2] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71600.C[2] CO=$auto$alumacc.cc:474:replace_alu$71600.C[3] I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[3] I3=$auto$alumacc.cc:474:replace_alu$71600.C[3] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[3] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[0] I2=$abc$159056$n10653 I3=$true O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$true CO=$auto$alumacc.cc:474:replace_alu$71603.C[1] I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[0] I1=$abc$159056$n10653 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[1] I2=$abc$159056$n10649 I3=$auto$alumacc.cc:474:replace_alu$71603.C[1] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71603.C[1] CO=$auto$alumacc.cc:474:replace_alu$71603.C[2] I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[1] I1=$abc$159056$n10649 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[2] I2=$abc$159056$n10651 I3=$auto$alumacc.cc:474:replace_alu$71603.C[2] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71603.C[2] CO=$auto$alumacc.cc:474:replace_alu$71603.C[3] I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[2] I1=$abc$159056$n10651 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[3] I2=$abc$159056$n10655 I3=$auto$alumacc.cc:474:replace_alu$71603.C[3] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[3] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] I3=$auto$alumacc.cc:474:replace_alu$71606.C[10] O=$abc$159056$n5380 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[10] CO=$auto$alumacc.cc:474:replace_alu$71606.C[11] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] I3=$auto$alumacc.cc:474:replace_alu$71606.C[11] O=$abc$159056$n5383 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[11] CO=$auto$alumacc.cc:474:replace_alu$71606.C[12] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] I3=$auto$alumacc.cc:474:replace_alu$71606.C[12] O=$abc$159056$n5386 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[12] CO=$auto$alumacc.cc:474:replace_alu$71606.C[13] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] I3=$auto$alumacc.cc:474:replace_alu$71606.C[13] O=$abc$159056$n5389 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[13] CO=$auto$alumacc.cc:474:replace_alu$71606.C[14] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] I3=$auto$alumacc.cc:474:replace_alu$71606.C[14] O=$abc$159056$n5392 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[14] CO=$auto$alumacc.cc:474:replace_alu$71606.C[15] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] I3=$auto$alumacc.cc:474:replace_alu$71606.C[15] O=$abc$159056$n5395 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[15] CO=$auto$alumacc.cc:474:replace_alu$71606.C[16] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] I3=$auto$alumacc.cc:474:replace_alu$71606.C[16] O=$abc$159056$n5398 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[16] CO=$auto$alumacc.cc:474:replace_alu$71606.C[17] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] I3=$auto$alumacc.cc:474:replace_alu$71606.C[17] O=$abc$159056$n5401 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[17] CO=$auto$alumacc.cc:474:replace_alu$71606.C[18] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] I3=$auto$alumacc.cc:474:replace_alu$71606.C[18] O=$abc$159056$n5404 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[18] CO=$auto$alumacc.cc:474:replace_alu$71606.C[19] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] I3=$auto$alumacc.cc:474:replace_alu$71606.C[19] O=$abc$159056$n5407 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[19] CO=$auto$alumacc.cc:474:replace_alu$71606.C[20] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] I3=$auto$alumacc.cc:474:replace_alu$71606.C[20] O=$abc$159056$n5410 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[20] CO=$auto$alumacc.cc:474:replace_alu$71606.C[21] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] I3=$auto$alumacc.cc:474:replace_alu$71606.C[21] O=$abc$159056$n5413 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[21] CO=$auto$alumacc.cc:474:replace_alu$71606.C[22] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] I3=$auto$alumacc.cc:474:replace_alu$71606.C[22] O=$abc$159056$n5416 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[22] CO=$auto$alumacc.cc:474:replace_alu$71606.C[23] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] I3=$auto$alumacc.cc:474:replace_alu$71606.C[23] O=$abc$159056$n5419 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[23] CO=$auto$alumacc.cc:474:replace_alu$71606.C[24] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] I3=$auto$alumacc.cc:474:replace_alu$71606.C[24] O=$abc$159056$n5422 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[24] CO=$auto$alumacc.cc:474:replace_alu$71606.C[25] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] I3=$auto$alumacc.cc:474:replace_alu$71606.C[25] O=$abc$159056$n5425 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[25] CO=$auto$alumacc.cc:474:replace_alu$71606.C[26] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] I3=$auto$alumacc.cc:474:replace_alu$71606.C[26] O=$abc$159056$n5428 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[26] CO=$auto$alumacc.cc:474:replace_alu$71606.C[27] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] I3=$auto$alumacc.cc:474:replace_alu$71606.C[27] O=$abc$159056$n5431 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[27] CO=$auto$alumacc.cc:474:replace_alu$71606.C[28] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] I3=$auto$alumacc.cc:474:replace_alu$71606.C[28] O=$abc$159056$n5434 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[28] CO=$auto$alumacc.cc:474:replace_alu$71606.C[29] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] I3=$auto$alumacc.cc:474:replace_alu$71606.C[29] O=$abc$159056$n5437 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[29] CO=$auto$alumacc.cc:474:replace_alu$71606.C[30] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71606.C[3] I0=murax.system_cpu.IBusSimplePlugin_fetchPc_inc I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] I3=$auto$alumacc.cc:474:replace_alu$71606.C[30] O=$abc$159056$n5440 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[30] CO=$auto$alumacc.cc:474:replace_alu$71606.C[31] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] I3=$auto$alumacc.cc:474:replace_alu$71606.C[31] O=$abc$159056$n5443 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] I3=$auto$alumacc.cc:474:replace_alu$71606.C[3] O=$abc$159056$n5359 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[3] CO=$auto$alumacc.cc:474:replace_alu$71606.C[4] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] I3=$auto$alumacc.cc:474:replace_alu$71606.C[4] O=$abc$159056$n5362 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[4] CO=$auto$alumacc.cc:474:replace_alu$71606.C[5] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] I3=$auto$alumacc.cc:474:replace_alu$71606.C[5] O=$abc$159056$n5365 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[5] CO=$auto$alumacc.cc:474:replace_alu$71606.C[6] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] I3=$auto$alumacc.cc:474:replace_alu$71606.C[6] O=$abc$159056$n5368 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[6] CO=$auto$alumacc.cc:474:replace_alu$71606.C[7] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] I3=$auto$alumacc.cc:474:replace_alu$71606.C[7] O=$abc$159056$n5371 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[7] CO=$auto$alumacc.cc:474:replace_alu$71606.C[8] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] I3=$auto$alumacc.cc:474:replace_alu$71606.C[8] O=$abc$159056$n5374 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[8] CO=$auto$alumacc.cc:474:replace_alu$71606.C[9] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] I3=$auto$alumacc.cc:474:replace_alu$71606.C[9] O=$abc$159056$n5377 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71606.C[9] CO=$auto$alumacc.cc:474:replace_alu$71606.C[10] I0=$false I1=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2841|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71609.C[1] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[0] I1=murax.system_cpu._zz_148_[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[10] I2=murax.system_cpu.decode_to_execute_INSTRUCTION[30] I3=$auto$alumacc.cc:474:replace_alu$71609.C[10] O=murax.system_cpu.execute_BranchPlugin_branchAdder[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[10] CO=$auto$alumacc.cc:474:replace_alu$71609.C[11] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[10] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[11] I2=murax.system_cpu._zz_148_[11] I3=$auto$alumacc.cc:474:replace_alu$71609.C[11] O=murax.system_cpu.execute_BranchPlugin_branchAdder[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[11] CO=$auto$alumacc.cc:474:replace_alu$71609.C[12] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[11] I1=murax.system_cpu._zz_148_[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[12] I2=murax.system_cpu._zz_148_[12] I3=$auto$alumacc.cc:474:replace_alu$71609.C[12] O=murax.system_cpu.execute_BranchPlugin_branchAdder[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[12] CO=$auto$alumacc.cc:474:replace_alu$71609.C[13] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[12] I1=murax.system_cpu._zz_148_[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[13] I2=murax.system_cpu._zz_148_[13] I3=$auto$alumacc.cc:474:replace_alu$71609.C[13] O=murax.system_cpu.execute_BranchPlugin_branchAdder[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[13] CO=$auto$alumacc.cc:474:replace_alu$71609.C[14] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[13] I1=murax.system_cpu._zz_148_[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[14] I2=murax.system_cpu._zz_148_[14] I3=$auto$alumacc.cc:474:replace_alu$71609.C[14] O=murax.system_cpu.execute_BranchPlugin_branchAdder[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[14] CO=$auto$alumacc.cc:474:replace_alu$71609.C[15] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[14] I1=murax.system_cpu._zz_148_[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[15] I2=murax.system_cpu._zz_148_[15] I3=$auto$alumacc.cc:474:replace_alu$71609.C[15] O=murax.system_cpu.execute_BranchPlugin_branchAdder[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[15] CO=$auto$alumacc.cc:474:replace_alu$71609.C[16] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[15] I1=murax.system_cpu._zz_148_[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[16] I2=murax.system_cpu._zz_148_[16] I3=$auto$alumacc.cc:474:replace_alu$71609.C[16] O=murax.system_cpu.execute_BranchPlugin_branchAdder[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[16] CO=$auto$alumacc.cc:474:replace_alu$71609.C[17] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[16] I1=murax.system_cpu._zz_148_[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[17] I2=murax.system_cpu._zz_148_[17] I3=$auto$alumacc.cc:474:replace_alu$71609.C[17] O=murax.system_cpu.execute_BranchPlugin_branchAdder[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[17] CO=$auto$alumacc.cc:474:replace_alu$71609.C[18] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[17] I1=murax.system_cpu._zz_148_[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[18] I2=murax.system_cpu._zz_148_[18] I3=$auto$alumacc.cc:474:replace_alu$71609.C[18] O=murax.system_cpu.execute_BranchPlugin_branchAdder[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[18] CO=$auto$alumacc.cc:474:replace_alu$71609.C[19] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[18] I1=murax.system_cpu._zz_148_[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[19] I2=murax.system_cpu._zz_148_[19] I3=$auto$alumacc.cc:474:replace_alu$71609.C[19] O=murax.system_cpu.execute_BranchPlugin_branchAdder[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[19] CO=$auto$alumacc.cc:474:replace_alu$71609.C[20] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[19] I1=murax.system_cpu._zz_148_[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[1] CO=$auto$alumacc.cc:474:replace_alu$71609.C[2] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[1] I1=murax.system_cpu._zz_148_[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[20] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[20] O=murax.system_cpu.execute_BranchPlugin_branchAdder[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[20] CO=$auto$alumacc.cc:474:replace_alu$71609.C[21] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[20] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[21] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[21] O=murax.system_cpu.execute_BranchPlugin_branchAdder[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[21] CO=$auto$alumacc.cc:474:replace_alu$71609.C[22] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[21] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[22] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[22] O=murax.system_cpu.execute_BranchPlugin_branchAdder[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[22] CO=$auto$alumacc.cc:474:replace_alu$71609.C[23] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[22] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[23] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[23] O=murax.system_cpu.execute_BranchPlugin_branchAdder[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[23] CO=$auto$alumacc.cc:474:replace_alu$71609.C[24] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[23] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[24] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[24] O=murax.system_cpu.execute_BranchPlugin_branchAdder[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[24] CO=$auto$alumacc.cc:474:replace_alu$71609.C[25] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[24] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[25] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[25] O=murax.system_cpu.execute_BranchPlugin_branchAdder[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[25] CO=$auto$alumacc.cc:474:replace_alu$71609.C[26] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[25] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[26] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[26] O=murax.system_cpu.execute_BranchPlugin_branchAdder[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[26] CO=$auto$alumacc.cc:474:replace_alu$71609.C[27] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[26] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[27] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[27] O=murax.system_cpu.execute_BranchPlugin_branchAdder[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[27] CO=$auto$alumacc.cc:474:replace_alu$71609.C[28] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[27] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[28] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[28] O=murax.system_cpu.execute_BranchPlugin_branchAdder[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[28] CO=$auto$alumacc.cc:474:replace_alu$71609.C[29] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[28] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[29] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[29] O=murax.system_cpu.execute_BranchPlugin_branchAdder[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[29] CO=$auto$alumacc.cc:474:replace_alu$71609.C[30] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[29] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[2] I2=murax.system_cpu._zz_148_[2] I3=$auto$alumacc.cc:474:replace_alu$71609.C[2] O=murax.system_cpu.execute_BranchPlugin_branchAdder[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[2] CO=$auto$alumacc.cc:474:replace_alu$71609.C[3] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[2] I1=murax.system_cpu._zz_148_[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[30] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[30] O=murax.system_cpu.execute_BranchPlugin_branchAdder[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[30] CO=$auto$alumacc.cc:474:replace_alu$71609.C[31] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[30] I1=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[31] I2=murax.system_cpu._zz_142_ I3=$auto$alumacc.cc:474:replace_alu$71609.C[31] O=murax.system_cpu.execute_BranchPlugin_branchAdder[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[3] I2=murax.system_cpu._zz_148_[3] I3=$auto$alumacc.cc:474:replace_alu$71609.C[3] O=murax.system_cpu.execute_BranchPlugin_branchAdder[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[3] CO=$auto$alumacc.cc:474:replace_alu$71609.C[4] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[3] I1=murax.system_cpu._zz_148_[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[4] I2=murax.system_cpu._zz_148_[4] I3=$auto$alumacc.cc:474:replace_alu$71609.C[4] O=murax.system_cpu.execute_BranchPlugin_branchAdder[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[4] CO=$auto$alumacc.cc:474:replace_alu$71609.C[5] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[4] I1=murax.system_cpu._zz_148_[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[5] I2=murax.system_cpu.decode_to_execute_INSTRUCTION[25] I3=$auto$alumacc.cc:474:replace_alu$71609.C[5] O=murax.system_cpu.execute_BranchPlugin_branchAdder[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[5] CO=$auto$alumacc.cc:474:replace_alu$71609.C[6] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[5] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[6] I2=murax.system_cpu.decode_to_execute_INSTRUCTION[26] I3=$auto$alumacc.cc:474:replace_alu$71609.C[6] O=murax.system_cpu.execute_BranchPlugin_branchAdder[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[6] CO=$auto$alumacc.cc:474:replace_alu$71609.C[7] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[6] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[7] I2=murax.system_cpu.decode_to_execute_INSTRUCTION[27] I3=$auto$alumacc.cc:474:replace_alu$71609.C[7] O=murax.system_cpu.execute_BranchPlugin_branchAdder[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[7] CO=$auto$alumacc.cc:474:replace_alu$71609.C[8] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[7] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[8] I2=murax.system_cpu.decode_to_execute_INSTRUCTION[28] I3=$auto$alumacc.cc:474:replace_alu$71609.C[8] O=murax.system_cpu.execute_BranchPlugin_branchAdder[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[8] CO=$auto$alumacc.cc:474:replace_alu$71609.C[9] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[8] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_BranchPlugin_branch_src1[9] I2=murax.system_cpu.decode_to_execute_INSTRUCTION[29] I3=$auto$alumacc.cc:474:replace_alu$71609.C[9] O=murax.system_cpu.execute_BranchPlugin_branchAdder[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71609.C[9] CO=$auto$alumacc.cc:474:replace_alu$71609.C[10] I0=murax.system_cpu.execute_BranchPlugin_branch_src1[9] I1=murax.system_cpu.decode_to_execute_INSTRUCTION[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3521|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[0] I2=$abc$159056$n10633 I3=$true O=$abc$159056$n5577 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3726|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$true CO=$auto$alumacc.cc:474:replace_alu$71615.C[1] I0=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[0] I1=$abc$159056$n10633 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3726|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[1] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71615.C[1] O=$abc$159056$n5580 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3726|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71615.C[1] CO=$auto$alumacc.cc:474:replace_alu$71615.C[2] I0=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[1] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3726|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[2] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71615.C[2] O=$abc$159056$n5583 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3726|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_LightShifterPlugin_amplitude[0] I2=$false I3=$true O=$techmap\murax.system_cpu.$0\execute_LightShifterPlugin_amplitudeReg[4:0][0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3889|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_cpu.execute_LightShifterPlugin_amplitude[0] CO=$auto$alumacc.cc:474:replace_alu$71618.C[2] I0=murax.system_cpu.execute_LightShifterPlugin_amplitude[1] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3889|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_LightShifterPlugin_amplitude[2] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71618.C[2] O=$techmap\murax.system_cpu.$0\execute_LightShifterPlugin_amplitudeReg[4:0][2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3889|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71618.C[2] CO=$auto$alumacc.cc:474:replace_alu$71618.C[3] I0=murax.system_cpu.execute_LightShifterPlugin_amplitude[2] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3889|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_LightShifterPlugin_amplitude[3] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71618.C[3] O=$techmap\murax.system_cpu.$0\execute_LightShifterPlugin_amplitudeReg[4:0][3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3889|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71618.C[3] CO=$auto$alumacc.cc:474:replace_alu$71618.C[4] I0=murax.system_cpu.execute_LightShifterPlugin_amplitude[3] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3889|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.execute_LightShifterPlugin_amplitude[4] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71618.C[4] O=$techmap\murax.system_cpu.$0\execute_LightShifterPlugin_amplitudeReg[4:0][4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3889|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$abc$159056$n961 CO=$auto$alumacc.cc:474:replace_alu$71621.C[3] I0=$false I1=$abc$159056$n959 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:276|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71621.C[3] CO=$abc$159056$n9984 I0=$false I1=$abc$159056$n958 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:276|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$true I2=murax.system_drygascon128.core.cnt[0] I3=$false O=$abc$159056$n4817 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:242|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_drygascon128.core.cnt[0] CO=$auto$alumacc.cc:474:replace_alu$71630.C[2] I0=$false I1=murax.system_drygascon128.core.cnt[1] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:242|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_drygascon128.core.cnt[2] I3=$auto$alumacc.cc:474:replace_alu$71630.C[2] O=$abc$159056$n55 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:242|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71630.C[2] CO=$auto$alumacc.cc:474:replace_alu$71630.C[3] I0=$false I1=murax.system_drygascon128.core.cnt[2] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:242|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_drygascon128.core.cnt[3] I3=$auto$alumacc.cc:474:replace_alu$71630.C[3] O=$abc$159056$n4822 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:242|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71630.C[3] CO=$auto$alumacc.cc:474:replace_alu$71630.C[4] I0=$false I1=murax.system_drygascon128.core.cnt[3] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:242|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=$false I3=$auto$alumacc.cc:474:replace_alu$71630.C[4] O=$abc$159056$n59 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:242|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$true I2=murax.system_drygascon128.core.cnt[0] I3=$false O=$abc$159056$n8429 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:281|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_drygascon128.core.cnt[0] CO=$auto$alumacc.cc:474:replace_alu$71633.C[2] I0=$false I1=murax.system_drygascon128.core.cnt[1] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:281|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_drygascon128.core.cnt[2] I3=$auto$alumacc.cc:474:replace_alu$71633.C[2] O=$abc$159056$n8430 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:281|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71633.C[2] CO=$auto$alumacc.cc:474:replace_alu$71633.C[3] I0=$false I1=murax.system_drygascon128.core.cnt[2] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:281|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_drygascon128.core.cnt[3] I3=$auto$alumacc.cc:474:replace_alu$71633.C[3] O=$abc$159056$n8431 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:281|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_drygascon128.rounds[0] I2=$false I3=$true O=$abc$159056$n10772 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:277|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_drygascon128.rounds[0] CO=$auto$alumacc.cc:474:replace_alu$71636.C[2] I0=murax.system_drygascon128.rounds[1] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:277|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_drygascon128.rounds[2] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71636.C[2] O=$abc$159056$n10773 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:277|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71636.C[2] CO=$auto$alumacc.cc:474:replace_alu$71636.C[3] I0=murax.system_drygascon128.rounds[2] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:277|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_drygascon128.rounds[3] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71636.C[3] O=$abc$159056$n10774 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:277|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71636.C[3] CO=$abc$159056$n9948 I0=murax.system_drygascon128.rounds[3] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:277|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=$true I3=$abc$159056$n9948 O=$abc$159056$n991 .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:277|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$true I2=$abc$159056$n10646 I3=$true O=murax.system_drygascon128.core.u_gascon5_round.round_constant[4] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:209|../../../src/drygascon128.v:35|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$true I2=murax.resetCtrl_systemClkResetCounter[0] I3=$false O=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][0] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.resetCtrl_systemClkResetCounter[0] CO=$auto$alumacc.cc:474:replace_alu$71642.C[2] I0=$false I1=murax.resetCtrl_systemClkResetCounter[1] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.resetCtrl_systemClkResetCounter[2] I3=$auto$alumacc.cc:474:replace_alu$71642.C[2] O=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][2] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71642.C[2] CO=$auto$alumacc.cc:474:replace_alu$71642.C[3] I0=$false I1=murax.resetCtrl_systemClkResetCounter[2] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.resetCtrl_systemClkResetCounter[3] I3=$auto$alumacc.cc:474:replace_alu$71642.C[3] O=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][3] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71642.C[3] CO=$auto$alumacc.cc:474:replace_alu$71642.C[4] I0=$false I1=murax.resetCtrl_systemClkResetCounter[3] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.resetCtrl_systemClkResetCounter[4] I3=$auto$alumacc.cc:474:replace_alu$71642.C[4] O=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][4] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71642.C[4] CO=$auto$alumacc.cc:474:replace_alu$71642.C[5] I0=$false I1=murax.resetCtrl_systemClkResetCounter[4] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.resetCtrl_systemClkResetCounter[5] I3=$auto$alumacc.cc:474:replace_alu$71642.C[5] O=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][5] .attr src "toplevel.v:32|../../../Murax.v:5936|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$true I2=murax.system_timer.prescaler_1_.counter[0] I3=$false O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[0] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[10] I3=$auto$alumacc.cc:474:replace_alu$71645.C[10] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[10] CO=$auto$alumacc.cc:474:replace_alu$71645.C[11] I0=$false I1=murax.system_timer.prescaler_1_.counter[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[11] I3=$auto$alumacc.cc:474:replace_alu$71645.C[11] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[11] CO=$auto$alumacc.cc:474:replace_alu$71645.C[12] I0=$false I1=murax.system_timer.prescaler_1_.counter[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[12] I3=$auto$alumacc.cc:474:replace_alu$71645.C[12] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[12] CO=$auto$alumacc.cc:474:replace_alu$71645.C[13] I0=$false I1=murax.system_timer.prescaler_1_.counter[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[13] I3=$auto$alumacc.cc:474:replace_alu$71645.C[13] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[13] CO=$auto$alumacc.cc:474:replace_alu$71645.C[14] I0=$false I1=murax.system_timer.prescaler_1_.counter[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[14] I3=$auto$alumacc.cc:474:replace_alu$71645.C[14] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[14] CO=$auto$alumacc.cc:474:replace_alu$71645.C[15] I0=$false I1=murax.system_timer.prescaler_1_.counter[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[15] I3=$auto$alumacc.cc:474:replace_alu$71645.C[15] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[15] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_timer.prescaler_1_.counter[0] CO=$auto$alumacc.cc:474:replace_alu$71645.C[2] I0=$false I1=murax.system_timer.prescaler_1_.counter[1] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[2] I3=$auto$alumacc.cc:474:replace_alu$71645.C[2] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[2] CO=$auto$alumacc.cc:474:replace_alu$71645.C[3] I0=$false I1=murax.system_timer.prescaler_1_.counter[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[3] I3=$auto$alumacc.cc:474:replace_alu$71645.C[3] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[3] CO=$auto$alumacc.cc:474:replace_alu$71645.C[4] I0=$false I1=murax.system_timer.prescaler_1_.counter[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[4] I3=$auto$alumacc.cc:474:replace_alu$71645.C[4] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[4] CO=$auto$alumacc.cc:474:replace_alu$71645.C[5] I0=$false I1=murax.system_timer.prescaler_1_.counter[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[5] I3=$auto$alumacc.cc:474:replace_alu$71645.C[5] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[5] CO=$auto$alumacc.cc:474:replace_alu$71645.C[6] I0=$false I1=murax.system_timer.prescaler_1_.counter[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[6] I3=$auto$alumacc.cc:474:replace_alu$71645.C[6] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[6] CO=$auto$alumacc.cc:474:replace_alu$71645.C[7] I0=$false I1=murax.system_timer.prescaler_1_.counter[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[7] I3=$auto$alumacc.cc:474:replace_alu$71645.C[7] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[7] CO=$auto$alumacc.cc:474:replace_alu$71645.C[8] I0=$false I1=murax.system_timer.prescaler_1_.counter[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[8] I3=$auto$alumacc.cc:474:replace_alu$71645.C[8] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[8] CO=$auto$alumacc.cc:474:replace_alu$71645.C[9] I0=$false I1=murax.system_timer.prescaler_1_.counter[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.prescaler_1_.counter[9] I3=$auto$alumacc.cc:474:replace_alu$71645.C[9] O=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71645.C[9] CO=$auto$alumacc.cc:474:replace_alu$71645.C[10] I0=$false I1=murax.system_timer.prescaler_1_.counter[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:931|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_timer.timerA._zz_1_ I2=murax.system_timer.timerA.counter[0] I3=$false O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[0] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71648.C[1] I0=murax.system_timer.timerA._zz_1_ I1=murax.system_timer.timerA.counter[0] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[10] I3=$auto$alumacc.cc:474:replace_alu$71648.C[10] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[10] CO=$auto$alumacc.cc:474:replace_alu$71648.C[11] I0=$false I1=murax.system_timer.timerA.counter[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[11] I3=$auto$alumacc.cc:474:replace_alu$71648.C[11] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[11] CO=$auto$alumacc.cc:474:replace_alu$71648.C[12] I0=$false I1=murax.system_timer.timerA.counter[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[12] I3=$auto$alumacc.cc:474:replace_alu$71648.C[12] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[12] CO=$auto$alumacc.cc:474:replace_alu$71648.C[13] I0=$false I1=murax.system_timer.timerA.counter[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[13] I3=$auto$alumacc.cc:474:replace_alu$71648.C[13] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[13] CO=$auto$alumacc.cc:474:replace_alu$71648.C[14] I0=$false I1=murax.system_timer.timerA.counter[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[14] I3=$auto$alumacc.cc:474:replace_alu$71648.C[14] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[14] CO=$auto$alumacc.cc:474:replace_alu$71648.C[15] I0=$false I1=murax.system_timer.timerA.counter[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[15] I3=$auto$alumacc.cc:474:replace_alu$71648.C[15] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[15] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[1] I3=$auto$alumacc.cc:474:replace_alu$71648.C[1] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[1] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[1] CO=$auto$alumacc.cc:474:replace_alu$71648.C[2] I0=$false I1=murax.system_timer.timerA.counter[1] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[2] I3=$auto$alumacc.cc:474:replace_alu$71648.C[2] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[2] CO=$auto$alumacc.cc:474:replace_alu$71648.C[3] I0=$false I1=murax.system_timer.timerA.counter[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[3] I3=$auto$alumacc.cc:474:replace_alu$71648.C[3] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[3] CO=$auto$alumacc.cc:474:replace_alu$71648.C[4] I0=$false I1=murax.system_timer.timerA.counter[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[4] I3=$auto$alumacc.cc:474:replace_alu$71648.C[4] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[4] CO=$auto$alumacc.cc:474:replace_alu$71648.C[5] I0=$false I1=murax.system_timer.timerA.counter[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[5] I3=$auto$alumacc.cc:474:replace_alu$71648.C[5] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[5] CO=$auto$alumacc.cc:474:replace_alu$71648.C[6] I0=$false I1=murax.system_timer.timerA.counter[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[6] I3=$auto$alumacc.cc:474:replace_alu$71648.C[6] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[6] CO=$auto$alumacc.cc:474:replace_alu$71648.C[7] I0=$false I1=murax.system_timer.timerA.counter[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[7] I3=$auto$alumacc.cc:474:replace_alu$71648.C[7] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[7] CO=$auto$alumacc.cc:474:replace_alu$71648.C[8] I0=$false I1=murax.system_timer.timerA.counter[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[8] I3=$auto$alumacc.cc:474:replace_alu$71648.C[8] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[8] CO=$auto$alumacc.cc:474:replace_alu$71648.C[9] I0=$false I1=murax.system_timer.timerA.counter[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerA.counter[9] I3=$auto$alumacc.cc:474:replace_alu$71648.C[9] O=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71648.C[9] CO=$auto$alumacc.cc:474:replace_alu$71648.C[10] I0=$false I1=murax.system_timer.timerA.counter[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_timer.timerB._zz_1_ I2=murax.system_timer.timerB.counter[0] I3=$false O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[0] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71651.C[1] I0=murax.system_timer.timerB._zz_1_ I1=murax.system_timer.timerB.counter[0] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[10] I3=$auto$alumacc.cc:474:replace_alu$71651.C[10] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[10] CO=$auto$alumacc.cc:474:replace_alu$71651.C[11] I0=$false I1=murax.system_timer.timerB.counter[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[11] I3=$auto$alumacc.cc:474:replace_alu$71651.C[11] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[11] CO=$auto$alumacc.cc:474:replace_alu$71651.C[12] I0=$false I1=murax.system_timer.timerB.counter[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[12] I3=$auto$alumacc.cc:474:replace_alu$71651.C[12] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[12] CO=$auto$alumacc.cc:474:replace_alu$71651.C[13] I0=$false I1=murax.system_timer.timerB.counter[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[13] I3=$auto$alumacc.cc:474:replace_alu$71651.C[13] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[13] CO=$auto$alumacc.cc:474:replace_alu$71651.C[14] I0=$false I1=murax.system_timer.timerB.counter[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[14] I3=$auto$alumacc.cc:474:replace_alu$71651.C[14] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[14] CO=$auto$alumacc.cc:474:replace_alu$71651.C[15] I0=$false I1=murax.system_timer.timerB.counter[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[15] I3=$auto$alumacc.cc:474:replace_alu$71651.C[15] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[15] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[1] I3=$auto$alumacc.cc:474:replace_alu$71651.C[1] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[1] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[1] CO=$auto$alumacc.cc:474:replace_alu$71651.C[2] I0=$false I1=murax.system_timer.timerB.counter[1] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[2] I3=$auto$alumacc.cc:474:replace_alu$71651.C[2] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[2] CO=$auto$alumacc.cc:474:replace_alu$71651.C[3] I0=$false I1=murax.system_timer.timerB.counter[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[3] I3=$auto$alumacc.cc:474:replace_alu$71651.C[3] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[3] CO=$auto$alumacc.cc:474:replace_alu$71651.C[4] I0=$false I1=murax.system_timer.timerB.counter[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[4] I3=$auto$alumacc.cc:474:replace_alu$71651.C[4] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[4] CO=$auto$alumacc.cc:474:replace_alu$71651.C[5] I0=$false I1=murax.system_timer.timerB.counter[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[5] I3=$auto$alumacc.cc:474:replace_alu$71651.C[5] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[5] CO=$auto$alumacc.cc:474:replace_alu$71651.C[6] I0=$false I1=murax.system_timer.timerB.counter[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[6] I3=$auto$alumacc.cc:474:replace_alu$71651.C[6] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[6] CO=$auto$alumacc.cc:474:replace_alu$71651.C[7] I0=$false I1=murax.system_timer.timerB.counter[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[7] I3=$auto$alumacc.cc:474:replace_alu$71651.C[7] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[7] CO=$auto$alumacc.cc:474:replace_alu$71651.C[8] I0=$false I1=murax.system_timer.timerB.counter[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[8] I3=$auto$alumacc.cc:474:replace_alu$71651.C[8] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[8] CO=$auto$alumacc.cc:474:replace_alu$71651.C[9] I0=$false I1=murax.system_timer.timerB.counter[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_timer.timerB.counter[9] I3=$auto$alumacc.cc:474:replace_alu$71651.C[9] O=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71651.C[9] CO=$auto$alumacc.cc:474:replace_alu$71651.C[10] I0=$false I1=murax.system_timer.timerB.counter[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:972|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=$abc$159056$n10640 I3=$true O=murax.system_uartCtrl._zz_8_[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4803|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$abc$159056$n10640 CO=$auto$alumacc.cc:474:replace_alu$71654.C[2] I0=$false I1=$abc$159056$n9959 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4803|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=$abc$159056$n10642 I3=$auto$alumacc.cc:474:replace_alu$71654.C[2] O=murax.system_uartCtrl._zz_8_[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4803|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71654.C[2] CO=$auto$alumacc.cc:474:replace_alu$71654.C[3] I0=$false I1=$abc$159056$n10642 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4803|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=$abc$159056$n10644 I3=$auto$alumacc.cc:474:replace_alu$71654.C[3] O=murax.system_uartCtrl._zz_8_[3] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4803|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71654.C[3] CO=$auto$alumacc.cc:474:replace_alu$71654.C[4] I0=$false I1=$abc$159056$n10644 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4803|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$true I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_ready I3=$auto$alumacc.cc:474:replace_alu$71654.C[4] O=murax.system_uartCtrl._zz_8_[4] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4803|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[0] I3=$false O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_valueNext[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71657.C[1] I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[1] I3=$auto$alumacc.cc:474:replace_alu$71657.C[1] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_valueNext[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71657.C[1] CO=$auto$alumacc.cc:474:replace_alu$71657.C[2] I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[2] I3=$auto$alumacc.cc:474:replace_alu$71657.C[2] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_valueNext[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71657.C[2] CO=$auto$alumacc.cc:474:replace_alu$71657.C[3] I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[3] I3=$auto$alumacc.cc:474:replace_alu$71657.C[3] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_valueNext[3] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_6_ I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[0] I3=$false O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71660.C[1] I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_6_ I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[1] I3=$auto$alumacc.cc:474:replace_alu$71660.C[1] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71660.C[1] CO=$auto$alumacc.cc:474:replace_alu$71660.C[2] I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[2] I3=$auto$alumacc.cc:474:replace_alu$71660.C[2] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71660.C[2] CO=$auto$alumacc.cc:474:replace_alu$71660.C[3] I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[3] I3=$auto$alumacc.cc:474:replace_alu$71660.C[3] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[3] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:881|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[0] I2=$abc$159056$n10635 I3=$true O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$true CO=$auto$alumacc.cc:474:replace_alu$71663.C[1] I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[0] I1=$abc$159056$n10635 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[1] I2=$abc$159056$n10637 I3=$auto$alumacc.cc:474:replace_alu$71663.C[1] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71663.C[1] CO=$auto$alumacc.cc:474:replace_alu$71663.C[2] I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[1] I1=$abc$159056$n10637 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[2] I2=$abc$159056$n10639 I3=$auto$alumacc.cc:474:replace_alu$71663.C[2] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71663.C[2] CO=$auto$alumacc.cc:474:replace_alu$71663.C[3] I0=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[2] I1=$abc$159056$n10639 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[3] I2=$abc$159056$n10632 I3=$auto$alumacc.cc:474:replace_alu$71663.C[3] O=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[3] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:895|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[0] I2=$false I3=$true O=$abc$159056$n8758 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[10] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[10] O=$abc$159056$n8778 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[10] CO=$auto$alumacc.cc:474:replace_alu$71666.C[11] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[10] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[11] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[11] O=$abc$159056$n8780 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[11] CO=$auto$alumacc.cc:474:replace_alu$71666.C[12] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[11] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[12] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[12] O=$abc$159056$n8782 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[12] CO=$auto$alumacc.cc:474:replace_alu$71666.C[13] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[12] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[13] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[13] O=$abc$159056$n8784 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[13] CO=$auto$alumacc.cc:474:replace_alu$71666.C[14] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[13] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[14] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[14] O=$abc$159056$n8786 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[14] CO=$auto$alumacc.cc:474:replace_alu$71666.C[15] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[14] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[15] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[15] O=$abc$159056$n8788 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[15] CO=$auto$alumacc.cc:474:replace_alu$71666.C[16] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[15] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[16] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[16] O=$abc$159056$n8790 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[16] CO=$auto$alumacc.cc:474:replace_alu$71666.C[17] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[16] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[17] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[17] O=$abc$159056$n8792 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[17] CO=$auto$alumacc.cc:474:replace_alu$71666.C[18] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[17] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[18] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[18] O=$abc$159056$n8794 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[18] CO=$auto$alumacc.cc:474:replace_alu$71666.C[19] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[18] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[19] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[19] O=$abc$159056$n8796 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[0] CO=$auto$alumacc.cc:474:replace_alu$71666.C[2] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[1] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[2] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[2] O=$abc$159056$n8762 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[2] CO=$auto$alumacc.cc:474:replace_alu$71666.C[3] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[2] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[3] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[3] O=$abc$159056$n8764 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[3] CO=$auto$alumacc.cc:474:replace_alu$71666.C[4] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[3] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[4] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[4] O=$abc$159056$n8766 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[4] CO=$auto$alumacc.cc:474:replace_alu$71666.C[5] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[4] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[5] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[5] O=$abc$159056$n8768 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[5] CO=$auto$alumacc.cc:474:replace_alu$71666.C[6] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[5] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[6] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[6] O=$abc$159056$n8770 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[6] CO=$auto$alumacc.cc:474:replace_alu$71666.C[7] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[6] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[7] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[7] O=$abc$159056$n8772 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[7] CO=$auto$alumacc.cc:474:replace_alu$71666.C[8] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[7] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[8] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[8] O=$abc$159056$n8774 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[8] CO=$auto$alumacc.cc:474:replace_alu$71666.C[9] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[8] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[9] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71666.C[9] O=$abc$159056$n8776 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71666.C[9] CO=$auto$alumacc.cc:474:replace_alu$71666.C[10] I0=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[9] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:776|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$true I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] I3=$false O=$abc$159056$n8825 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:483|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] CO=$auto$alumacc.cc:474:replace_alu$71669.C[2] I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:483|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] I3=$auto$alumacc.cc:474:replace_alu$71669.C[2] O=$abc$159056$n8827 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:483|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[0] I2=$false I3=$true O=$abc$159056$n8813 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:477|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[0] CO=$auto$alumacc.cc:474:replace_alu$71672.C[2] I0=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[1] I1=$true .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:477|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[2] I2=$true I3=$auto$alumacc.cc:474:replace_alu$71672.C[2] O=$abc$159056$n8815 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:477|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I2=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[0] I3=$false O=$abc$159056$n8828 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:202|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71675.C[1] I0=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick I1=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:202|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[1] I3=$auto$alumacc.cc:474:replace_alu$71675.C[1] O=$abc$159056$n8830 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:202|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71675.C[1] CO=$auto$alumacc.cc:474:replace_alu$71675.C[2] I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:202|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[2] I3=$auto$alumacc.cc:474:replace_alu$71675.C[2] O=$abc$159056$n8832 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:202|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$true I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] I3=$false O=$abc$159056$n8844 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:283|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] CO=$auto$alumacc.cc:474:replace_alu$71678.C[2] I0=$false I1=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:283|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[2] I3=$auto$alumacc.cc:474:replace_alu$71678.C[2] O=$abc$159056$n8846 .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:283|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[0] I3=$false O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_valueNext[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$false CO=$auto$alumacc.cc:474:replace_alu$71681.C[1] I0=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[1] I3=$auto$alumacc.cc:474:replace_alu$71681.C[1] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_valueNext[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71681.C[1] CO=$auto$alumacc.cc:474:replace_alu$71681.C[2] I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[2] I3=$auto$alumacc.cc:474:replace_alu$71681.C[2] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_valueNext[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$alumacc.cc:474:replace_alu$71681.C[2] CO=$auto$alumacc.cc:474:replace_alu$71681.C[3] I0=$false I1=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[3] I3=$auto$alumacc.cc:474:replace_alu$71681.C[3] O=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_valueNext[3] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:865|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I2=murax.system_cpu.decode_to_execute_SRC1[0] I3=murax.system_cpu._zz_195_[0] O=murax.system_cpu.execute_SRC_ADD_SUB[0] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=murax.system_cpu._zz_195_[0] CO=$auto$maccmap.cc:240:synth$81223.C[1] I0=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS I1=murax.system_cpu.decode_to_execute_SRC1[0] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[10] I2=murax.system_cpu._zz_195_[10] I3=$auto$maccmap.cc:240:synth$81223.C[10] O=murax.system_cpu.execute_SRC_ADD_SUB[10] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[10] CO=$auto$maccmap.cc:240:synth$81223.C[11] I0=murax.system_cpu.decode_to_execute_SRC1[10] I1=murax.system_cpu._zz_195_[10] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[11] I2=murax.system_cpu._zz_195_[11] I3=$auto$maccmap.cc:240:synth$81223.C[11] O=murax.system_cpu.execute_SRC_ADD_SUB[11] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[11] CO=$auto$maccmap.cc:240:synth$81223.C[12] I0=murax.system_cpu.decode_to_execute_SRC1[11] I1=murax.system_cpu._zz_195_[11] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[12] I2=murax.system_cpu._zz_195_[12] I3=$auto$maccmap.cc:240:synth$81223.C[12] O=murax.system_cpu.execute_SRC_ADD_SUB[12] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[12] CO=$auto$maccmap.cc:240:synth$81223.C[13] I0=murax.system_cpu.decode_to_execute_SRC1[12] I1=murax.system_cpu._zz_195_[12] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[13] I2=murax.system_cpu._zz_195_[13] I3=$auto$maccmap.cc:240:synth$81223.C[13] O=murax.system_cpu.execute_SRC_ADD_SUB[13] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[13] CO=$auto$maccmap.cc:240:synth$81223.C[14] I0=murax.system_cpu.decode_to_execute_SRC1[13] I1=murax.system_cpu._zz_195_[13] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[14] I2=murax.system_cpu._zz_195_[14] I3=$auto$maccmap.cc:240:synth$81223.C[14] O=murax.system_cpu.execute_SRC_ADD_SUB[14] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[14] CO=$auto$maccmap.cc:240:synth$81223.C[15] I0=murax.system_cpu.decode_to_execute_SRC1[14] I1=murax.system_cpu._zz_195_[14] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[15] I2=murax.system_cpu._zz_195_[15] I3=$auto$maccmap.cc:240:synth$81223.C[15] O=murax.system_cpu.execute_SRC_ADD_SUB[15] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[15] CO=$auto$maccmap.cc:240:synth$81223.C[16] I0=murax.system_cpu.decode_to_execute_SRC1[15] I1=murax.system_cpu._zz_195_[15] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[16] I2=murax.system_cpu._zz_195_[16] I3=$auto$maccmap.cc:240:synth$81223.C[16] O=murax.system_cpu.execute_SRC_ADD_SUB[16] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[16] CO=$auto$maccmap.cc:240:synth$81223.C[17] I0=murax.system_cpu.decode_to_execute_SRC1[16] I1=murax.system_cpu._zz_195_[16] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[17] I2=murax.system_cpu._zz_195_[17] I3=$auto$maccmap.cc:240:synth$81223.C[17] O=murax.system_cpu.execute_SRC_ADD_SUB[17] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[17] CO=$auto$maccmap.cc:240:synth$81223.C[18] I0=murax.system_cpu.decode_to_execute_SRC1[17] I1=murax.system_cpu._zz_195_[17] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[18] I2=murax.system_cpu._zz_195_[18] I3=$auto$maccmap.cc:240:synth$81223.C[18] O=murax.system_cpu.execute_SRC_ADD_SUB[18] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[18] CO=$auto$maccmap.cc:240:synth$81223.C[19] I0=murax.system_cpu.decode_to_execute_SRC1[18] I1=murax.system_cpu._zz_195_[18] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[19] I2=murax.system_cpu._zz_195_[19] I3=$auto$maccmap.cc:240:synth$81223.C[19] O=murax.system_cpu.execute_SRC_ADD_SUB[19] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[19] CO=$auto$maccmap.cc:240:synth$81223.C[20] I0=murax.system_cpu.decode_to_execute_SRC1[19] I1=murax.system_cpu._zz_195_[19] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[1] I2=murax.system_cpu._zz_195_[1] I3=$auto$maccmap.cc:240:synth$81223.C[1] O=murax.system_cpu.execute_SRC_ADD_SUB[1] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[1] CO=$auto$maccmap.cc:240:synth$81223.C[2] I0=murax.system_cpu.decode_to_execute_SRC1[1] I1=murax.system_cpu._zz_195_[1] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[20] I2=murax.system_cpu._zz_195_[20] I3=$auto$maccmap.cc:240:synth$81223.C[20] O=murax.system_cpu.execute_SRC_ADD_SUB[20] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[20] CO=$auto$maccmap.cc:240:synth$81223.C[21] I0=murax.system_cpu.decode_to_execute_SRC1[20] I1=murax.system_cpu._zz_195_[20] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[21] I2=murax.system_cpu._zz_195_[21] I3=$auto$maccmap.cc:240:synth$81223.C[21] O=murax.system_cpu.execute_SRC_ADD_SUB[21] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[21] CO=$auto$maccmap.cc:240:synth$81223.C[22] I0=murax.system_cpu.decode_to_execute_SRC1[21] I1=murax.system_cpu._zz_195_[21] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[22] I2=murax.system_cpu._zz_195_[22] I3=$auto$maccmap.cc:240:synth$81223.C[22] O=murax.system_cpu.execute_SRC_ADD_SUB[22] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[22] CO=$auto$maccmap.cc:240:synth$81223.C[23] I0=murax.system_cpu.decode_to_execute_SRC1[22] I1=murax.system_cpu._zz_195_[22] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[23] I2=murax.system_cpu._zz_195_[23] I3=$auto$maccmap.cc:240:synth$81223.C[23] O=murax.system_cpu.execute_SRC_ADD_SUB[23] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[23] CO=$auto$maccmap.cc:240:synth$81223.C[24] I0=murax.system_cpu.decode_to_execute_SRC1[23] I1=murax.system_cpu._zz_195_[23] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[24] I2=murax.system_cpu._zz_195_[24] I3=$auto$maccmap.cc:240:synth$81223.C[24] O=murax.system_cpu.execute_SRC_ADD_SUB[24] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[24] CO=$auto$maccmap.cc:240:synth$81223.C[25] I0=murax.system_cpu.decode_to_execute_SRC1[24] I1=murax.system_cpu._zz_195_[24] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[25] I2=murax.system_cpu._zz_195_[25] I3=$auto$maccmap.cc:240:synth$81223.C[25] O=murax.system_cpu.execute_SRC_ADD_SUB[25] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[25] CO=$auto$maccmap.cc:240:synth$81223.C[26] I0=murax.system_cpu.decode_to_execute_SRC1[25] I1=murax.system_cpu._zz_195_[25] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[26] I2=murax.system_cpu._zz_195_[26] I3=$auto$maccmap.cc:240:synth$81223.C[26] O=murax.system_cpu.execute_SRC_ADD_SUB[26] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[26] CO=$auto$maccmap.cc:240:synth$81223.C[27] I0=murax.system_cpu.decode_to_execute_SRC1[26] I1=murax.system_cpu._zz_195_[26] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[27] I2=murax.system_cpu._zz_195_[27] I3=$auto$maccmap.cc:240:synth$81223.C[27] O=murax.system_cpu.execute_SRC_ADD_SUB[27] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[27] CO=$auto$maccmap.cc:240:synth$81223.C[28] I0=murax.system_cpu.decode_to_execute_SRC1[27] I1=murax.system_cpu._zz_195_[27] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[28] I2=murax.system_cpu._zz_195_[28] I3=$auto$maccmap.cc:240:synth$81223.C[28] O=murax.system_cpu.execute_SRC_ADD_SUB[28] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[28] CO=$auto$maccmap.cc:240:synth$81223.C[29] I0=murax.system_cpu.decode_to_execute_SRC1[28] I1=murax.system_cpu._zz_195_[28] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[29] I2=murax.system_cpu._zz_195_[29] I3=$auto$maccmap.cc:240:synth$81223.C[29] O=murax.system_cpu.execute_SRC_ADD_SUB[29] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[29] CO=$auto$maccmap.cc:240:synth$81223.C[30] I0=murax.system_cpu.decode_to_execute_SRC1[29] I1=murax.system_cpu._zz_195_[29] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[2] I2=murax.system_cpu._zz_195_[2] I3=$auto$maccmap.cc:240:synth$81223.C[2] O=murax.system_cpu.execute_SRC_ADD_SUB[2] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[2] CO=$auto$maccmap.cc:240:synth$81223.C[3] I0=murax.system_cpu.decode_to_execute_SRC1[2] I1=murax.system_cpu._zz_195_[2] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[30] I2=murax.system_cpu._zz_195_[30] I3=$auto$maccmap.cc:240:synth$81223.C[30] O=murax.system_cpu.execute_SRC_ADD_SUB[30] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[30] CO=$auto$maccmap.cc:240:synth$81223.C[31] I0=murax.system_cpu.decode_to_execute_SRC1[30] I1=murax.system_cpu._zz_195_[30] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[31] I2=murax.system_cpu._zz_195_[31] I3=$auto$maccmap.cc:240:synth$81223.C[31] O=murax.system_cpu.execute_SRC_ADD_SUB[31] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[3] I2=murax.system_cpu._zz_195_[3] I3=$auto$maccmap.cc:240:synth$81223.C[3] O=murax.system_cpu.execute_SRC_ADD_SUB[3] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[3] CO=$auto$maccmap.cc:240:synth$81223.C[4] I0=murax.system_cpu.decode_to_execute_SRC1[3] I1=murax.system_cpu._zz_195_[3] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[4] I2=murax.system_cpu._zz_195_[4] I3=$auto$maccmap.cc:240:synth$81223.C[4] O=murax.system_cpu.execute_SRC_ADD_SUB[4] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[4] CO=$auto$maccmap.cc:240:synth$81223.C[5] I0=murax.system_cpu.decode_to_execute_SRC1[4] I1=murax.system_cpu._zz_195_[4] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[5] I2=murax.system_cpu._zz_195_[5] I3=$auto$maccmap.cc:240:synth$81223.C[5] O=murax.system_cpu.execute_SRC_ADD_SUB[5] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[5] CO=$auto$maccmap.cc:240:synth$81223.C[6] I0=murax.system_cpu.decode_to_execute_SRC1[5] I1=murax.system_cpu._zz_195_[5] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[6] I2=murax.system_cpu._zz_195_[6] I3=$auto$maccmap.cc:240:synth$81223.C[6] O=murax.system_cpu.execute_SRC_ADD_SUB[6] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[6] CO=$auto$maccmap.cc:240:synth$81223.C[7] I0=murax.system_cpu.decode_to_execute_SRC1[6] I1=murax.system_cpu._zz_195_[6] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[7] I2=murax.system_cpu._zz_195_[7] I3=$auto$maccmap.cc:240:synth$81223.C[7] O=murax.system_cpu.execute_SRC_ADD_SUB[7] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[7] CO=$auto$maccmap.cc:240:synth$81223.C[8] I0=murax.system_cpu.decode_to_execute_SRC1[7] I1=murax.system_cpu._zz_195_[7] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[8] I2=murax.system_cpu._zz_195_[8] I3=$auto$maccmap.cc:240:synth$81223.C[8] O=murax.system_cpu.execute_SRC_ADD_SUB[8] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[8] CO=$auto$maccmap.cc:240:synth$81223.C[9] I0=murax.system_cpu.decode_to_execute_SRC1[8] I1=murax.system_cpu._zz_195_[8] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=murax.system_cpu.decode_to_execute_SRC1[9] I2=murax.system_cpu._zz_195_[9] I3=$auto$maccmap.cc:240:synth$81223.C[9] O=murax.system_cpu.execute_SRC_ADD_SUB[9] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81223.C[9] CO=$auto$maccmap.cc:240:synth$81223.C[10] I0=murax.system_cpu.decode_to_execute_SRC1[9] I1=murax.system_cpu._zz_195_[9] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$abc$159056$n10660 I2=murax.system_cpu._zz_171_ I3=$false O=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[0] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$false CO=$auto$maccmap.cc:240:synth$81490.C[1] I0=$abc$159056$n10660 I1=murax.system_cpu._zz_171_ .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$abc$159056$n733 I2=$abc$159056$n10659 I3=$auto$maccmap.cc:240:synth$81490.C[1] O=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[1] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$auto$maccmap.cc:240:synth$81490.C[1] CO=$auto$maccmap.cc:240:synth$81490.C[2] I0=$abc$159056$n733 I1=$abc$159056$n10659 .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$abc$159056$n735 I2=murax.system_cpu.IBusSimplePlugin_pendingCmd[1] I3=$auto$maccmap.cc:240:synth$81490.C[2] O=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[2] .attr src "/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_DFFSS C=io_mainClk D=murax._zz_14_ Q=murax.resetCtrl_systemReset S=murax.system_cpu_debug_resetOut_regNext .attr src "toplevel.v:32|../../../Murax.v:5943|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][0] E=murax._zz_14_ Q=murax.resetCtrl_systemClkResetCounter[0] .attr src "toplevel.v:32|../../../Murax.v:5934|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n9955 E=$abc$159056$n81 Q=murax.resetCtrl_systemClkResetCounter[1] .attr src "toplevel.v:32|../../../Murax.v:5934|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][2] E=murax._zz_14_ Q=murax.resetCtrl_systemClkResetCounter[2] .attr src "toplevel.v:32|../../../Murax.v:5934|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][3] E=murax._zz_14_ Q=murax.resetCtrl_systemClkResetCounter[3] .attr src "toplevel.v:32|../../../Murax.v:5934|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][4] E=murax._zz_14_ Q=murax.resetCtrl_systemClkResetCounter[4] .attr src "toplevel.v:32|../../../Murax.v:5934|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$techmap\murax.$0\resetCtrl_systemClkResetCounter[5:0][5] E=murax._zz_14_ Q=murax.resetCtrl_systemClkResetCounter[5] .attr src "toplevel.v:32|../../../Murax.v:5934|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax._zz_14_ Q=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5943|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_mainBusDecoder_logic_hits_1 E=$abc$159056$n4378 Q=murax.system_mainBusDecoder_logic_rspSourceId .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[12] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[0] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_165_ E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[1] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_RS2[0] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_RS2[1] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_RS2[2] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_RS2[3] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_RS2[4] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_RS2[5] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_RS2[6] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_RS2[7] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[8] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[9] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[10] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[11] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[12] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[13] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[14] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[15] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[16] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[17] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[18] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[19] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[20] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[21] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[22] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[23] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[24] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[25] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[26] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[27] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[28] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[29] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[30] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_payload_data[31] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[0] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[0] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[1] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[1] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[2] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[2] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[3] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[3] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[4] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[4] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[5] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[5] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[6] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[6] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[7] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[7] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[8] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[8] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[9] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[9] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[10] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[10] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[11] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[11] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[12] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[12] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[13] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[13] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[14] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[14] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[15] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[15] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[16] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[16] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[17] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[17] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[18] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[18] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[19] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[19] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[20] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[20] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[21] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[21] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[22] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[22] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[23] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[23] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[24] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[24] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[25] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[25] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[26] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[26] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[27] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[27] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[28] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[28] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[29] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[29] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[30] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[30] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[31] E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[31] .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.dBus_cmd_payload_wr E=$abc$159056$n10663 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_wr .attr src "toplevel.v:32|../../../Murax.v:5978|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.system_cpu.DebugPlugin_resetIt_regNext Q=murax.system_cpu_debug_resetOut_regNext .attr src "toplevel.v:32|../../../Murax.v:5990|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.io_remote_rsp_payload_data[0] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[0] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.io_remote_rsp_payload_data[1] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[1] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.io_remote_rsp_payload_data[2] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[2] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.io_remote_rsp_payload_data[3] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[3] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.io_remote_rsp_payload_data[4] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[4] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[5] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[5] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[6] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[6] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[7] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[7] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[8] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[8] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[9] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[9] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[10] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[10] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[11] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[11] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[12] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[12] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[13] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[13] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[14] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[14] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[15] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[15] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[16] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[16] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[17] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[17] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[18] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[18] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[19] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[19] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[20] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[20] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[21] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[21] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[22] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[22] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[23] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[23] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[24] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[24] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[25] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[25] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[26] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[26] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[27] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[27] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[28] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[28] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[29] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[29] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[30] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[30] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.DebugPlugin_busReadDataReg[31] E=murax._zz_2_ Q=murax.jtagBridge_1_.system_rsp_payload_data[31] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax._zz_2_ E=$abc$159056$n84 Q=murax.jtagBridge_1_.system_rsp_valid .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4331|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4950 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[0] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_readArea_shifter[2] E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[1] R=$abc$159056$n403 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4953 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[2] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4956 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[3] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4959 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[4] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4962 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[5] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4965 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[6] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4968 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[7] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4971 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[8] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4974 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[9] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4977 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[10] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4980 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[11] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4983 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[12] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4986 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[13] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4989 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[14] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4992 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[15] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4995 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[16] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4998 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[17] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5001 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[18] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5004 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[19] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5007 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[20] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5010 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[21] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5013 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[22] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5016 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[23] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5019 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[24] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5022 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[25] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5025 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[26] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5028 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[27] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5031 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[28] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5034 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[29] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5037 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[30] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5040 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[31] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5043 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[32] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n5046 E=$abc$159056$n91 Q=murax.jtagBridge_1_.jtag_readArea_shifter[33] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[1] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[0] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[2] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[1] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[3] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[2] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[4] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[3] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[5] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[4] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[6] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[5] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[7] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[6] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[8] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[7] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[9] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[8] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[10] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[9] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[11] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[10] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[12] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[11] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[13] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[12] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[14] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[13] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[15] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[14] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[16] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[15] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[17] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[16] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[18] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[17] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[19] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[18] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[20] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[19] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[21] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[20] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[22] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[21] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[23] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[22] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[24] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[23] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[25] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[24] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[26] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[25] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[27] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[26] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[28] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[27] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[29] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[28] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[30] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[29] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_idcodeArea_shifter[31] E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[30] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=io_G15 E=$abc$159056$n94 Q=murax.jtagBridge_1_.jtag_idcodeArea_shifter[31] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=io_G15 E=$abc$159056$n88 Q=murax.jtagBridge_1_.jtag_tap_bypass .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n2867 E=$abc$159056$n922 Q=murax.jtagBridge_1_.jtag_tap_instructionShift[0] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n2870 E=$abc$159056$n922 Q=murax.jtagBridge_1_.jtag_tap_instructionShift[1] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n2876 E=$abc$159056$n922 Q=murax.jtagBridge_1_.jtag_tap_instructionShift[2] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n2873 E=$abc$159056$n922 Q=murax.jtagBridge_1_.jtag_tap_instructionShift[3] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_jtag_tck D=murax.jtagBridge_1_.jtag_tap_instructionShift[0] E=$abc$159056$n100 Q=murax.jtagBridge_1_.jtag_tap_instruction[0] S=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_tap_instructionShift[1] E=$abc$159056$n100 Q=murax.jtagBridge_1_.jtag_tap_instruction[1] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_tap_instructionShift[2] E=$abc$159056$n100 Q=murax.jtagBridge_1_.jtag_tap_instruction[2] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_jtag_tck D=murax.jtagBridge_1_.jtag_tap_instructionShift[3] E=$abc$159056$n100 Q=murax.jtagBridge_1_.jtag_tap_instruction[3] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_jtag_tck D=murax.jtagBridge_1_._zz_1_[0] Q=murax.jtagBridge_1_.jtag_tap_fsm_state[0] .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_jtag_tck D=$abc$159056$n2913 Q=murax.jtagBridge_1_.jtag_tap_fsm_state[1] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_jtag_tck D=$abc$159056$n2933 Q=murax.jtagBridge_1_.jtag_tap_fsm_state[2] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_jtag_tck D=$abc$159056$n2923 Q=murax.jtagBridge_1_.jtag_tap_fsm_state[3] R=$abc$159056$n7 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4342|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_headerShifter[1] E=$abc$159056$n102 Q=murax.systemDebugger_1_.dispatcher_headerShifter[0] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_headerShifter[2] E=$abc$159056$n102 Q=murax.systemDebugger_1_.dispatcher_headerShifter[1] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_headerShifter[3] E=$abc$159056$n102 Q=murax.systemDebugger_1_.dispatcher_headerShifter[2] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_headerShifter[4] E=$abc$159056$n102 Q=murax.systemDebugger_1_.dispatcher_headerShifter[3] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_headerShifter[5] E=$abc$159056$n102 Q=murax.systemDebugger_1_.dispatcher_headerShifter[4] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_headerShifter[6] E=$abc$159056$n102 Q=murax.systemDebugger_1_.dispatcher_headerShifter[5] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_headerShifter[7] E=$abc$159056$n102 Q=murax.systemDebugger_1_.dispatcher_headerShifter[6] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment E=$abc$159056$n102 Q=murax.systemDebugger_1_.dispatcher_headerShifter[7] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[3] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[2] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[4] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[3] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[5] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[4] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[6] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[5] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[7] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[6] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[8] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[7] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[9] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[8] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[10] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[9] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[11] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[10] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[12] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[11] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[13] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[12] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[14] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[13] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[15] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[14] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[16] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[15] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[17] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[16] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[18] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[17] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[19] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[18] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[20] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[19] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[21] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[20] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[22] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[21] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[23] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[22] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[24] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[23] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[25] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[24] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[26] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[25] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[27] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[26] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[28] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[27] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[29] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[28] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[30] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[29] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[31] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[30] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[32] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[31] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[33] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[32] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[34] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[33] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[35] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[34] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[36] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[35] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[37] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[36] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[38] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[37] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[39] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[38] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[40] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[39] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[41] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[40] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[42] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[41] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[43] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[42] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[44] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[43] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[45] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[44] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[46] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[45] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[47] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[46] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[48] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[47] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[49] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[48] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[50] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[49] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[51] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[50] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[52] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[51] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[53] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[52] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[54] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[53] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[55] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[54] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[56] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[55] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[57] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[56] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[58] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[57] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[59] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[58] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[60] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[59] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[61] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[60] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[62] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[61] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[63] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[62] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_._zz_3_ E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[63] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[65] E=$abc$159056$n106 Q=murax.systemDebugger_1_._zz_3_ .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[66] E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[65] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment E=$abc$159056$n106 Q=murax.systemDebugger_1_.dispatcher_dataShifter[66] .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4448|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC_USE_SUB_LESS E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BRANCH_DO E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_DO .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_117_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_ALU_CTRL[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_237_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_ALU_CTRL[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_IS_CSR E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_IS_CSR .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.system_cpu.execute_to_memory_ENV_CTRL Q=murax.system_cpu.memory_to_writeBack_ENV_CTRL .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_ENV_CTRL E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_ENV_CTRL .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_9_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_ENV_CTRL .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_275_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SHIFT_CTRL[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_273_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SHIFT_CTRL[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC1[0] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC1[1] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC1[2] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC1[3] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC1[4] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n12588 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[5] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n12590 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[6] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n12592 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[7] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n12594 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[8] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n12596 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[9] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n12598 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[10] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n12600 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[11] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2617 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[12] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2620 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[13] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n3337 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[14] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2623 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[15] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n3340 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[16] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2626 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[17] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2629 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[18] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2632 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[19] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2635 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[20] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2638 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[21] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2641 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[22] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2644 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[23] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2647 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[24] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2650 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[25] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2653 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[26] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n3343 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[27] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2656 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[28] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2659 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[29] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2665 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[30] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2662 E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC1[31] R=$abc$159056$n1 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC_LESS_UNSIGNED E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC_LESS_UNSIGNED .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_CSR_WRITE_OPCODE E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_CSR_WRITE_OPCODE .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[0] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[1] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[2] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[3] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[4] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[5] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[6] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[7] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[8] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[9] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[10] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[11] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[12] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[13] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[14] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[15] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[16] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[17] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[18] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[19] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[20] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[21] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[22] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[23] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[24] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[25] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[26] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[27] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[28] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[29] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[30] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_SRC2[31] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_SRC2[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_DO_EBREAK E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_DO_EBREAK .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[0] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[1] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[2] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[3] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[4] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[5] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[6] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[7] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[8] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[9] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[10] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[11] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[12] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[13] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[14] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[15] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[16] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[17] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[18] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[19] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[20] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[21] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[22] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[23] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[24] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[25] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[26] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[27] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[28] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[29] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[30] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[31] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_PC[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.dBus_cmd_payload_wr E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[7] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[8] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[9] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[10] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[11] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[12] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_165_ E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[14] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[28] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_INSTRUCTION[29] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_INSTRUCTION[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[5] E=$abc$159056$n10665 Q=murax.system_cpu.dBus_cmd_payload_wr .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[7] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[8] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[9] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[10] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[11] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_217_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[13] E=$abc$159056$n10665 Q=murax.system_cpu._zz_165_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[14] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[15] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[16] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[17] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[18] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[19] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[20] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[21] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[22] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[23] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[24] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[25] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[26] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[27] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[28] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[29] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_99_[30] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_INSTRUCTION[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_128_ E=$abc$159056$n10665 Q=murax.system_cpu._zz_142_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[2] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[3] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[4] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[5] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[6] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[7] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[8] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[9] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[10] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[11] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[12] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[13] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[14] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[15] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[16] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[17] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[18] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[19] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[20] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[21] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[22] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[23] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[24] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[25] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[26] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[27] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[28] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[29] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[30] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_BranchPlugin_branchAdder[31] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_BRANCH_CALC[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.system_cpu.execute_to_memory_MEMORY_ENABLE Q=murax.system_cpu.memory_to_writeBack_MEMORY_ENABLE .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_MEMORY_ENABLE E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_MEMORY_ENABLE .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_MEMORY_ENABLE E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_MEMORY_ENABLE .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[0] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[1] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[2] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[3] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[4] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[5] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[6] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[7] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[8] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[9] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[10] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[11] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[12] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[13] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[14] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[15] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[16] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[17] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[18] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[19] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[20] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[21] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[22] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[23] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[24] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[25] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[26] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[27] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[28] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[29] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[30] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_60_[31] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[0] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[1] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[2] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[3] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[4] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[5] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[6] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[7] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[8] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[9] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[10] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[11] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[12] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[13] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[14] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[15] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[16] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[17] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[18] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[19] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[20] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[21] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[22] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[23] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[24] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[25] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[26] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[27] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[28] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[29] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[30] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_152_[31] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS1[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[0] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[1] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[2] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[3] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[4] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[5] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[6] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[7] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[8] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[9] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[10] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[11] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[12] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[13] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[14] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[15] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[16] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[17] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[18] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[19] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[20] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[21] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[22] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[23] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[24] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[25] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[26] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[27] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[28] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[29] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[30] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_153_[31] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_RS2[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.system_cpu.execute_to_memory_MEMORY_ADDRESS_LOW[0] Q=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.execute_to_memory_MEMORY_ADDRESS_LOW[1] Q=murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[0] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_MEMORY_ADDRESS_LOW[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.execute_SRC_ADD_SUB[1] E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_MEMORY_ADDRESS_LOW[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] Q=murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_15_[0] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_15_[1] E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_VALID Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_VALID .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.decode_to_execute_REGFILE_WRITE_VALID E=$abc$159056$n10664 Q=murax.system_cpu.execute_to_memory_REGFILE_WRITE_VALID .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=murax.system_cpu._zz_53_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_REGFILE_WRITE_VALID R=$abc$159056$n3 .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_304_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_112_ E=$abc$159056$n10665 Q=murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] E=murax.system_cpu._zz_136_ Q=murax.system_cpu._zz_138_[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] E=murax.system_cpu._zz_136_ Q=murax.system_cpu._zz_138_[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] E=murax.system_cpu._zz_136_ Q=murax.system_cpu._zz_138_[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] E=murax.system_cpu._zz_136_ Q=murax.system_cpu._zz_138_[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] E=murax.system_cpu._zz_136_ Q=murax.system_cpu._zz_138_[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$techmap\murax.system_cpu.$0\execute_LightShifterPlugin_amplitudeReg[4:0][0] E=$abc$159056$n112 Q=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n9947 E=$abc$159056$n112 Q=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$techmap\murax.system_cpu.$0\execute_LightShifterPlugin_amplitudeReg[4:0][2] E=$abc$159056$n112 Q=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$techmap\murax.system_cpu.$0\execute_LightShifterPlugin_amplitudeReg[4:0][3] E=$abc$159056$n112 Q=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$techmap\murax.system_cpu.$0\execute_LightShifterPlugin_amplitudeReg[4:0][4] E=$abc$159056$n112 Q=murax.system_cpu.execute_LightShifterPlugin_amplitudeReg[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$true E=murax.system_cpu.CsrPlugin_interruptJump Q=murax.system_cpu.CsrPlugin_mcause_exceptionCode[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$true E=murax.system_cpu.CsrPlugin_interruptJump Q=murax.system_cpu.CsrPlugin_mcause_exceptionCode[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n5472 E=murax.system_cpu.CsrPlugin_interruptJump Q=murax.system_cpu.CsrPlugin_mcause_exceptionCode[2] R=murax.system_cpu._zz_110_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_110_ E=murax.system_cpu.CsrPlugin_interruptJump Q=murax.system_cpu.CsrPlugin_mcause_exceptionCode[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[2] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[3] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[4] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[5] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[6] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[7] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[8] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[9] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[10] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[11] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[12] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[13] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[14] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[15] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[16] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[17] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[18] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[19] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[20] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[21] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[22] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[23] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[24] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[25] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[26] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[27] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[28] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[29] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[30] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_97_[31] E=$abc$159056$n115 Q=murax.system_cpu.CsrPlugin_mepc[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5616 E=$abc$159056$n120 Q=murax.system_cpu._zz_116_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5619 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5622 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5625 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5628 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5631 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5634 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5637 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5640 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5643 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5646 E=$abc$159056$n120 Q=murax.system_cpu._zz_217_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5649 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5652 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=$abc$159056$n5655 Q=murax.system_cpu._zz_99_[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5657 Q=murax.system_cpu._zz_99_[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5660 Q=murax.system_cpu._zz_99_[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5663 Q=murax.system_cpu._zz_99_[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5666 Q=murax.system_cpu._zz_99_[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5669 Q=murax.system_cpu._zz_99_[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5672 Q=murax.system_cpu._zz_99_[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5675 Q=murax.system_cpu._zz_99_[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5678 Q=murax.system_cpu._zz_99_[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n5680 Q=murax.system_cpu._zz_99_[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5683 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5686 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5689 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5692 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5695 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5698 E=$abc$159056$n120 Q=murax.system_cpu._zz_99_[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5701 E=$abc$159056$n120 Q=murax.system_cpu._zz_128_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[0] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[1] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[2] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[3] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[4] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[5] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[6] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[7] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[8] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[9] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[10] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[11] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[12] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[13] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[14] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[15] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[16] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[17] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[18] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[19] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[20] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[21] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[22] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[23] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[24] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[25] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[26] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[27] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[28] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[29] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[30] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu._zz_95_[31] E=$abc$159056$n118 Q=murax.system_cpu._zz_97_[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[0] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[1] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] E=murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready Q=murax.system_cpu._zz_95_[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3845|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.system_cpu.DebugPlugin_resetIt Q=murax.system_cpu.DebugPlugin_resetIt_regNext .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[2] Q=murax.system_cpu._zz_149_ .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5703 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[0] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5705 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[1] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5707 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[2] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5709 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5711 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5713 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5715 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5717 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5719 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5721 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5723 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5725 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5727 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5729 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5731 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5733 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5735 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5737 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5739 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5741 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5743 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5745 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5747 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5749 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5751 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5753 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5755 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5757 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5759 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5761 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5763 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n5765 E=$abc$159056$n123 Q=murax.system_cpu.DebugPlugin_busReadDataReg[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.system_cpu.DebugPlugin_isPipActive Q=murax.system_cpu.DebugPlugin_isPipActive_regNext .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n546 Q=murax.system_cpu.DebugPlugin_isPipActive .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4020|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[0] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[1] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[2] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[3] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[4] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[5] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[6] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[7] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[8] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[9] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[10] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[11] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[12] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[13] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[14] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[15] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[16] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[17] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[18] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[19] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[20] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[21] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[22] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[23] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[24] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[25] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[26] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[27] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[28] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[29] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[30] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] E=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[31] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] E=$abc$159056$n10666 Q=murax.system_uartCtrl._zz_6_ .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] E=$abc$159056$n10666 Q=murax.system_uartCtrl._zz_7_ .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[0] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] R=$abc$159056$n5 .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[1] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] R=$abc$159056$n5 .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[13] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[14] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[15] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[16] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[17] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[18] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[19] E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write E=$abc$159056$n10666 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4632|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[0] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[1] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] E=$abc$159056$n128 Q=murax.system_timer.timerB_io_limit__driver[15] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[0] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[1] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] E=$abc$159056$n131 Q=murax.system_timer.timerA_io_limit__driver[15] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n135 Q=murax.system_timer._zz_1_[0] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n135 Q=murax.system_timer._zz_1_[1] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[2] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[3] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[4] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[5] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[6] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[7] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[8] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[9] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[10] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[11] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[12] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[13] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[14] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] E=$abc$159056$n135 Q=murax.system_timer._zz_1_[15] .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5151|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[0] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[1] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[2] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[3] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[4] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[5] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[6] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[7] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[8] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[9] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[10] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[11] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[12] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[13] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[14] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[15] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[16] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[17] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[18] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[19] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[20] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[21] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[22] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[23] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[24] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[25] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[26] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[27] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[28] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[29] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[30] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] E=$abc$159056$n141 Q=murax.system_gpioACtrl.io_gpio_write__driver[31] .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4720|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.apb3Router_1_._zz_2_ Q=murax.apb3Router_1_.selIndex[0] .attr src "toplevel.v:32|../../../Murax.v:5818|../../../Murax.v:5447|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.apb3Router_1_._zz_3_ Q=murax.apb3Router_1_.selIndex[1] .attr src "toplevel.v:32|../../../Murax.v:5818|../../../Murax.v:5447|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_jtag_tck D=io_F15 E=murax.jtagBridge_1_.flowCCByToggle_1_.io_input_valid Q=murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_data_last .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:660|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=io_G15 E=murax.jtagBridge_1_.flowCCByToggle_1_.io_input_valid Q=murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_data_fragment .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:660|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_jtag_tck D=$abc$159056$n4329 E=murax.jtagBridge_1_.flowCCByToggle_1_.io_input_valid Q=murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_target .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:660|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_data_fragment E=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_valid Q=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:668|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_data_last E=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_valid Q=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:668|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.buffers_1 Q=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_hit .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:668|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[3] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[4] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[5] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[6] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[7] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[8] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[9] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[10] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[11] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[12] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[13] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[14] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[15] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[16] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[17] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[18] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[19] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[20] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[21] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[22] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[23] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[24] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[25] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[26] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[27] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[28] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[29] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[30] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[31] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] E=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[32] .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:616|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2128 E=$abc$159056$n160 Q=murax.system_drygascon128.core.cnt[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2133 E=$abc$159056$n160 Q=murax.system_drygascon128.core.cnt[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2138 E=$abc$159056$n160 Q=murax.system_drygascon128.core.cnt[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n2143 E=$abc$159056$n160 Q=murax.system_drygascon128.core.cnt[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=$abc$159056$n6286 Q=murax.system_drygascon128.core.dout[0] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6289 Q=murax.system_drygascon128.core.dout[1] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6292 Q=murax.system_drygascon128.core.dout[2] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6295 Q=murax.system_drygascon128.core.dout[3] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6298 Q=murax.system_drygascon128.core.dout[4] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6301 Q=murax.system_drygascon128.core.dout[5] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6304 Q=murax.system_drygascon128.core.dout[6] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6307 Q=murax.system_drygascon128.core.dout[7] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6310 Q=murax.system_drygascon128.core.dout[8] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6313 Q=murax.system_drygascon128.core.dout[9] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6316 Q=murax.system_drygascon128.core.dout[10] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6319 Q=murax.system_drygascon128.core.dout[11] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6322 Q=murax.system_drygascon128.core.dout[12] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6325 Q=murax.system_drygascon128.core.dout[13] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6328 Q=murax.system_drygascon128.core.dout[14] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6331 Q=murax.system_drygascon128.core.dout[15] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6334 Q=murax.system_drygascon128.core.dout[16] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6337 Q=murax.system_drygascon128.core.dout[17] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6340 Q=murax.system_drygascon128.core.dout[18] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6343 Q=murax.system_drygascon128.core.dout[19] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6346 Q=murax.system_drygascon128.core.dout[20] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6349 Q=murax.system_drygascon128.core.dout[21] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6352 Q=murax.system_drygascon128.core.dout[22] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6355 Q=murax.system_drygascon128.core.dout[23] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6358 Q=murax.system_drygascon128.core.dout[24] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6361 Q=murax.system_drygascon128.core.dout[25] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6364 Q=murax.system_drygascon128.core.dout[26] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6367 Q=murax.system_drygascon128.core.dout[27] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6370 Q=murax.system_drygascon128.core.dout[28] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6373 Q=murax.system_drygascon128.core.dout[29] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6376 Q=murax.system_drygascon128.core.dout[30] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n6379 Q=murax.system_drygascon128.core.dout[31] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:187|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n12469 E=$abc$159056$n144 Q=murax.system_drygascon128.core.absorb R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2078 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[0] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2064 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[1] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3167 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[2] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2050 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[3] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2043 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[4] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2029 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[5] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2022 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[6] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3146 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[7] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2001 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[8] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1987 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[9] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1973 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[10] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1959 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[11] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1945 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[12] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1931 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[13] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1917 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[14] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1903 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[15] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1889 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[16] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1875 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[17] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1861 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[18] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1847 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[19] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1833 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[20] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1826 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[21] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1812 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[22] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1798 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[23] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1784 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[24] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2120 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[25] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3174 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[26] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3195 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[27] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2057 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[28] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3202 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[29] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3160 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[30] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3188 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[31] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2036 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[32] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2113 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[33] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3153 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[34] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3181 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[35] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2015 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[36] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2096 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[37] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2008 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[38] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2071 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[39] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1994 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[40] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1980 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[41] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1966 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[42] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1952 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[43] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1938 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[44] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1924 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[45] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1910 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[46] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1896 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[47] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1882 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[48] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1868 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[49] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1854 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[50] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1840 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[51] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3139 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[52] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1819 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[53] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1805 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[54] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1791 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[55] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1777 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[56] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1770 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[57] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1763 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[58] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1756 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[59] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1749 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[60] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1742 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[61] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1735 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[62] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1728 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[63] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1721 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[64] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1714 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[65] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1707 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[66] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1700 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[67] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3132 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[68] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1693 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[69] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3125 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[70] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1686 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[71] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1679 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[72] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1672 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[73] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1665 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[74] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1658 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[75] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1651 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[76] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1644 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[77] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1637 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[78] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1630 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[79] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1623 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[80] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1616 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[81] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1609 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[82] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1602 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[83] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3118 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[84] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1595 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[85] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1588 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[86] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3111 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[87] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1581 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[88] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1574 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[89] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1567 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[90] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1466 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[91] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1560 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[92] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1459 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[93] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1553 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[94] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1452 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[95] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1546 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[96] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1445 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[97] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1539 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[98] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1438 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[99] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1532 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[100] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3097 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[101] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1525 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[102] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3090 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[103] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1518 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[104] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1431 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[105] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3104 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[106] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1424 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[107] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1511 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[108] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1417 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[109] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1504 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[110] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1410 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[111] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1497 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[112] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1403 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[113] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1490 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[114] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1396 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[115] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1483 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[116] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1389 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[117] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1476 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[118] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1382 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[119] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1471 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[120] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2178 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[121] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2106 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[122] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2101 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[123] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1377 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[124] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1369 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[125] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2083 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[126] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3831 E=$abc$159056$n147 Q=murax.system_drygascon128.core.r[127] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2146 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[0] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2149 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[1] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2152 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[2] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2155 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[3] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2158 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[4] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2161 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[5] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2164 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[6] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2167 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[7] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2170 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[8] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2173 E=$abc$159056$n151 Q=murax.system_drygascon128.core.d[9] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[32] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[0] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[33] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[1] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[34] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[2] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[35] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[3] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[36] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[4] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[37] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[5] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[38] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[6] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[39] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[7] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[40] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[8] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[41] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[9] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[42] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[10] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[43] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[11] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[44] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[12] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[45] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[13] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[46] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[14] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[47] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[15] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[48] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[16] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[49] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[17] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[50] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[18] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[51] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[19] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[52] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[20] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[53] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[21] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[54] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[22] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[55] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[23] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[56] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[24] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[57] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[25] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[58] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[26] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[59] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[27] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[60] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[28] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[61] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[29] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[62] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[30] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[63] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[31] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[64] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[32] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[65] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[33] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[66] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[34] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[67] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[35] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[68] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[36] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[69] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[37] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[70] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[38] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[71] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[39] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[72] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[40] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[73] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[41] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[74] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[42] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[75] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[43] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[76] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[44] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[77] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[45] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[78] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[46] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[79] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[47] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[80] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[48] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[81] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[49] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[82] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[50] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[83] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[51] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[84] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[52] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[85] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[53] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[86] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[54] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[87] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[55] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[88] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[56] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[89] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[57] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[90] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[58] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[91] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[59] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[92] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[60] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[93] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[61] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[94] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[62] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[95] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[63] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[96] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[64] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[97] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[65] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[98] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[66] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[99] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[67] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[100] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[68] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[101] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[69] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[102] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[70] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[103] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[71] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[104] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[72] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[105] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[73] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[106] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[74] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[107] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[75] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[108] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[76] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[109] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[77] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[110] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[78] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[111] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[79] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[112] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[80] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[113] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[81] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[114] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[82] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[115] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[83] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[116] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[84] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[117] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[85] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[118] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[86] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[119] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[87] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[120] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[88] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[121] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[89] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[122] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[90] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[123] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[91] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[124] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[92] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[125] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[93] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[126] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[94] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_drygascon128.core.x[127] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[95] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[96] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[97] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[98] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[99] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[100] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[101] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[102] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[103] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[104] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[105] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[106] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[107] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[108] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[109] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[110] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[111] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[112] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[113] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[114] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[115] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[116] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[117] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[118] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[119] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[120] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[121] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[122] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[123] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[124] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[125] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[126] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] E=$abc$159056$n156 Q=murax.system_drygascon128.core.x[127] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1361 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[0] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1355 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[1] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1349 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[2] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3077 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[3] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1343 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[4] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1340 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[5] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1334 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[6] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1328 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[7] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1325 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[8] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1319 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[9] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1313 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[10] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3068 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[11] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1307 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[12] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1301 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[13] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1295 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[14] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1289 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[15] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1283 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[16] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1277 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[17] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1271 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[18] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1265 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[19] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1259 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[20] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3062 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[21] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3056 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[22] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3050 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[23] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3044 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[24] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3038 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[25] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3032 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[26] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3026 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[27] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3020 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[28] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3083 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[29] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1337 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[30] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1352 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[31] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1331 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[32] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1364 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[33] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3071 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[34] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3080 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[35] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1322 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[36] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1372 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[37] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1316 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[38] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1346 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[39] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1310 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[40] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1358 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[41] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3065 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[42] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3074 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[43] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1304 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[44] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1298 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[45] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1292 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[46] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1286 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[47] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1280 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[48] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1274 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[49] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1268 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[50] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1262 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[51] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1256 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[52] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3059 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[53] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3053 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[54] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3047 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[55] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3041 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[56] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3035 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[57] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3029 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[58] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3023 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[59] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3017 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[60] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3014 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[61] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3011 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[62] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3008 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[63] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3005 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[64] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3002 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[65] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2999 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[66] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2996 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[67] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2993 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[68] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2990 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[69] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2987 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[70] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2984 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[71] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2981 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[72] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2978 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[73] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2975 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[74] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2972 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[75] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2969 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[76] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2966 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[77] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2963 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[78] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2960 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[79] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2957 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[80] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2954 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[81] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2951 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[82] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2948 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[83] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2945 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[84] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2942 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[85] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2939 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[86] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2936 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[87] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1247 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[88] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1244 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[89] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1250 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[90] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n30 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[91] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n45 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[92] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n48 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[93] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1211 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[94] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1235 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[95] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1253 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[96] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3922 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[97] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4063 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[98] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4084 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[99] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3958 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[100] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3853 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[101] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4015 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[102] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3454 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[103] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3472 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[104] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3481 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[105] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3487 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[106] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4090 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[107] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1241 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[108] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4033 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[109] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4087 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[110] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3505 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[111] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3559 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[112] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n1238 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[113] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3574 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[114] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3586 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[115] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3592 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[116] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3595 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[117] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3601 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[118] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3604 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[119] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3610 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[120] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4072 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[121] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4069 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[122] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3862 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[123] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4078 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[124] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4096 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[125] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3865 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[126] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3874 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[127] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4075 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[128] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n15 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[129] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3886 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[130] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3895 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[131] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3850 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[132] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3667 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[133] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3676 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[134] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4060 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[135] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3688 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[136] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4099 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[137] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3700 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[138] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4054 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[139] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3703 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[140] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4057 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[141] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3712 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[142] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3868 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[143] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n12 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[144] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3730 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[145] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4102 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[146] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4081 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[147] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3889 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[148] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3892 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[149] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3841 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[150] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3856 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[151] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3883 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[152] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3769 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[153] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3877 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[154] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4066 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[155] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3844 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[156] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4105 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[157] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3859 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[158] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3880 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[159] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4093 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[160] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3814 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[161] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3823 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[162] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3847 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[163] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3871 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[164] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3835 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[165] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3838 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[166] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3898 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[167] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3901 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[168] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3904 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[169] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3907 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[170] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3910 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[171] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3913 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[172] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3916 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[173] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3919 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[174] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3925 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[175] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3928 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[176] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3931 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[177] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3934 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[178] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3937 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[179] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3940 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[180] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3943 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[181] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3946 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[182] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3949 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[183] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3952 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[184] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3955 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[185] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3961 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[186] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3964 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[187] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3967 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[188] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3970 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[189] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3973 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[190] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3976 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[191] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3979 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[192] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3982 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[193] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3985 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[194] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3988 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[195] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3991 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[196] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3994 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[197] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3997 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[198] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4000 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[199] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4003 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[200] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4006 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[201] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4009 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[202] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4012 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[203] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4018 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[204] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4021 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[205] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4024 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[206] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3457 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[207] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3460 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[208] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3463 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[209] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3466 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[210] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3469 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[211] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3475 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[212] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3478 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[213] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3484 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[214] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4027 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[215] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4030 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[216] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3490 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[217] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3493 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[218] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3496 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[219] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3499 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[220] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3502 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[221] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4036 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[222] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4039 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[223] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3508 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[224] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3511 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[225] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3514 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[226] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3517 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[227] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3520 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[228] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3523 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[229] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3526 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[230] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3529 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[231] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3532 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[232] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3535 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[233] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3538 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[234] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3541 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[235] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3544 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[236] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3547 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[237] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3550 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[238] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3553 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[239] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3556 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[240] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3562 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[241] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4042 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[242] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3565 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[243] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3568 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[244] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3571 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[245] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3577 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[246] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3580 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[247] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3583 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[248] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3589 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[249] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4045 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[250] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3598 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[251] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3607 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[252] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3613 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[253] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3616 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[254] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3619 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[255] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4048 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[256] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n4051 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[257] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3622 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[258] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3625 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[259] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3628 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[260] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3631 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[261] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3634 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[262] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3637 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[263] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3640 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[264] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3643 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[265] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3646 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[266] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3649 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[267] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3652 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[268] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3655 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[269] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3658 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[270] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3661 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[271] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3664 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[272] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3670 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[273] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3673 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[274] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3679 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[275] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3682 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[276] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3685 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[277] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3691 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[278] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3694 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[279] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3697 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[280] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3706 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[281] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3709 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[282] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3715 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[283] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3718 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[284] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3721 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[285] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3724 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[286] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3778 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[287] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3727 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[288] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3781 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[289] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3733 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[290] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3784 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[291] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3736 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[292] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3787 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[293] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3739 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[294] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3790 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[295] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3742 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[296] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3793 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[297] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3745 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[298] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3796 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[299] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3748 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[300] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3799 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[301] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3751 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[302] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3802 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[303] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3754 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[304] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3805 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[305] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3757 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[306] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3808 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[307] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3760 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[308] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3811 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[309] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3763 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[310] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3817 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[311] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3766 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[312] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3820 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[313] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3772 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[314] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3826 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[315] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3775 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[316] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n3205 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[317] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2089 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[318] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=$abc$159056$n2086 E=$abc$159056$n161 Q=murax.system_drygascon128.core.c[319] .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESS C=io_mainClk D=$abc$159056$n3207 E=$abc$159056$n164 Q=murax.system_drygascon128.core.idle S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5218|../../../src/drygascon128.v:219|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[0] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[0] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[1] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[1] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[2] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[2] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[3] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[3] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[4] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[4] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[5] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[5] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[6] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[6] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[7] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[7] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[8] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[8] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[9] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[9] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[10] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[10] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[11] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[11] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[12] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[12] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[13] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[13] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[14] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[14] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerB.$add$../../../Murax.v:972$126_Y[15] E=$abc$159056$n167 Q=murax.system_timer.timerB.counter[15] R=murax.system_timer._zz_10_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[0] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[0] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[1] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[1] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[2] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[2] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[3] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[3] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[4] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[4] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[5] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[5] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[6] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[6] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[7] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[7] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[8] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[8] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[9] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[9] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[10] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[10] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[11] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[11] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[12] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[12] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[13] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[13] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[14] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[14] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFESR C=io_mainClk D=$techmap\murax.system_timer.timerA.$add$../../../Murax.v:972$126_Y[15] E=$abc$159056$n170 Q=murax.system_timer.timerA.counter[15] R=murax.system_timer._zz_8_ .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:970|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[0] Q=murax.system_timer.prescaler_1_.counter[0] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFESR C=io_mainClk D=$abc$159056$n9957 E=$abc$159056$n173 Q=murax.system_timer.prescaler_1_.counter[1] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[2] Q=murax.system_timer.prescaler_1_.counter[2] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[3] Q=murax.system_timer.prescaler_1_.counter[3] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[4] Q=murax.system_timer.prescaler_1_.counter[4] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[5] Q=murax.system_timer.prescaler_1_.counter[5] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[6] Q=murax.system_timer.prescaler_1_.counter[6] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[7] Q=murax.system_timer.prescaler_1_.counter[7] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[8] Q=murax.system_timer.prescaler_1_.counter[8] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[9] Q=murax.system_timer.prescaler_1_.counter[9] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[10] Q=murax.system_timer.prescaler_1_.counter[10] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[11] Q=murax.system_timer.prescaler_1_.counter[11] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[12] Q=murax.system_timer.prescaler_1_.counter[12] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[13] Q=murax.system_timer.prescaler_1_.counter[13] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[14] Q=murax.system_timer.prescaler_1_.counter[14] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFSR C=io_mainClk D=$techmap\murax.system_timer.prescaler_1_.$add$../../../Murax.v:931$117_Y[15] Q=murax.system_timer.prescaler_1_.counter[15] R=$abc$159056$n171 .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4977|../../../Murax.v:930|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_target Q=murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.buffers_0 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:647|../../../Murax.v:115|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.buffers_0 Q=murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.buffers_1 .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:647|../../../Murax.v:115|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n432 Q=murax.system_drygascon128.core.state[0] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n930 Q=murax.system_drygascon128.core.state[1] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n1143 Q=murax.system_drygascon128.core.state[2] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n12433 Q=murax.system_drygascon128.core.state[3] .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value E=$abc$159056$n181 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value E=$abc$159056$n186 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value E=$abc$159056$n191 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value E=$abc$159056$n196 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[3] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value E=$abc$159056$n202 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[4] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value E=$abc$159056$n207 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[5] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value E=$abc$159056$n212 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[6] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFFE C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value E=$abc$159056$n217 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[7] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:8" .gate SB_DFF C=io_mainClk D=$abc$159056$n4610 Q=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n4612 Q=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n4614 Q=murax.system_uartCtrl.uartCtrl_1_.rx.bitCounter_value[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n8803 Q=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n8806 Q=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n8809 Q=murax.system_uartCtrl.uartCtrl_1_.rx.bitTimer_counter[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:475|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n4809 Q=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[0] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:281|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n4811 Q=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[1] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:281|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFF C=io_mainClk D=$abc$159056$n4813 Q=murax.system_uartCtrl.uartCtrl_1_.tx.tickCounter_value[2] .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:281|/usr/local/bin/../share/yosys/ice40/cells_map.v:2" .gate SB_DFFR C=io_mainClk D=murax.system_mainBusDecoder_logic_noHit Q=murax.system_mainBusDecoder_logic_rspNoHit R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5951|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=$abc$159056$n218 E=$abc$159056$n220 Q=murax.system_mainBusDecoder_logic_rspPending R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5951|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFS C=io_mainClk D=$abc$159056$n4937 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_ready S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5951|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFR C=io_mainClk D=$abc$159056$n4936 Q=murax.system_cpu_dBus_cmd_halfPipe_regs_valid R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5951|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n221 Q=murax._zz_2_ R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5994|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5051 E=$abc$159056$n222 Q=murax.systemDebugger_1_.dispatcher_headerLoaded R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4422|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5054 E=$abc$159056$n226 Q=murax.systemDebugger_1_.dispatcher_counter[0] R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4422|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5056 E=$abc$159056$n232 Q=murax.systemDebugger_1_.dispatcher_counter[1] R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4422|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5058 E=$abc$159056$n226 Q=murax.systemDebugger_1_.dispatcher_counter[2] R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4422|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5049 E=$abc$159056$n235 Q=murax.systemDebugger_1_.dispatcher_dataLoaded R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5693|../../../Murax.v:4422|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n2508 E=$abc$159056$n2504 Q=murax.system_cpu._zz_150_[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n3293 E=$abc$159056$n2504 Q=murax.system_cpu._zz_150_[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n2511 E=$abc$159056$n2504 Q=murax.system_cpu._zz_150_[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[7] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[8] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[9] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[10] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[11] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[12] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[12] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[13] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[14] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[14] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[28] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[28] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_INSTRUCTION[29] Q=murax.system_cpu.memory_to_writeBack_INSTRUCTION[29] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[0] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[1] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[2] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[3] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[4] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[4] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[5] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[5] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[6] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[6] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[7] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[7] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[8] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[8] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[9] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[9] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[10] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[10] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[11] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[11] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[12] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[12] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[13] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[13] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[14] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[14] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[15] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[15] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[16] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[16] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[17] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[17] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[18] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[18] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[19] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[19] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[20] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[20] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[21] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[21] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[22] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[22] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[23] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[23] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[24] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[24] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[25] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[25] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[26] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[26] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[27] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[27] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[28] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[28] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[29] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[29] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[30] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[30] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[31] Q=murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[31] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu._zz_136_ Q=murax.system_cpu._zz_137_ R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5607 E=$abc$159056$n240 Q=murax.system_cpu.execute_LightShifterPlugin_isActive R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFS C=io_mainClk D=$false Q=murax.system_cpu._zz_125_ S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFER C=io_mainClk D=murax.system_cpu._zz_206_ E=$abc$159056$n245 Q=murax.system_cpu.CsrPlugin_mie_MSIE R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu._zz_205_ E=$abc$159056$n245 Q=murax.system_cpu.CsrPlugin_mie_MTIE R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu._zz_208_ E=$abc$159056$n245 Q=murax.system_cpu.CsrPlugin_mie_MEIE R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu._zz_206_ E=$abc$159056$n249 Q=murax.system_cpu.CsrPlugin_mip_MSIP R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.timerInterrupt Q=murax.system_cpu.CsrPlugin_mip_MTIP R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.externalInterrupt Q=murax.system_cpu.CsrPlugin_mip_MEIP R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFS C=io_mainClk D=$abc$159056$n5599 Q=murax.system_cpu.CsrPlugin_mstatus_MPP[0] S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFS C=io_mainClk D=$abc$159056$n5602 Q=murax.system_cpu.CsrPlugin_mstatus_MPP[1] S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFR C=io_mainClk D=$abc$159056$n5594 Q=murax.system_cpu.CsrPlugin_mstatus_MPIE R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n5588 Q=murax.system_cpu.CsrPlugin_mstatus_MIE R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n5579 Q=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n5582 Q=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n5585 Q=murax.system_cpu.IBusSimplePlugin_rspJoin_discardCounter[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[0] Q=murax.system_cpu.IBusSimplePlugin_pendingCmd[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[1] Q=murax.system_cpu.IBusSimplePlugin_pendingCmd[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_pendingCmdNext[2] Q=murax.system_cpu.IBusSimplePlugin_pendingCmd[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5576 E=$abc$159056$n251 Q=murax.system_cpu.IBusSimplePlugin_injector_decodeRemoved R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5575 E=$abc$159056$n252 Q=murax.system_cpu.IBusSimplePlugin_injector_nextPcCalc_valids_2 R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5573 E=$abc$159056$n254 Q=murax.system_cpu.IBusSimplePlugin_injector_nextPcCalc_valids_1 R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready E=$abc$159056$n256 Q=murax.system_cpu.IBusSimplePlugin_injector_nextPcCalc_valids_0 R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5571 E=$abc$159056$n252 Q=murax.system_cpu._zz_96_ R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5570 E=$abc$159056$n254 Q=murax.system_cpu._zz_94_ R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5569 E=$abc$159056$n256 Q=murax.system_cpu._zz_92_ R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=$true Q=murax.system_cpu._zz_86_ R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=murax.system_cpu._zz_161_ E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_inc R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$false E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$false E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[2] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[3] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[4] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[5] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[6] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[7] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[8] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[9] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[10] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[11] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[12] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[13] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[14] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[15] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[16] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[17] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[18] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[19] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[20] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[21] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[22] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[23] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[24] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[25] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[26] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[27] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[28] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[29] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[30] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFES C=io_mainClk D=murax.system_cpu.IBusSimplePlugin_fetchPc_pc[31] E=murax.system_cpu.IBusSimplePlugin_fetchPc_samplePcNext Q=murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:28" .gate SB_DFFS C=io_mainClk D=$abc$159056$n5562 Q=murax.system_cpu.CsrPlugin_privilege[0] S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFS C=io_mainClk D=$abc$159056$n5565 Q=murax.system_cpu.CsrPlugin_privilege[1] S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFR C=io_mainClk D=$abc$159056$n5559 Q=murax.system_cpu.writeBack_arbitration_isValid R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5558 E=$abc$159056$n262 Q=murax.system_cpu.memory_arbitration_isValid R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5557 E=$abc$159056$n265 Q=murax.system_cpu.execute_arbitration_isValid R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:3599|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=$abc$159056$n5778 Q=murax.system_cpu.DebugPlugin_haltedByBreak R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4038|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=murax.systemDebugger_1_.dispatcher_dataShifter[36] E=$abc$159056$n272 Q=murax.system_cpu.DebugPlugin_stepIt R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4038|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=$abc$159056$n5769 Q=murax.system_cpu.DebugPlugin_haltIt R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4038|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=$abc$159056$n5766 E=$abc$159056$n285 Q=murax.system_cpu.DebugPlugin_resetIt R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:4038|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n218 E=$abc$159056$n220 Q=murax.system_mainBusArbiter.rspPending R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5621|../../../Murax.v:1081|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_cpu_dBus_cmd_halfPipe_regs_valid E=$abc$159056$n218 Q=murax.system_mainBusArbiter.rspTarget R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5621|../../../Murax.v:1081|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_valid Q=murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_valid R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4607|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n6139 Q=murax.system_apbBridge.state R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4607|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFS C=io_mainClk D=$abc$159056$n6137 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_ready S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4607|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFR C=io_mainClk D=$abc$159056$n6136 Q=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5725|../../../Murax.v:4607|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFES C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n4480 Q=murax.system_drygascon128.rounds[0] S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:28" .gate SB_DFFES C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n4480 Q=murax.system_drygascon128.rounds[1] S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:28" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] E=$abc$159056$n4480 Q=murax.system_drygascon128.rounds[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFES C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] E=$abc$159056$n4480 Q=murax.system_drygascon128.rounds[3] S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:28" .gate SB_DFFR C=io_mainClk D=$abc$159056$n4479 Q=murax.system_drygascon128.core_read R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] E=$abc$159056$n4480 Q=murax.system_drygascon128.ds[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] E=$abc$159056$n4480 Q=murax.system_drygascon128.ds[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] E=$abc$159056$n4480 Q=murax.system_drygascon128.ds[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] E=$abc$159056$n4480 Q=murax.system_drygascon128.ds[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=$abc$159056$n6211 Q=murax.system_drygascon128.start R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5788|../../../Murax.v:5276|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] E=$abc$159056$n288 Q=murax.system_timer.timerBBridge_clearsEnable R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5107|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n292 Q=murax.system_timer.interruptCtrl_1__io_masks__driver[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5107|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n292 Q=murax.system_timer.interruptCtrl_1__io_masks__driver[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5107|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n288 Q=murax.system_timer.timerBBridge_ticksEnable[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5107|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n288 Q=murax.system_timer.timerBBridge_ticksEnable[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5107|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] E=$abc$159056$n297 Q=murax.system_timer.timerABridge_clearsEnable R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5107|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n297 Q=murax.system_timer.timerABridge_ticksEnable[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5107|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n297 Q=murax.system_timer.timerABridge_ticksEnable[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5107|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n300 Q=murax.system_uartCtrl.bridge_interruptCtrl_writeIntEnable R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4912|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n300 Q=murax.system_uartCtrl.bridge_interruptCtrl_readIntEnable R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4912|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_6_ E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl._zz_7_ E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[4] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[5] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[6] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[7] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[8] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[9] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[10] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[11] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[12] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[13] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[14] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[15] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[16] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[17] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[18] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[19] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[20] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[21] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[22] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[23] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[24] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[25] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[26] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[27] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[28] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[29] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[30] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] E=$abc$159056$n304 Q=murax.system_gpioACtrl.io_gpio_writeEnable__driver[31] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5745|../../../Murax.v:4700|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFS C=io_mainClk D=$abc$159056$n1122 Q=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[0] S=murax.resetCtrl_systemReset .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFR C=io_mainClk D=$abc$159056$n984 Q=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[1] R=murax.resetCtrl_systemReset .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n1119 Q=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[2] R=murax.resetCtrl_systemReset .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n919 Q=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_state[3] R=murax.resetCtrl_systemReset .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n4504 Q=murax.system_ram._zz_1_ R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5713|../../../Murax.v:4520|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_valid Q=murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid R=murax.resetCtrl_mainClkReset .attr src "toplevel.v:32|../../../Murax.v:5677|../../../Murax.v:4149|../../../Murax.v:676|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=$abc$159056$n6283 E=$abc$159056$n306 Q=murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5648|../../../Murax.v:2004|../../../Murax.v:603|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n8756 E=$abc$159056$n167 Q=murax.system_timer.timerB.inhibitFull R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4993|../../../Murax.v:957|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFER C=io_mainClk D=$abc$159056$n8757 E=$abc$159056$n170 Q=murax.system_timer.timerA.inhibitFull R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:4984|../../../Murax.v:957|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=$abc$159056$n10841 Q=murax.system_timer.interruptCtrl_1_.pendings[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5002|../../../Murax.v:993|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n10843 Q=murax.system_timer.interruptCtrl_1_.pendings[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5775|../../../Murax.v:5002|../../../Murax.v:993|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ E=$abc$159056$n10878 Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_risingOccupancy R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[0] Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[1] Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[2] Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[3] Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_value[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_valueNext[0] Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_valueNext[1] Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_valueNext[2] Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_valueNext[3] Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n4346 Q=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_2_ R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4819|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8759 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=$abc$159056$n8761 E=$abc$159056$n309 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8763 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8765 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8767 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[4] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8769 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[5] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8771 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[6] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8773 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[7] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8775 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[8] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8777 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[9] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8779 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[10] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8781 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[11] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8783 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[12] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8785 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[13] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8787 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[14] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8789 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[15] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8791 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[16] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8793 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[17] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8795 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[18] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n8797 Q=murax.system_uartCtrl.uartCtrl_1_.clockDivider_counter[19] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:772|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFER C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ E=$abc$159056$n10888 Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_risingOccupancy R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:27" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[0] Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[1] Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[2] Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[3] Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_value[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_valueNext[0] Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_valueNext[1] Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_valueNext[2] Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_valueNext[3] Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[3] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n4355 Q=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_2_ R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4832|../../../Murax.v:898|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick Q=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_tick R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:406|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n217 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_validReg R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:406|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFS C=io_mainClk D=$abc$159056$n4539 Q=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_value S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:406|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFES C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_samples_1 E=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick Q=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_samples_2 S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:406|/usr/local/bin/../share/yosys/ice40/cells_map.v:28" .gate SB_DFFES C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_1 E=murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick Q=murax.system_uartCtrl.uartCtrl_1_.rx.sampler_samples_1 S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:406|/usr/local/bin/../share/yosys/ice40/cells_map.v:28" .gate SB_DFFS C=io_mainClk D=$abc$159056$n1164 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[0] S=murax.resetCtrl_systemReset .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFR C=io_mainClk D=$abc$159056$n1148 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[1] R=murax.resetCtrl_systemReset .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n935 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[2] R=murax.resetCtrl_systemReset .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=$abc$159056$n914 Q=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_state[3] R=murax.resetCtrl_systemReset .attr src "/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFS C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd Q=murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext S=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:235|/usr/local/bin/../share/yosys/ice40/cells_map.v:18" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_valueNext[0] Q=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[0] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:235|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_valueNext[1] Q=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[1] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:235|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_valueNext[2] Q=murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_value[2] R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:726|../../../Murax.v:235|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_0 Q=murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_1 R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:357|../../../Murax.v:95|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_DFFR C=io_mainClk D=io_B10 Q=murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_0 R=murax.resetCtrl_systemReset .attr src "toplevel.v:32|../../../Murax.v:5761|../../../Murax.v:4804|../../../Murax.v:738|../../../Murax.v:357|../../../Murax.v:95|/usr/local/bin/../share/yosys/ice40/cells_map.v:17" .gate SB_CARRY CI=$abc$159056$n55 CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101424.$auto$alumacc.cc:474:replace_alu$103541.C[4] I0=$abc$159056$n4822 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101424.$auto$alumacc.cc:474:replace_alu$103541.C[4] CO=$abc$159056$n9971 I0=$abc$159056$n59 I1=$false .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[10] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[11] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[11] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[12] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[12] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[13] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[13] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[14] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[14] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[15] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[15] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[16] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[16] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[17] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[17] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[18] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[18] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[19] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[19] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[20] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[20] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[21] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[21] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[22] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[22] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[23] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[23] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[24] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[24] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[25] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[25] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[26] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[26] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[27] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[27] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[28] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[28] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[29] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[29] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[30] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$abc$159056$n64 CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[3] I0=$abc$159056$n4821 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[30] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[31] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[31] CO=$abc$159056$n9974 I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[3] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[4] I0=$abc$159056$n67 I1=$false .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[4] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[5] I0=$abc$159056$n4825 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[5] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[6] I0=$abc$159056$n4827 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[6] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[7] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[7] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[8] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[8] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[9] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[9] CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$ge$/usr/local/bin/../share/yosys/techmap.v:301$101428.$auto$alumacc.cc:474:replace_alu$103591.C[10] I0=$abc$159056$n4829 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:301|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$abc$159056$n4817 I2=$true I3=$true O=$abc$159056$n4818 .attr src "/usr/local/bin/../share/yosys/techmap.v:302|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$abc$159056$n55 CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$sub$/usr/local/bin/../share/yosys/techmap.v:302$101425.$auto$alumacc.cc:474:replace_alu$103554.C[4] I0=$abc$159056$n4822 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:302|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$abc$159056$n59 I2=$false I3=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$sub$/usr/local/bin/../share/yosys/techmap.v:302$101425.$auto$alumacc.cc:474:replace_alu$103554.C[4] O=$abc$159056$n4824 .attr src "/usr/local/bin/../share/yosys/techmap.v:302|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$sub$/usr/local/bin/../share/yosys/techmap.v:302$101425.$auto$alumacc.cc:474:replace_alu$103554.C[4] CO=$abc$159056$n9970 I0=$abc$159056$n59 I1=$false .attr src "/usr/local/bin/../share/yosys/techmap.v:302|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$false I2=$true I3=$abc$159056$n9970 O=$abc$159056$n4826 .attr src "/usr/local/bin/../share/yosys/techmap.v:302|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_LUT4 I0=$false I1=$abc$159056$n4819 I2=$true I3=$true O=$abc$159056$n4830 .attr src "/usr/local/bin/../share/yosys/techmap.v:302|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_CARRY CI=$abc$159056$n64 CO=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$sub$/usr/local/bin/../share/yosys/techmap.v:302$101429.$auto$alumacc.cc:474:replace_alu$103604.C[3] I0=$abc$159056$n4821 I1=$true .attr src "/usr/local/bin/../share/yosys/techmap.v:302|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:47" .gate SB_LUT4 I0=$false I1=$abc$159056$n67 I2=$false I3=$techmap$techmap$techmap\murax.system_drygascon128.core.$mod$../../../src/drygascon128.v:240$1046.div_mod.div_mod_u.$sub$/usr/local/bin/../share/yosys/techmap.v:302$101429.$auto$alumacc.cc:474:replace_alu$103604.C[3] O=$abc$159056$n4836 .attr src "/usr/local/bin/../share/yosys/techmap.v:302|/usr/local/bin/../share/yosys/techmap.v:330|/usr/local/bin/../share/yosys/techmap.v:380|../../../src/drygascon128.v:240|../../../Murax.v:5218|../../../Murax.v:5788|toplevel.v:32|/usr/local/bin/../share/yosys/ice40/arith_map.v:53" .param LUT_INIT 0110100110010110 .gate SB_GB GLOBAL_BUFFER_OUTPUT=io_jtag_tck USER_SIGNAL_TO_GLOBAL_BUFFER=io_H16 .attr src "toplevel.v:25" .gate SB_GB GLOBAL_BUFFER_OUTPUT=io_mainClk USER_SIGNAL_TO_GLOBAL_BUFFER=io_J3 .attr src "toplevel.v:20" .gate SB_RAM40_4K MASK[0]=$abc$159056$n10628 MASK[1]=$abc$159056$n10628 MASK[2]=$abc$159056$n10628 MASK[3]=$abc$159056$n10628 MASK[4]=$abc$159056$n10628 MASK[5]=$abc$159056$n10628 MASK[6]=$abc$159056$n10628 MASK[7]=$abc$159056$n10628 MASK[8]=$abc$159056$n10628 MASK[9]=$abc$159056$n10628 MASK[10]=$abc$159056$n10628 MASK[11]=$abc$159056$n10628 MASK[12]=$abc$159056$n10628 MASK[13]=$abc$159056$n10628 MASK[14]=$abc$159056$n10628 MASK[15]=$abc$159056$n10628 RADDR[0]=murax.system_cpu._zz_73_[20] RADDR[1]=murax.system_cpu._zz_73_[21] RADDR[2]=murax.system_cpu._zz_73_[22] RADDR[3]=murax.system_cpu._zz_73_[23] RADDR[4]=murax.system_cpu._zz_73_[24] RADDR[5]=$false RADDR[6]=$false RADDR[7]=$false RADDR[8]=$false RADDR[9]=$false RADDR[10]=$false RCLK=io_mainClk RCLKE=$true RDATA[0]=murax.system_cpu._zz_153_[0] RDATA[1]=murax.system_cpu._zz_153_[1] RDATA[2]=murax.system_cpu._zz_153_[2] RDATA[3]=murax.system_cpu._zz_153_[3] RDATA[4]=murax.system_cpu._zz_153_[4] RDATA[5]=murax.system_cpu._zz_153_[5] RDATA[6]=murax.system_cpu._zz_153_[6] RDATA[7]=murax.system_cpu._zz_153_[7] RDATA[8]=murax.system_cpu._zz_153_[8] RDATA[9]=murax.system_cpu._zz_153_[9] RDATA[10]=murax.system_cpu._zz_153_[10] RDATA[11]=murax.system_cpu._zz_153_[11] RDATA[12]=murax.system_cpu._zz_153_[12] RDATA[13]=murax.system_cpu._zz_153_[13] RDATA[14]=murax.system_cpu._zz_153_[14] RDATA[15]=murax.system_cpu._zz_153_[15] RE=$true WADDR[0]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] WADDR[1]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] WADDR[2]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] WADDR[3]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] WADDR[4]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] WADDR[5]=$false WADDR[6]=$false WADDR[7]=$false WADDR[8]=$false WADDR[9]=$false WADDR[10]=$false WCLK=io_mainClk WCLKE=murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_valid WDATA[0]=murax.system_cpu._zz_66_[0] WDATA[1]=murax.system_cpu._zz_66_[1] WDATA[2]=murax.system_cpu._zz_66_[2] WDATA[3]=murax.system_cpu._zz_66_[3] WDATA[4]=murax.system_cpu._zz_66_[4] WDATA[5]=murax.system_cpu._zz_66_[5] WDATA[6]=murax.system_cpu._zz_66_[6] WDATA[7]=murax.system_cpu._zz_66_[7] WDATA[8]=murax.system_cpu._zz_66_[8] WDATA[9]=murax.system_cpu._zz_66_[9] WDATA[10]=murax.system_cpu._zz_66_[10] WDATA[11]=murax.system_cpu._zz_66_[11] WDATA[12]=murax.system_cpu._zz_66_[12] WDATA[13]=murax.system_cpu._zz_66_[13] WDATA[14]=murax.system_cpu._zz_66_[14] WDATA[15]=murax.system_cpu._zz_66_[15] WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:191|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_1 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_2 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_3 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_4 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_5 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_6 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_7 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_8 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_9 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_A xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_B xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_C xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_D xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_E xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_F xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param READ_MODE 00000000000000000000000000000000 .param WRITE_MODE 00000000000000000000000000000000 .gate SB_RAM40_4K MASK[0]=$abc$159056$n10628 MASK[1]=$abc$159056$n10628 MASK[2]=$abc$159056$n10628 MASK[3]=$abc$159056$n10628 MASK[4]=$abc$159056$n10628 MASK[5]=$abc$159056$n10628 MASK[6]=$abc$159056$n10628 MASK[7]=$abc$159056$n10628 MASK[8]=$abc$159056$n10628 MASK[9]=$abc$159056$n10628 MASK[10]=$abc$159056$n10628 MASK[11]=$abc$159056$n10628 MASK[12]=$abc$159056$n10628 MASK[13]=$abc$159056$n10628 MASK[14]=$abc$159056$n10628 MASK[15]=$abc$159056$n10628 RADDR[0]=murax.system_cpu._zz_73_[15] RADDR[1]=murax.system_cpu._zz_73_[16] RADDR[2]=murax.system_cpu._zz_73_[17] RADDR[3]=murax.system_cpu._zz_73_[18] RADDR[4]=murax.system_cpu._zz_73_[19] RADDR[5]=$false RADDR[6]=$false RADDR[7]=$false RADDR[8]=$false RADDR[9]=$false RADDR[10]=$false RCLK=io_mainClk RCLKE=$true RDATA[0]=murax.system_cpu._zz_152_[0] RDATA[1]=murax.system_cpu._zz_152_[1] RDATA[2]=murax.system_cpu._zz_152_[2] RDATA[3]=murax.system_cpu._zz_152_[3] RDATA[4]=murax.system_cpu._zz_152_[4] RDATA[5]=murax.system_cpu._zz_152_[5] RDATA[6]=murax.system_cpu._zz_152_[6] RDATA[7]=murax.system_cpu._zz_152_[7] RDATA[8]=murax.system_cpu._zz_152_[8] RDATA[9]=murax.system_cpu._zz_152_[9] RDATA[10]=murax.system_cpu._zz_152_[10] RDATA[11]=murax.system_cpu._zz_152_[11] RDATA[12]=murax.system_cpu._zz_152_[12] RDATA[13]=murax.system_cpu._zz_152_[13] RDATA[14]=murax.system_cpu._zz_152_[14] RDATA[15]=murax.system_cpu._zz_152_[15] RE=$true WADDR[0]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] WADDR[1]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] WADDR[2]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] WADDR[3]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] WADDR[4]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] WADDR[5]=$false WADDR[6]=$false WADDR[7]=$false WADDR[8]=$false WADDR[9]=$false WADDR[10]=$false WCLK=io_mainClk WCLKE=murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_valid WDATA[0]=murax.system_cpu._zz_66_[0] WDATA[1]=murax.system_cpu._zz_66_[1] WDATA[2]=murax.system_cpu._zz_66_[2] WDATA[3]=murax.system_cpu._zz_66_[3] WDATA[4]=murax.system_cpu._zz_66_[4] WDATA[5]=murax.system_cpu._zz_66_[5] WDATA[6]=murax.system_cpu._zz_66_[6] WDATA[7]=murax.system_cpu._zz_66_[7] WDATA[8]=murax.system_cpu._zz_66_[8] WDATA[9]=murax.system_cpu._zz_66_[9] WDATA[10]=murax.system_cpu._zz_66_[10] WDATA[11]=murax.system_cpu._zz_66_[11] WDATA[12]=murax.system_cpu._zz_66_[12] WDATA[13]=murax.system_cpu._zz_66_[13] WDATA[14]=murax.system_cpu._zz_66_[14] WDATA[15]=murax.system_cpu._zz_66_[15] WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:191|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_1 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_2 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_3 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_4 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_5 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_6 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_7 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_8 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_9 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_A xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_B xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_C xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_D xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_E xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_F xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param READ_MODE 00000000000000000000000000000000 .param WRITE_MODE 00000000000000000000000000000000 .gate SB_RAM40_4K MASK[0]=$abc$159056$n10628 MASK[1]=$abc$159056$n10628 MASK[2]=$abc$159056$n10628 MASK[3]=$abc$159056$n10628 MASK[4]=$abc$159056$n10628 MASK[5]=$abc$159056$n10628 MASK[6]=$abc$159056$n10628 MASK[7]=$abc$159056$n10628 MASK[8]=$abc$159056$n10628 MASK[9]=$abc$159056$n10628 MASK[10]=$abc$159056$n10628 MASK[11]=$abc$159056$n10628 MASK[12]=$abc$159056$n10628 MASK[13]=$abc$159056$n10628 MASK[14]=$abc$159056$n10628 MASK[15]=$abc$159056$n10628 RADDR[0]=murax.system_cpu._zz_73_[20] RADDR[1]=murax.system_cpu._zz_73_[21] RADDR[2]=murax.system_cpu._zz_73_[22] RADDR[3]=murax.system_cpu._zz_73_[23] RADDR[4]=murax.system_cpu._zz_73_[24] RADDR[5]=$false RADDR[6]=$false RADDR[7]=$false RADDR[8]=$false RADDR[9]=$false RADDR[10]=$false RCLK=io_mainClk RCLKE=$true RDATA[0]=murax.system_cpu._zz_153_[16] RDATA[1]=murax.system_cpu._zz_153_[17] RDATA[2]=murax.system_cpu._zz_153_[18] RDATA[3]=murax.system_cpu._zz_153_[19] RDATA[4]=murax.system_cpu._zz_153_[20] RDATA[5]=murax.system_cpu._zz_153_[21] RDATA[6]=murax.system_cpu._zz_153_[22] RDATA[7]=murax.system_cpu._zz_153_[23] RDATA[8]=murax.system_cpu._zz_153_[24] RDATA[9]=murax.system_cpu._zz_153_[25] RDATA[10]=murax.system_cpu._zz_153_[26] RDATA[11]=murax.system_cpu._zz_153_[27] RDATA[12]=murax.system_cpu._zz_153_[28] RDATA[13]=murax.system_cpu._zz_153_[29] RDATA[14]=murax.system_cpu._zz_153_[30] RDATA[15]=murax.system_cpu._zz_153_[31] RE=$true WADDR[0]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] WADDR[1]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] WADDR[2]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] WADDR[3]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] WADDR[4]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] WADDR[5]=$false WADDR[6]=$false WADDR[7]=$false WADDR[8]=$false WADDR[9]=$false WADDR[10]=$false WCLK=io_mainClk WCLKE=murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_valid WDATA[0]=murax.system_cpu._zz_66_[16] WDATA[1]=murax.system_cpu._zz_66_[17] WDATA[2]=murax.system_cpu._zz_66_[18] WDATA[3]=murax.system_cpu._zz_66_[19] WDATA[4]=murax.system_cpu._zz_66_[20] WDATA[5]=murax.system_cpu._zz_66_[21] WDATA[6]=murax.system_cpu._zz_66_[22] WDATA[7]=murax.system_cpu._zz_66_[23] WDATA[8]=murax.system_cpu._zz_66_[24] WDATA[9]=murax.system_cpu._zz_66_[25] WDATA[10]=murax.system_cpu._zz_66_[26] WDATA[11]=murax.system_cpu._zz_66_[27] WDATA[12]=murax.system_cpu._zz_66_[28] WDATA[13]=murax.system_cpu._zz_66_[29] WDATA[14]=murax.system_cpu._zz_66_[30] WDATA[15]=murax.system_cpu._zz_66_[31] WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:191|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_1 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_2 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_3 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_4 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_5 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_6 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_7 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_8 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_9 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_A xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_B xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_C xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_D xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_E xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_F xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param READ_MODE 00000000000000000000000000000000 .param WRITE_MODE 00000000000000000000000000000000 .gate SB_RAM40_4K MASK[0]=$abc$159056$n10628 MASK[1]=$abc$159056$n10628 MASK[2]=$abc$159056$n10628 MASK[3]=$abc$159056$n10628 MASK[4]=$abc$159056$n10628 MASK[5]=$abc$159056$n10628 MASK[6]=$abc$159056$n10628 MASK[7]=$abc$159056$n10628 MASK[8]=$abc$159056$n10628 MASK[9]=$abc$159056$n10628 MASK[10]=$abc$159056$n10628 MASK[11]=$abc$159056$n10628 MASK[12]=$abc$159056$n10628 MASK[13]=$abc$159056$n10628 MASK[14]=$abc$159056$n10628 MASK[15]=$abc$159056$n10628 RADDR[0]=murax.system_cpu._zz_73_[15] RADDR[1]=murax.system_cpu._zz_73_[16] RADDR[2]=murax.system_cpu._zz_73_[17] RADDR[3]=murax.system_cpu._zz_73_[18] RADDR[4]=murax.system_cpu._zz_73_[19] RADDR[5]=$false RADDR[6]=$false RADDR[7]=$false RADDR[8]=$false RADDR[9]=$false RADDR[10]=$false RCLK=io_mainClk RCLKE=$true RDATA[0]=murax.system_cpu._zz_152_[16] RDATA[1]=murax.system_cpu._zz_152_[17] RDATA[2]=murax.system_cpu._zz_152_[18] RDATA[3]=murax.system_cpu._zz_152_[19] RDATA[4]=murax.system_cpu._zz_152_[20] RDATA[5]=murax.system_cpu._zz_152_[21] RDATA[6]=murax.system_cpu._zz_152_[22] RDATA[7]=murax.system_cpu._zz_152_[23] RDATA[8]=murax.system_cpu._zz_152_[24] RDATA[9]=murax.system_cpu._zz_152_[25] RDATA[10]=murax.system_cpu._zz_152_[26] RDATA[11]=murax.system_cpu._zz_152_[27] RDATA[12]=murax.system_cpu._zz_152_[28] RDATA[13]=murax.system_cpu._zz_152_[29] RDATA[14]=murax.system_cpu._zz_152_[30] RDATA[15]=murax.system_cpu._zz_152_[31] RE=$true WADDR[0]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] WADDR[1]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] WADDR[2]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] WADDR[3]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] WADDR[4]=murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] WADDR[5]=$false WADDR[6]=$false WADDR[7]=$false WADDR[8]=$false WADDR[9]=$false WADDR[10]=$false WCLK=io_mainClk WCLKE=murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_valid WDATA[0]=murax.system_cpu._zz_66_[16] WDATA[1]=murax.system_cpu._zz_66_[17] WDATA[2]=murax.system_cpu._zz_66_[18] WDATA[3]=murax.system_cpu._zz_66_[19] WDATA[4]=murax.system_cpu._zz_66_[20] WDATA[5]=murax.system_cpu._zz_66_[21] WDATA[6]=murax.system_cpu._zz_66_[22] WDATA[7]=murax.system_cpu._zz_66_[23] WDATA[8]=murax.system_cpu._zz_66_[24] WDATA[9]=murax.system_cpu._zz_66_[25] WDATA[10]=murax.system_cpu._zz_66_[26] WDATA[11]=murax.system_cpu._zz_66_[27] WDATA[12]=murax.system_cpu._zz_66_[28] WDATA[13]=murax.system_cpu._zz_66_[29] WDATA[14]=murax.system_cpu._zz_66_[30] WDATA[15]=murax.system_cpu._zz_66_[31] WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:191|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_1 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_2 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_3 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_4 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_5 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_6 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_7 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_8 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_9 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_A xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_B xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_C xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_D xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_E xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_F xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param READ_MODE 00000000000000000000000000000000 .param WRITE_MODE 00000000000000000000000000000000 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[0] RDATA[1]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[1] RDATA[2]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_6_[0] RDATA[4]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[4] RDATA[5]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[5] RDATA[6]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[6] RDATA[7]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[7] RDATA[8]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[8] RDATA[9]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[9] RDATA[10]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_6_[1] RDATA[12]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[12] RDATA[13]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[13] RDATA[14]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[14] RDATA[15]=$techmap71901\murax.system_ram.ram_symbol0.0.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4515 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0001111100111111000111110001111100111111000111110011111100011111001111110001111100011111000111110011111100111111000111110011111100111111000111110001111100011111000111110001111100111111001111110001111100011111000111110001111100011111001111110001111100011111 .param INIT_1 0011111100111111001111110011111100011111001111110001111100011111000111110001111100011111000111110001111100111111000111110001111100011111001111110001111100011111001111110011111100111111001111110001111100111111000111110001111100111111001111110011111100111111 .param INIT_2 0001111100011111000111110001111100011111000111110001111100011111000111110011111100011111000111110011111100011111001111110001111100111111000111110001111100011111000111110011111100011111000111110011111100111111001111110011111100011111001111110001111100011111 .param INIT_3 0001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110011111100111111000111110001111100011111000111110001111100011111001111110011111100111111001111110011111100111111 .param INIT_4 0001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111 .param INIT_5 0001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111 .param INIT_6 0001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111 .param INIT_7 0001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111 .param INIT_8 0001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111 .param INIT_9 0001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111 .param INIT_A 0001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111000111110001111100011111 .param INIT_B 0001111100001111000011110001111100001111000111110000111100011111000011110000111100011111000011110000111100011111000111110000111100001111000011110000111100001111000011110000111100011111000111110001111100011111000111110001111100011111000111110001111100011111 .param INIT_C 0001111100001111000111110000111100001111000111110000111100011111000011110000111100001111000011110000111100001111000011110000111100001111000111110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110001111100011111 .param INIT_D 0001111100011111000111110001111100001111000111110000111100001111000011110000111100001111000011110000111100011111000011110000111100001111000111110001111100001111000111110001111100001111000111110001111100011111000011110001111100011111000011110000111100001111 .param INIT_E 0000111100001111000011110000111100001111000011110000111100001111000011110001111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110001111100001111000011110001111100011111000111110001111100001111000111110000111100001111 .param INIT_F 0000111100011111000011110000111100011111000111110001111100001111000111110000111100001111000011110000111100001111000011110000111100001111000111110000111100011111000011110001111100011111000011110000111100001111000011110000111100001111000011110000111100011111 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[0] RDATA[1]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[1] RDATA[2]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_6_[2] RDATA[4]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[4] RDATA[5]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[5] RDATA[6]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[6] RDATA[7]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[7] RDATA[8]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[8] RDATA[9]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[9] RDATA[10]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_6_[3] RDATA[12]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[12] RDATA[13]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[13] RDATA[14]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[14] RDATA[15]=$techmap71892\murax.system_ram.ram_symbol0.1.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4515 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0001000000110000000000000010000000000000000000000000000000100000001100000011000000000000000000100000000000000000000000000010001000000000000000000000000000010000001000000011000000100000001100000010000000100000001000000011000000000000000100000010000100100001 .param INIT_1 0000000000000010000000000000000000000010001000100000000000100000001000000010001000100010000000100010000100000001000000000010000000000000001000000000001000100010000000000000000000000000000000000000000000100000000000100010001000000000000100000000000000000000 .param INIT_2 0000000000000000000000000000000000100000001000000010000000000001001000000000000000000000001000000000000000000000000000000010000000100000001000000000000000010000000000000010000000000000001000000000000000000000000000000000000000000000001000000000000000100000 .param INIT_3 0000000000000010000000000000000100000000000000000000000000000000000000000000000000000010000000100000000000000000000000100000001100000000000000000010000000100000000000000000000100000011000100110000000000000000000100000001000000000000001000000010000000000000 .param INIT_4 0000000000000000000000000000000000000010000000100000000000000000000000000000000100000000000000000000000100000001000000010000000100000000000000000000000000000000000000000000000100000000000000000000000000000000000000000000001100000000000000000000000100000001 .param INIT_5 0000000000000000000000000000001100010000000100000000001000000010000000000000000000000000000000100000001000000010000001000000010100000000000000010000000000000000000000100000001000000000000000000000000000000000000000000000000100000000000000000000000000000001 .param INIT_6 0000000000000000000010000000100000000000000000000000000000010000000000000000000000000000000000000000000000000100000000000000100000000000000000000000000000000000000000000000000000011000000110000000000000000000000100000001000000000000000000010000000000000000 .param INIT_7 0000001100000011000000000000000000000000000000000000000000000000000000000000000000000000000000010000000000000000000000000000000000000000000000000000000000000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 .param INIT_8 0000000000000010000000000000001000000000000000000000000000000001000000000000100000000000000000000000000000000000000100000001000000000000000100000000000000000000000000100000001000000000000000000000001000000011000000000000100000000000000000000000000000000000 .param INIT_9 0000000000000000000000000000000000000000000000000000000100000001000000000000000000000000000000010000000000011010000000000001000000000000000010000001000000010000000000000000000000000000000000000000000100001001000000000001000000000000000000000000000000011001 .param INIT_A 0000000000000000000000000000000000000000000000000000000000000000000000010000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000000000000000010000000100000000000000000000000000000001000 .param INIT_B 0001000000000000000100010000100100010000000000000001000000010000000100000000000000000000000000010000000000010000000010000000100000000000000000000000100000001000000000000000000000010000000100000000000000000000000000000000000000000000000000000000000000000000 .param INIT_C 0000100000001000000000000001000000001000000010000000100100001001000110000001100000000000000100000001000000010000000110010000100100010000000000000000000000010000000000000000000000000000000000000000000000000000000000000000000000011000000110000000000100000001 .param INIT_D 0000000000000000000000000000000000000000000100000000000000010000000100000001000000010000000010000001000000001000000000000001000000000001000110010001000000000000000010000000100000010000000100000000100000011000000100000001000000001000000010000001000100010001 .param INIT_E 0000100000011000000000010000000100010000000100000001000000000000000100000000000000001000000110000000000000000000000000000000000000001000000010000000000000000001000000000001000100000000000100000000000000000000000000000000000000000000000100000000000000010000 .param INIT_F 0000100000011000000100000000000000000000000000000001000000010000000010000000100000000000000000000000000000000000000100000001000000010000000100000001100000011000000000000001000000010000000000000001000000010000000010000001100000000000000000010000000000000000 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[0] RDATA[1]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[1] RDATA[2]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_6_[4] RDATA[4]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[4] RDATA[5]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[5] RDATA[6]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[6] RDATA[7]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[7] RDATA[8]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[8] RDATA[9]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[9] RDATA[10]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_6_[5] RDATA[12]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[12] RDATA[13]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[13] RDATA[14]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[14] RDATA[15]=$techmap71888\murax.system_ram.ram_symbol0.2.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4515 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0001000100001110001000010001111000101001000111100010110100011110001101110000110000100011000111100010000100011110001010110011110000001100001110110001010000011101001100000001100100010100000111010010110000011101001110000001110100011000001111010001110100001100 .param INIT_1 0000111000001110000100000010100000000110000111000010010000011100001010100000111000011010000011000010010100011110001001000000111100010001000011100010101100011100000010010000111000010101001110100000010100001110001010110001100000011111000111000000011100111100 .param INIT_2 0001001000001101000010000001110100101110000010010001010000001101001000110001100100100100000111010010111000001100001010000000111000100010000011000011000000011100000111100000110000101100000111000000001000001100000100000010110000010010000011000010110000011000 .param INIT_3 0001001000001100000001010000111000010101000011000000100000001101000110000000110000000011000011000001011000001001000011100001110100011000000110110010010000101111000001000011111100010011001111000000101000001101000111010000110000010111000011000000000000011101 .param INIT_4 0001110100001110000011010000111000010010000011010000001000001100000111110000110100001110000011010001001100001100000000110000110000010011000011010000110000001011000111010000111100000001000010110001010000001111000001110000111100011010000011010000100100001110 .param INIT_5 0001010000011001000011110000101000011101000010000001011100001000000001000000100100010110000010110000111000001000000111010000101100000101000010100001010100001010000000110001110000001000000110010000100000001000000101010000100100000100000011010001000100001010 .param INIT_6 0000011100011000000011100001000000000101000110000001111000010000000011010001100000000010000111010001010100001000000000100001110000011001000000000000001000011000000000010001000000011010000000000001000100000000000111100000100100001101000110010000011000001000 .param INIT_7 0000101100000100000110110000000000001000000001010001111000000000000011000000010100011011000001000000110100000000000111100000010100001001000101010000111100000000000111010000010000000010000110000001100100000110000100100000110000001111000100000001011000001000 .param INIT_8 0000111100010000000101100000110100001101000101110000000100011100000110000000110100001001000100000000100000010101000111010000000000011100000101000001100000000100000111100001000100000110000011010000111100010000000111000000111100001101000001100001100100000111 .param INIT_9 0000110000000101000110010000111000000110000100010000111100010110000001000001101100000101000111100001110100011110000100100001110100001001000111100001101000000001000000100001110100010110000000010000111100001100000110110001010000010110000010010001110100011110 .param INIT_A 0000001100001010000100010000100000000011000010100001001000001001000000110001100000000010000011010001111000000000000011000000110100010100000000000001110000000100000001000000110100011001000001000000000000001101000110010000010000001001000011000001110000001001 .param INIT_B 0001101000011111000011110001111000011000000000110000111000001111000000100000011000010001000111100000001000011111000010100000001000000110000011100000111000000010000000000000111000011001000000100001000100001011000100100000101100001010000000110001101100001010 .param INIT_C 0001111000000111000000100001111100011010000101110001111100000110000010000001001100010100000111110001100000000111000010110000011000010110000011110001001100000010000011110000111000000010000011110000001000001111000001110000111000011000000100110000011100001110 .param INIT_D 0000011100001110000001010001111000000001000011100001000100000110000100110000111000001111000011100001111100001110000101100000111100011101000011100001001000011111000111100000001000000110000010110000100000010110000100100000101000011110000001110001000100001010 .param INIT_E 0000110100000110000001110000111000010111000001110000110000001111000101000000111100011110000001110000001000001110000001000000011000001101000001100000110100000111000000110000111100011110000001110000110000000111000000010001011000001101000001100001011100001110 .param INIT_F 0001101000000110000101000000111000000100000111100001110100010110000010100001010100010111000111100001010100010100000110100000111000000111000111100000110100010110000001010000111100000101000111110000001000000110000010100000011000000001000011100000110000000110 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[0] RDATA[1]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[1] RDATA[2]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_6_[6] RDATA[4]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[4] RDATA[5]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[5] RDATA[6]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[6] RDATA[7]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[7] RDATA[8]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[8] RDATA[9]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[9] RDATA[10]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_6_[7] RDATA[12]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[12] RDATA[13]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[13] RDATA[14]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[14] RDATA[15]=$techmap71890\murax.system_ram.ram_symbol0.3.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4515 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0011011000010000000010000000000000111100001000000010110000000000000111000001000000100110001000000001110000100000001011000000001000011000000000000011100000000000000110100010000000001000000000000000111000100000001111000000000000001010001000000011110000010001 .param INIT_1 0001101100000000000010000000000000110011000000100001110000000000001111110010000000001011000000100000110100000001001111100000000000111100000100000001001000000010000111000000000000011000000000000011001000000000000110100000001000001100000000000000110000000000 .param INIT_2 0000100000000000000111000000000000111001001000000000100100000000000110100000001100111100000000000010010100100000001111000000000000001001000000000010010000100000001111010001000000011100000000000001110100000000000101000001000000101101000000000001100000000000 .param INIT_3 0000110000000010000011010000000100001110000000000000010000000000000011110000000000001100000000110000000100000010000010110000001000001000000000000010101000100000000001000010000000011110001000110000100000000000001111100011000000101100000100010001010100100000 .param INIT_4 0000000100000001000011100000000000001110000000100000000000000000000011010000000000001101000000000000110000000001000000010000000100001100000000010000100000000000000010000000000000001010000000010000010000000000000011000000000000001100000000000000100000000001 .param INIT_5 0001000100000000000110100000000100011000000100000000101100000011000100010000000000001011000000000000101100000010000010000000010000001010000000010000000100000101000111100000001000001100000000000000111100000000000110000001000000001011000000000000100000000001 .param INIT_6 0000000000000000000100010000100000000001000000010001000100000000000110000000000000000001000000000001000000010100000000010000000000010100000100000000100000000000000111000000000000000100000110000001100000010000000100010001000000001000000000000000100000000000 .param INIT_7 0001001000000011000001010000000000010111000000000000000000000000000101010000000000000100000000010001000000000001000001010000000000000100000000000001001000000011000001000000000000011100000000000000010000000000000010010000000000000000000000000000000100000000 .param INIT_8 0000000000000011000101010001001000000000000000000001011000000001000110000001000000000111000000010001010000000000000000110001000100010101000000000000011000010000000000010000001000000100000000100001001000000011000011000000000000010010000000010000010000000000 .param INIT_9 0000010000001000000011100000000000001000000000000000011000000001000000010000000000011100000000010001000000000000000011010000000000011010000000010000010100011000000111000000000000011001000100000001110000000001000001010000000000000001000000000001110000000001 .param INIT_A 0000100000000000000001100000000000001010000000000000110000000000000100000000000100000100000000000001000100011000000011100000000000001001000000000000011000000000000010010000000000001111000010010000100100000000000001100000100000001100000000000000101100000000 .param INIT_B 0001110100010000000010010000000100010100000010000000110000010000000001110001000000001110000100010000000000000000000111000000100000000111000000000000101000001000000001010000000000001110000110010000001000000000000011010000000000000000000000000000110000000000 .param INIT_C 0000110100011000000001100000000000011111000010000001101100011001000111010001100000000110000000000001111100011000000011110000100100000011000000000001011000000000000011000000000000001101000000000000110000000000000000000000000000001100000110000001010000010001 .param INIT_D 0000111000000000000001100000000000010010000000000000111000000000000111100001000000000010000000000000001000000000000110100000000000010010000100010001111000010000000010110000100000010000000101000001110100011000000101100001000000011011000010000001011100000001 .param INIT_E 0000111000001000000001010000000100010010000100000000101000000000000010010000000000011010000010000000001100000000000010100000000000001000000010000000001000000000000110100000000000000011000000000000011100000000000011000000000000010010000000000000101000000000 .param INIT_F 0000111100011000000111100001000000010101000100000001101100001001000010010001100000000100000000000001010000010001000011100000000000001010000100000001111000001001000001010000000000010111000100000001101000010000000011110001100000000111000000010000111000001000 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[0] RDATA[1]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[1] RDATA[2]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_7_[0] RDATA[4]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[4] RDATA[5]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[5] RDATA[6]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[6] RDATA[7]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[7] RDATA[8]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[8] RDATA[9]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[9] RDATA[10]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_7_[1] RDATA[12]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[12] RDATA[13]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[13] RDATA[14]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[14] RDATA[15]=$techmap71899\murax.system_ram.ram_symbol1.0.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4512 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0010100000101010001001010011011000101000001100000011011100100100001000000000010000101001000111100010000000010010001110010010010000100000001110100011010000001100000001100000011000010110001010100000101000010000000010100011100000101100001111100010100000000110 .param INIT_1 0001011000010111000101000010011100111101001111010011000100110011001110010001000000100100000011000011000000111110000100000010011100100010001011000011110100100100000100000000001000010111001100000011110000111110001001010011110000010110000011000001001100111000 .param INIT_2 0000011000000101000110100001101100110000000110010011011000001111001101100011010000010010001110110010100100110001001100110011001100100111000001000011101100011010001000100010100000110010001111100001001100011101000110110010101100100011001001000011101100110010 .param INIT_3 0001000000001001000100000001011000010000000011000001100000011101000100010000000000010001000101000001110000001001000001000000110100000100000011110011000000111011000010100010100100010000001100000000111000011101001000100000011000100000000001000011101000011111 .param INIT_4 0000001100000100000100010001001000000000000000010001111100011101000000010000110000010011000111010000000000001100000111100001110000000010000000000001000000010011000001100000010100010100000101100000100000001101000100000001000100000000000000010001010000011110 .param INIT_5 0001101100011010000101100001101000000000000010100001010100001000000110010001101100000101000000010001000100011001000100010000001100010100000100100000111100001000000100010001000000000000000010110001000100011110000101110000100100010111000101010000010000001110 .param INIT_6 0001000000001000000001010000000000000011000010100001110100010000000000100001101000011001000111000000101000001010000010010000110000000010000000100001011100010000000100100001111000000011000000000001001000000010000001110000100100000011000000110000011100010000 .param INIT_7 0001110000000100000101110000010100011011000001110000010100000101000110100000011100000110000001000001101000000010000010010000010100010111000001100001101000000100000000110000011000011101000011010000101000000010000110010000110000010001000000000000110100001000 .param INIT_8 0001110000010100000110010000110100010101000101100000111000011100000111100000110100010101000001100001100000000111000000010000000000010001000101010001010100000101000000000001010100011000000101010001110000000000000110000000111100011101000001100000011100000100 .param INIT_9 0001001000010100000111100000011000011100000101010001000000010110000110110001001100001010000111100001111000011110000101110000110100011100000011000000011100000101000000010001110100011010000011010001100000011100000101110001010100001101000010010001100000011110 .param INIT_A 0001100000011000000111010000111000010100000101100000011000001001000101000000100000010110000101010001100000000000000100100001110100000010000011000000000000000110000111000001011100000100000001000001010000011100000001110000011000010011000111100000111000001001 .param INIT_B 0001000000011100000001100001101000010010000001100001100000010111000010000001010100011000000111000000111000011111000000100001000100000000000010100000000000000000000000100000101000000101000000100001110000001001000110000000110000010010000101000000101100000000 .param INIT_C 0001001000000111000100100001110100000000000000110001000000010100000100100001011100010000000011110001100000000101000100000000000000010010000100000000001100011100000010110000110000001010000011110000001000000010000001100000010000010000000101010001000000011110 .param INIT_D 0000100100001110000000010001001000010100000111000001100100011110000110100000000000011011000010100001111100010010000011100001100100000000000010000000000000010111000100000001000000010110000010110001001000010010000000000001101000000100000100010000000000011100 .param INIT_E 0000010000010010000001100001000000010100000010010001110000001101000111100001111100000101000100100000000100001011000000000000111100000010000000100000010100000100000111110001110100010000000101000000000100000000000010100001101000011100000101000001111000011000 .param INIT_F 0000000000000010000000000001011000000010000010100000110100010100000101100000010000000010000001100001001000011010000010110000100100001100000011000001010000010000000100110001011100000001000110010001011100001101000000010000011100000000000010100000100000000000 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[0] RDATA[1]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[1] RDATA[2]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_7_[2] RDATA[4]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[4] RDATA[5]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[5] RDATA[6]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[6] RDATA[7]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[7] RDATA[8]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[8] RDATA[9]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[9] RDATA[10]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_7_[3] RDATA[12]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[12] RDATA[13]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[13] RDATA[14]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[14] RDATA[15]=$techmap71897\murax.system_ram.ram_symbol1.1.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4512 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0000000000001010001000000011011000100000001110110010000000010011001000110010001000000001000110100010000100110001000000010011100100010000001001000011001000000110001000100001010000110010000000000011001000100000000100100010000000010010001001000011001000100000 .param INIT_1 0000000000010111001000000000011100000000000110000010000000110010001000000011001000100000001001000010000000110010001000000001001000010000000100100010000000111100000000000001001100100100000100110000000100011110001000010011010000000011000100010010001100010011 .param INIT_2 0000000000000111000000000001001000100000001101100010000000100110001000100011011000100000000101100010000100110001001000010001001100100001001101110000000100011011000100010001011000100001001100100000000000010011001000000000101100000000000000110010010000110011 .param INIT_3 0000000000010001000000000001010000000000000100100000000000010011000000000001000100000001000100010000010000011011000000000001010100000000000101100010000000110111000000000011101100000000001100000000001000010101000000000000001000010011001100000010000000011011 .param INIT_4 0000000100011110000000010001001100000000000100010000001000011101000000100001001100000010000100110000000000010000000000000001110000000000000100100000010000011011000000000001011100000000000101100000000000011111000000000001001100000000000110100000000000010100 .param INIT_5 0000010000011111000001000001001000000100000000100001000100000100000000000001111100010000000000110000000000011001000000000001001100000100000101100000000100011110000100000000000000000010000110010000001000010001000100100001010100000010000101010000000000000110 .param INIT_6 0000010000010011000100000000011100010001000001110000100000010011000000000001001000000000000110110001000000001011000000000001101100011000000010110000000000010011000000000001001100000000000001110000000000010111000000000000101100000000000100110000010000010111 .param INIT_7 0000100000010100000110110001110100001000000110110001011000010001000000000001001100000000000111100000010000011111000010000001001100001000000101110000011000011110000000010001101000000000000111010000000100010010000000000000101100000100000101110000010000001011 .param INIT_8 0000000000010101000000000000100100000000000111010000001000011100000000100000110100000010000101000000001000010001000001000000001000000000000110110000000000010101000011000001000100000000000010110000110000010000000000000000101100000000000111110000100000000111 .param INIT_9 0000100000010001000000000000111100000010000110100000000000010000000000000001111100000000000110100000000000011110000000100001111100000001000111000000001000001101000000100001100100010000000111110000000000011010000000010001010100000000000011010000000000011000 .param INIT_A 0000000000011110000000000001100000000000000110010000101000010000000010100001000000000000000111100001100000011011000000000001101100000000000010100000000000010011000000000001111100000000000101100000000000011111000000000001010100000000000110000000000000011001 .param INIT_B 0001000000001011000000000000101000010000000000110001000000011011000100000000100100010000000010000001000000011110000000010000001000000000000010010000010000000101000000000000101000001001000001010000000100001100000100000000111100000000000101110001000000001101 .param INIT_C 0000000000010011000000000000101100010000000000010000000000010100000100000000001100000000000110010001000000011001000100000001001000010000000111110001000000001000000000000000100100000000000010010000000000001001000000000000100100000000000100100000000000011010 .param INIT_D 0000000000001001000100000000100100000001000011000001000100011000000110010001000100011001000101010001100000010100000110000000000000001000000101100000000000001010000001000000011100000000000010110001000000010010000100000000101100010000000101010001000000011000 .param INIT_E 0000000000010101000000000000101000010001000110000001000000011001000100000001101100010000000000010000000000001101000000010000110000000000000001110000000100000100000000010000111000010000000101010000000100001000000100000000101100000000000001000001000000011111 .param INIT_F 0001000000000101000000000000110100000000000111100000000000001101000100000001011100010000000111100000000000011011000100000001100100000000000011010001000000000101000100000001101100010000000110010000000000001101000000000001000100000000000010000000000100001101 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[0] RDATA[1]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[1] RDATA[2]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_7_[4] RDATA[4]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[4] RDATA[5]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[5] RDATA[6]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[6] RDATA[7]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[7] RDATA[8]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[8] RDATA[9]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[9] RDATA[10]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_7_[5] RDATA[12]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[12] RDATA[13]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[13] RDATA[14]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[14] RDATA[15]=$techmap71911\murax.system_ram.ram_symbol1.2.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4512 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0011000100011100001000010010010000000001001000000000100100000000001101110001100000000001000011100010000100100100000000010000000000001100001000000000001000011000000001100010100000100010001100000000011000100000000000100011010000000010000101000010001000010000 .param INIT_1 0011100100100000000101110010100000110011000110100010011100100000000100010000011000101011000001100000000000101000000101000000100000100001000001000010001100110110001110010010000000000101001010000011000100001000001001110010001000101011001000000000011100101000 .param INIT_2 0001001000000100000000100000000000011110000000000011001100001000000101000011101000000010000000000001011100100000000110010000010000110011000011000000001100001000001000110000000000101111001100000011001100101100000000110011110000110011000000000010011100100000 .param INIT_3 0001000100001000000100000000100000010111000000000001001000000100000110110000010000010000000010000001010000001000000100100000001100011100000100000011000000101000000001000011100100000011001001110001001000000100000110110011000000000110001110000001001000111100 .param INIT_4 0001000000000001000111010000000000010010000011100001001100001100000100100000000000011110000000000001001000001100000100100000110000010010000000010001010000000000000110010000000000010100000010010001000000001000000101000000001100010010000001000001100100000101 .param INIT_5 0000011000001000000101000000000000011111000000000001011000001010000101110000100100010100000000110001011100000010000111000000010000010100000010000001000000001001000000110000001000000110000000000001111100000000000001100001100000010010000010000001010000000000 .param INIT_6 0000011100000000000011110000100000000110000000010000111100000000000001110000000000000010000000000000001100010000000000110000000000001111000100000000011100000000000011110000000000011111000110000000111100010000000101100000000000001110000000000000011100001000 .param INIT_7 0001101100000111000111100000000000011010000001000001101000000100000111100000010000011010000001000001101000000101000101100000110000001010000001000001100000000110000111110000010000000111000000000001100100000000000100110000000000001111000000000001011100000000 .param INIT_8 0000100000000101000001000001010000001100000000000000001000000100000000100001010000001111000000000000101000000100000110100001010000001110000001000000101000000100000010000000010000010100000001000000101000000110000101000000010000011100000000010001100000000100 .param INIT_9 0001011000000100000110010000110000011010000001000001110100010101000000000001010000000100000001000000010000000010000000100000010000000001000001000001011100011001000000100000010000001011000101010001011100000101000010100000010000010010000001000000010000000100 .param INIT_A 0001010100000000000101010000000000010101000010000001011000000000000001110000000100010010000000000000001100011100000111100000110000011011000001000001111100000100000101100000000000010011000011010001001000000100000100110000000000011011000001000001001000000101 .param INIT_B 0000110000010100000100110000001100010100000100000001000000010000000110100000011000010100000101000001001000000010000010010001110000000011000000100000111100001010000000010000000000010100000110010001010000000000000101000000000000011100000000000001010100000000 .param INIT_C 0000101100001011000101000001010000011010000111110001101100011011000011010000100100000000000000000000010000001101000110010000110100000000000100000000010100000000000000010000000000000100000001010000000000000100000000010000000000001100000010000001000100010001 .param INIT_D 0001011100010100000001010001011000010001000000100001100100010000000000010000000000010001000000000000000100011000000000000000000000010001000100010000000000010000000011010001100000010010000000100000100100011000000001010001000000011011000110110001010100010001 .param INIT_E 0000100100001000000000010000000100000010000000000001000000000010000000000001001000001000000010000000001100000000000010010000001000001001000010100000110000000101000100000000000000011010000100000001110000010110000010010001001000011101000001000001100100011000 .param INIT_F 0000101100001000000000010000001000000001000000100001010000001101000110100001100000010001000100000001011100000101000000010000000000010111000101000000100100001011000001000000011000010100000001000001100100000000000010110001100000000000000000100000000100001010 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[0] RDATA[1]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[1] RDATA[2]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_7_[6] RDATA[4]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[4] RDATA[5]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[5] RDATA[6]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[6] RDATA[7]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[7] RDATA[8]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[8] RDATA[9]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[9] RDATA[10]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_7_[7] RDATA[12]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[12] RDATA[13]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[13] RDATA[14]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[14] RDATA[15]=$techmap71909\murax.system_ram.ram_symbol1.3.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4512 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0011111000010100000101000000000000101010001010000000110000001100000111000001110000101100001001000010010000100000000011100000100000011100000010000000100000101100001011000010000000001100001001000010110000101100000011000000110000001100001010000001110000101100 .param INIT_1 0000100000101100000011100000100000111110000101100001011000000100000011000010110000011110000010100010111000001100000111000000010000111100000001000001111000011010000110000010100000011100000010000010100000000100000011100000101000001100001011000000110000001100 .param INIT_2 0000010100000000000110110000100000001101001010000000101000001100001111000001001000011110000001000011111000101100000011000000110000011110000010000010100000100000001111100000110000011100000111000001111000101100000011000000000000100110000000000001110000001000 .param INIT_3 0001101000001000000011010000010000011100000001000000110000001100000111000000100000001100000010000001110100000000000010100001111000001110000110000010110000101100000011000000010000000111000001110001110000001000001111100011110000111100000011000000111100110100 .param INIT_4 0001110000001100000011000000110000011110000011100000110100000000000111000000110000001100000011000001110000001100000011000000000000010000000000000000110000001000000110000000110000001100000010000001110000000100000001000000010000011100000011000000110100001001 .param INIT_5 0001110100000000000011010000100000011110000110000000111100001010000111110000000100000101000000010001111000001010000011100000110000011001000010000000110000000100000001100000001000001000000010000001100000001000000011000001100000011000000001000001110100000000 .param INIT_6 0000001100000000000010100000100000000001000000010000001000000000000000000000000000000010000000000000010000000000000000110000000000010000000000000000101100000000000100000000000000011011000110000000000000000000000111110001100000001100000010000001111100011000 .param INIT_7 0001011100000011000001010000000000010111000001000000000100000001000101110000010000010101000001000000001100000000000101000000010000000110000001000000000100000010000101110000010000000110000000000001000100000000000000100000000000000011000000000000001000000000 .param INIT_8 0000101100000000000100100000010000001000000001000001010100000100000101000000000000001100000000010001110000000100000110000001000000001101000001010000110000000101000010010000000000000100000001000000101100000010000000100000010000010001000001000000010100000100 .param INIT_9 0000111100000100000011000000110000000000000100000000010100010101000100010001000000001001000011000000000000000100000001010000010000000110000000010001110100011001000001000000010000011001000100010000010100000101000011010000010000010001000000000000010100000100 .param INIT_A 0001010000000010000001100000001000010110000000000000011000000000000101110000000100010010000000000000101000010000000111110000110000010010000000000001001000000100000000100000010000011111000001010000111000000000000100100000000000001110000011000001001100000001 .param INIT_B 0001010100001110000100010000011100011100000000100001110100010010000101100000001100010101000001100000010000000010000011000001101000000110000000100000101000001010000000000000001000011100000100100000010100000010000011000000001000010101000000100000110000000010 .param INIT_C 0000110100001011000001110001011000001110000011110001101100011111000011110001101100000111000100100000011000010111000011110000111100010010000001100000111000001010000011000000001000000101000001110000010100000110000000000000011000011100000110100000010100000011 .param INIT_D 0000111000010110000001100000011000010010000001000000001000000100000000100001011000000010000001100001001000000110000000100000011000000011000101110000001000010010000010100001101000010101000101100000111000001010000100100000001000011010000011110000011100000011 .param INIT_E 0000111000001100000001110000011100001011000111100000101100000110000100100000010000001010000011100000001000000110000010100000011000001010000011000000000000000100000110100000011000000010000001100000111000010110000000100000010000010000000001000000101000001110 .param INIT_F 0000111000001110000111100001011000010110000001000001000100010100000011110001110000000100000101100000111000001101000111100001011000010011000001100001111100001111000001110001010000000101000001000000011100000110000011100000111000000111000001100000011000000100 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[0] RDATA[1]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[1] RDATA[2]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_8_[0] RDATA[4]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[4] RDATA[5]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[5] RDATA[6]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[6] RDATA[7]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[7] RDATA[8]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[8] RDATA[9]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[9] RDATA[10]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_8_[1] RDATA[12]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[12] RDATA[13]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[13] RDATA[14]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[14] RDATA[15]=$techmap71907\murax.system_ram.ram_symbol2.0.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4509 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0001000000011011001010000001001100101100000101110000010000100101001100000011011100100000000101010000100000110111000011000010010100000100001111100000010000101110000001000011111000101000000001100010100000110010000010000010101000101000001010100000100000100110 .param INIT_1 0010011000110111001101000000010100010010000101110011100000010001000110000000000100110010000110110001000000111110000000000000111100011000000001010011001000001111001001000010011100110100000101010001010000000101001001100000111100100100001011110010000000001011 .param INIT_2 0000100000011111000110100001101100000100000111110011011000011110000101100011111000011010000110110011001000001011000100000011000100100010001000110010000000000011000100100001101100110000000111110010001000101111001100000001111100001010000100110011110000010111 .param INIT_3 0001000000011101000000010001111000010000000101110000000000011111000100000001011100000000000101010001010000010111000001100000111000000100000011110010000000111111000000000000100000011011000110110001100000001011000100100011011100010000001101110000001000100111 .param INIT_4 0001000000011101000000000001000100010010000100110000000100010010000100010001111100000000000111110001000000011110000000000001111000010000000101110000010000010111000101000001010000000100000101010001000000010101000000000001000000010000000100110000000100011011 .param INIT_5 0001010000010111000101100000111000010101000111010000011100011111000101010001110100000101000111010001011100011111000001000001011100010000000101100000000000010001000000110000101100000000000011010001000000011101000101010001110100010100000111010001010000011110 .param INIT_6 0001001100011111000010110000111100000001000011100001001100011111000010010000111100001010000011100000100100001011000000110000011000010001000111110001001100011110000100010001111100011011000111100000000100001111000101100001111100000101000001110001011100010110 .param INIT_7 0001011100011111000000010001111100010111000111110000000000011111000101100001111100010100000111100000001100011111000101000001111100000110000111110000001000011110000101110001111100010011000101110001000100011001000000110001011100010011000111110000001100010111 .param INIT_8 0000100100001101000001000001010100011100000111110000010000010110000101000000011000011001000011110001110000001110000110010001111100001100000011110000110000011111000110000001110100010100000001110000101000001110000011000001011000010100000111110000010000011101 .param INIT_9 0000111000010111000111000000011100011000000111110001111100011111000100110000011100001110000011100001110000011101000001010000011100000101000001110001100000011111000001000000011000011000000111110001110100011111000111010001111100010001000101110001010000011110 .param INIT_A 0001010000010101000001000001111100010100000101110000011000010111000101110000011100010010000101110001001000011111000101100001111000011010000111110001111000011111000001100001011000010111000111110000011000011111000101100001001100000110000111110001001000010111 .param INIT_B 0001000000000000000001110001001100001010000001100001000000010110000110000001110000000000000000000001011000011111000110100000100100000000000010110000100000001101000000100000100100011100000111100001111000001101000011000001110100011110000111010000011000010101 .param INIT_C 0001101000001111000000100000000000001000000010100001100100011101000010100001110100010000000001100000001000000000000110010000100100000010000100010000101000001101000010100000110100000010000010110000001000000011000001100000010100001000000011010000000100011111 .param INIT_D 0001100000011111000100000000001100001100000010110001001000001101000001100000000100010010000000110000011000010011000001100000000100000001000100010000000000000011000010000001110100010010000000100000101000001011000100000000011100001100000010000001000100010101 .param INIT_E 0001111100001001000101010000001100001101000010010001110000001101000001000001110000001100000010100000000100001011000000010000111100001001000010110000011000001100000011110000110000011000000001000001000000011001000100000000100100000110000011010001111000001001 .param INIT_F 0000100000011011000000000000011100000000000000110000011000010100000011100000111000010011000001100001101100001011000110110001100000010100000011010001110100001001000100010000010100010011000010010000111000010001000010010000111100000101000000100000000100000011 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[0] RDATA[1]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[1] RDATA[2]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_8_[2] RDATA[4]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[4] RDATA[5]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[5] RDATA[6]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[6] RDATA[7]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[7] RDATA[8]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[8] RDATA[9]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[9] RDATA[10]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_8_[3] RDATA[12]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[12] RDATA[13]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[13] RDATA[14]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[14] RDATA[15]=$techmap71905\murax.system_ram.ram_symbol2.1.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4509 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0011000000010010001000000000100000100000001010100010000000100000001100000001000000000000000000000011000000001000001000000010100000110000000001000000000000000100000000000000010000000000000010000011000000000000001000000000000000000000000000000010000000110000 .param INIT_1 0000000000000100001000000001011000100010000100100010000000010010001000000011000000100010000100100000000000010000001000000001000000100000000100000010001000010010000000000001000000100000000101000011000000000110001000100000011000000000000000000010000000000000 .param INIT_2 0000000000000010000000000001011000100000001001100010000000010110000000000001011000100000000101100011000000100010001000000011000000100000000100100000000000000110001000000001011000100000000100100000000000010010001000000001001000100000000001100010000000010110 .param INIT_3 0000000000010100000000000001010100000000000110000000000000010001000000000001000100000000000101010000000000010111000000100001011000000000000101000010000000110001000000000001000000000011000000110001000000000011000100000001001100000000001100110010000000010010 .param INIT_4 0000000000010001000000000001001100000010000100110000000000010001000000000001000000000000000100010000000000010000000000000001000000000000000111010000000000011101000000000001010000000000000101110000000000010111000000000001100000000000000110000000000100010001 .param INIT_5 0000000000010110000100000000010000010000000101110000001000010111000000000001011100000000000111010000001000011111000001000001010000000000000100000000000000010001000000100000101100000000000010110000000000010011000000000001011000000000000101110000000000011100 .param INIT_6 0000000000010011000010000000101100000000000000110000000000000011000000000000101100000000000010100000000000011011000000000001001100000000000100110000000000010011000000000001001100011000000110110000000000010011000100000001011000000000000101100000000000010111 .param INIT_7 0000001100010111000000000000011100000000000101110000000000000011000000000001011100000000000101100000000000000011000000000001011100000000000001110000000000000010000000000001011100000000000101110000000000010001000000000000001100000000000100110000000000000011 .param INIT_8 0000000000001001000000000001010100000000000111010000000000010100000000000001010000000000000111010000000000011100000100000001100100000000000011010000000000011101000000000001100100000000000101110000001000001010000000000000010000000000000101010000000000000101 .param INIT_9 0000000000011111000000000001111000000000000110000000000100011111000000000001001100000000000011100000000000000101000000000000010100000000000001110001000000011101000000000000010000000000000110010000000100010101000000000000110100000000000100010000000000000100 .param INIT_A 0000000000010110000000000001010000000000000111000000000000010110000000010001011100000000000101100000000000011010000000000001111100000000000110100000000000011110000000000001011100000001000111110000000000011111000000000001011000000000000111100000000000010011 .param INIT_B 0000000000001011000000010001001100000000000110010001000000001011000100000001100100000000000100100000000000010110000110000001101000000000000000000000100000001000000000000000001000010000000111110000000000011101000000000001111100000000000111110000000000011100 .param INIT_C 0000100000011011000000000001001100011000000110010001100100011101000110000000101100000000000100110001000000011001000110010000101100000000000011110001000000001000000000000000100000000000000000010000000000000001000000000000000000011000000110100001000100010011 .param INIT_D 0000000000001000000100000000000000011000000001000001100000000110000100000001000000010000000001000000000000000100000100000000000000000001000101110001000000010010000010000001101000010000000100110000100000011000000100000001001000011000000011010000000100010011 .param INIT_E 0000100100011100000000010000100100010000000110010001000000001000000000000000000000011000000010000000000100000100000000010000010000001001000011000000000000000110000100000000101000011000000001000000000000000001000100000000010000011000000001100001000000001110 .param INIT_F 0000100000011100000100000001110000010000000001000001000000011101000010000000101100010001000111100001000000001011000100010001110000010000000001000001100000011101000100000001000100010000000000010001100000010100000010010000110000000001000000000000000100001100 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[0] RDATA[1]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[1] RDATA[2]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_8_[4] RDATA[4]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[4] RDATA[5]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[5] RDATA[6]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[6] RDATA[7]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[7] RDATA[8]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[8] RDATA[9]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[9] RDATA[10]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_8_[5] RDATA[12]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[12] RDATA[13]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[13] RDATA[14]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[14] RDATA[15]=$techmap71903\murax.system_ram.ram_symbol2.2.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4509 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0000010000001101001000000000010000100001001010010010110100000100001000010000010100000101000001000000000000000101000010000010100100000100000010000000000000000000000000000010000000000000000001000010010000001000001001000010100000000100001010000010100000000000 .param INIT_1 0010110000100000000110000001000000011000000101100010010000010000001011000000110000100000001111100010110000110000001011000010000000000101000001010010000100001110001010000010000100010100000000000000010000000101001000000000001000101001001001110000110100001010 .param INIT_2 0001011000010100000010000001100000100110000010000011100000111100001100010011100000100000001101000010011000101000001010100000011000101110000001000000100000000000000001100000010000101000000001000010111000101100000100000001110000010010000100000010010000011000 .param INIT_3 0001100000001000000001000000110000010001000001000000000000001100000111000000010000001001000010010001010000001000000110000001001000011000000100000010100000101100000001000000100000000100000001110000001000001110001010000000000000101111000010010010000000001100 .param INIT_4 0001000100001101000011010000000000011000000011100000010000001110000101000000000000001110000000100001011000001100000010000000111100010000000000100000010000001000000111000000010000000000000010000001100000001100000001000000000000011000000011000000010000001101 .param INIT_5 0000110000001000000010000000010000001001000100000001110000011110000001010000100100010000000001000000000000001010000110000000010000000000000011000001100100001001000001000000011100001000000010000000000000001000000001000000100000001100000010000000000000000000 .param INIT_6 0001000000000111000000100000100000000100000001000000101000001100000010000000100100000011000000010001000000010001000000100001000000010000000010000000101000001000000000000001000000000010000110000001000000010000000000100001110000001000000100000000011000001100 .param INIT_7 0000010000001011000000110001001000001100000010010000111100010101000000000000110100000110000100000000010000001100000000100001010000000100000000000000010000000100000010010001110000001010000110000001111000001111000010100000000000011010000101110000010000001000 .param INIT_8 0000110000010100000000000001010000001100000001000000110000011000000000000000000100001001000000010000010100010001000001010001010100000001000001010001010100000001000001000001010100001000000011010000010000000110000000000001010000001100000011000000100000010000 .param INIT_9 0000100000001100000111000000100000000110000101100001101000011111000101010000010100011000000111000000010100000101000000000000001000000111000000110000001100010001000011000000001100000101000001010000001000000111000011010000001100010100000011010000000000000100 .param INIT_A 0000001100000010000100000000000100000000000000100001000000000000000010000001000100000000000000000000010000000100000010000000110100010100000101000001000000001100000001000000010000010100000000010000000000001000000100000000000100001100000010010001010000000100 .param INIT_B 0000101100001010000101000001010100010010000000110001111000001000000001100000000000000110000101100000000000010000000000000000001000000100000000000000001000000100000001100000001000001011000100100000001000000010000100100000100000000010000010000001100000001001 .param INIT_C 0001010100000011000010000001001000010100000000100000011000010111000100110000001100001111000100100001001000001010000101100001001100010110000111100001000000010011000001000000000100000000000000000000010000000010000001100000010000000010000100100001010000010001 .param INIT_D 0001000000011011000001010000000100000101000001000001010000000101000101000000011000010101000100110001010000010011000110100001100000010110000101110001100000001010000000100000011000001001000100100000011000000010000010100000100000000111000001110001101000001011 .param INIT_E 0000010000000100000000000000111100010011000000000001000000010000000100000001010000010100000100000000011000000100000000100000001000000100000001100000100000001000000001000000111000010110000000000001110000011000000001000000010000001001000010000001101000001110 .param INIT_F 0000011000010100000110100001111000001100000101100000000000001100000001110000010100000101000010110000010100010101000001000001011000000011000101010000001100010100000100110001010000010100000001000000011000000110000001000000011000000110000001000000011000001100 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[0] RDATA[1]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[1] RDATA[2]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_8_[6] RDATA[4]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[4] RDATA[5]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[5] RDATA[6]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[6] RDATA[7]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[7] RDATA[8]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[8] RDATA[9]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[9] RDATA[10]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_8_[7] RDATA[12]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[12] RDATA[13]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[13] RDATA[14]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[14] RDATA[15]=$techmap71917\murax.system_ram.ram_symbol2.3.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4509 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0000010100000101000000010010000100110001001000000011101100001000001000100000100100111000001010010000010000100101001100000010000000100100000001000000001000101100001011100000101000100000000000000010110000001110000001100010110000000010000000100010100000101100 .param INIT_1 0000100100101100001110010001000100010000000110000000010000100101000000010011000000110101001101110000100100001100000001000000010000000111000000010001000100100111000010110011100100110111000111010000101000011100000110000010111000001011001010010011110100001101 .param INIT_2 0001001000010010000000100000000000000110001001100011011000110000000111000001100000000000000000000010011000100110001010000001101100101111000011100010000100100011000000100000101000011000001010010000101100110010001101110000111100010010000100100000011000100101 .param INIT_3 0001000000010000000010000001100000010001000100100000001000000101000111100001101000010001000100000001110000011100000001000001100000001001000011010011101100100001000001100001110000000010000000010000011000000111001111100011100000101111000011100000011100100100 .param INIT_4 0001001100010001000011110001110100010010000101010000110000001011000111000001001000011101000111000001100000011000000101110000010100010000000100000000010100010100000111100001100000000000000000010001100000011000000101000001010000010110000100010001000000000100 .param INIT_5 0001111000000000000011000001000000001101000110000001000000010110000110010000110100010000000101000001001000000101000110000001110000011000000000000001001100011001000101110000010100010100000001110001010000000000000001100000111000001111000000000001011000000100 .param INIT_6 0000000100000011000010110000111000001000000110100000011000000010000001010000000100001010000010110000001100000011000000100000001100000011000000010000111000011110000001010000101100001011000011110000100100010001000101100000011000001110000011100000011100001010 .param INIT_7 0001001100001010000100110001111100010110000000000001001100010011000110100000000000011110000100100000001100010001000100100001001000010111000000010000000000000000000110010001100100000011000000100001110100011111000100010001010000001101000011010001010100010010 .param INIT_8 0000100100001001000000000000000000001001000010010000100000001110000000100000010000001111000110110000110100001001000000010001001100000011000000010000011100010011000110000001100000001000000010000000000000000010000100000001000000010011000010010001011100011001 .param INIT_9 0001100000000000000111010001100000000000000000000001101000010001000000100001001100001010000110100000000100000001000000000000010000000011000001100001011100000101000001010000000000000001000000110000000000000000000011110000100000010010000100000000000000000000 .param INIT_A 0001000000000000000111010001010000010101000010000001000000010100000010000000000100010000000000000000000000000001000010000000101000010001000000010001101100011010000000100001000000011000000110100000010000000000000110100001001000011111000110000001000000010011 .param INIT_B 0001110000000100000100110000000100011010000110100000111000011110000000100000000000010010000000100000110000000010000110000000000000001010000000110000100100001010000011110000001100010010000101100000001100001011000101000001011000011110000010000001101000011110 .param INIT_C 0000010100011111000111000001010100011011000010100000000000011011000000110000101100001110000001100000111000010110000100000001001100000010000000000000001100000010000011100000011000001101000011100000100000000000000000110000001000000010000000100000111000011100 .param INIT_D 0000010000010100000100000000011100001110000011110000010000011101000011100001011100010000000101100000010100000000000011100000111000000011000000100001001000010000000010000001100100011010000100010001011100001111000111110000001000001011000110010000101000001011 .param INIT_E 0000010000001000000001010000010100000110000101100001100100010110000010100000101000001110000011100000111100001110000011110000001000000000000010000000110000001000000001000000010000000110000101100000010000011010000101110000011000001000000011000000100100011000 .param INIT_F 0000011000001111000011110000100000001001000100110000010000011000000001110001111100000101000001110000011100000011000011000001010000011011000111110001101100001001000101000000011000011001000011000001010100010100000111010000010000000110000001100000000100001100 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[0] RDATA[1]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[1] RDATA[2]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_9_[0] RDATA[4]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[4] RDATA[5]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[5] RDATA[6]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[6] RDATA[7]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[7] RDATA[8]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[8] RDATA[9]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[9] RDATA[10]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_9_[1] RDATA[12]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[12] RDATA[13]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[13] RDATA[14]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[14] RDATA[15]=$techmap71915\murax.system_ram.ram_symbol3.0.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4506 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0011001100101100000000010000000000000011001100000000000100100000001100010001000000100001001111000010001100000000001000010000000000110110001100100000000000101000001001000000000000000000001000100001000000110010001000000010001000000000001001100011001100100001 .param INIT_1 0000000100000000001001010000011000110001001110110000000100000011000000010010010100000011000000110000000000000001001000000000100000110000001000010000000000010101000000000000000100100100000010010010000000110001000101000001011100000000000000000011000000000000 .param INIT_2 0000001000000001000000010000000000000111001000000000000000001000000101100001000000100000000000000000000000110000000000000010000000100000000001000010000000101000001100000010000100000000000100010000000000001001001000100000011100100001001000000000011100000010 .param INIT_3 0000000000000000000000100000100000000000000000100000000000000010000000000000011000010000000110000000010100000001000000100000000000000101000101010011000100110001000000100000101000000001000000110000001000010100000100000001000000000010000010000001000000010101 .param INIT_4 0000000100000000000100010001000000000010000000000001000000011110000000000000001000010001000000100000001000001010000100100000010100000010000000000001010000010000000000000000000000010100000101100000001000001000000100000000000000000010000000000001000100000110 .param INIT_5 0000001000001010000000000001000000010000000100100001000100000010000000010000101100010000000000010000001000000010000100000000010000000000000000000001000100001000000101000001010000010010000001000000001000000100000101000000001000000001000010100000010000000000 .param INIT_6 0000100100001010000010000000000000000011000010100000100000000000000000100000001000000100000000000000101000010000000001010000000100001010000101000000100100001001000010000000100000000001000100000001100000011000000001000001000000000110000000100000000100000000 .param INIT_7 0000101100001000000010110000100000001000000010000000001100001001000000000000000000000010000000000001000000000000000000100000000000000000000100000001001000000000000000010000000000000000000000000000011100000110000101000000001000000001000000100001000000000010 .param INIT_8 0000000000000000000010000001100000000010000100100000100000001010000100000001001000000001000000100000001100000001000100110000000000010011000100010000001100000001000000000000000000001000000010000000001000000010000100000000000000001000000010000001101000001000 .param INIT_9 0001000000000000000000000000000000000001000000010001000100010001000000010000000100001000000010100000000000000000000000010000000100000010000000100001100100000001000000000000000000010000000000000000000100000001000000010000000000000000000000000000001000000000 .param INIT_A 0000000000000101000100000000100000000000000000000001001100000001000000110000000000000010000000010001001000000000000000100000000000000010000000000000000000000010000100000001001000001000000000100001000000010010000010000000100000010000000000000000000000001000 .param INIT_B 0001000000000000000010010001000100001010000000100001000000000000000100000001000000010010000000100000010000001101000000000000000000000000000010000000110000000000000000100000111000001110000110110000011000000010000100000000010000000000000001000001000000000100 .param INIT_C 0001100100000001000000000001000000000000000000000001100000011000000010110000101100010010000000100000101000010011000000000000000100000000000000000001000000000000000000000000000000000000000000010000000000000000000000000000000000010011000000110001000000000001 .param INIT_D 0000000100000000000100000000001100011100000111010000010000000101000001000001010100000000000000010000000100000000000110000000100100000010000100110000010000000101000101000001000000000000000000000001011000001110000101000001010000000001000010010000001100010011 .param INIT_E 0001100000010000000100010001000100000000000100010000000000000011000000000000000000010001000010000000010000000100000000000000000000000000000000100000000000000000000101000001010000001000000000010000000000001000000101000000011100010001000100010000100100001000 .param INIT_F 0001110100010100000010010000101000010001000100000000100100001000000111110001110100010001000000000001001000010000000001010000010000010000000100000000100000010000000100000001001100000000000000010000110000010100000101000000110000001100000001000000100000001010 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[0] RDATA[1]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[1] RDATA[2]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_9_[2] RDATA[4]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[4] RDATA[5]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[5] RDATA[6]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[6] RDATA[7]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[7] RDATA[8]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[8] RDATA[9]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[9] RDATA[10]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_9_[3] RDATA[12]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[12] RDATA[13]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[13] RDATA[14]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[14] RDATA[15]=$techmap71923\murax.system_ram.ram_symbol3.1.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4506 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0001001100000011001100010000000100000011000000110010000100010011000100110000000100000001001000010010000100100011000000010001000100010000001100000000000000100000000000000010000000000000000000000010000000010000001000000010000000000000001000000010000100110000 .param INIT_1 0000000000100000001000100010001000010010000100100010001000000010001000000000000000100000000000100000001100000001000000010000000100010001000100110010001100000001000000010010001100100001001000110001000100010011001000110000000100000011001000010010001100100001 .param INIT_2 0000000000000000000000010000000100100000000000000010000000000000000100100001001000000000000000010001000000010000001000000000000000000000000000000000000000100010000100000001000000100000000000100000000000100000001100000011000000000000000000000010000000000000 .param INIT_3 0000000000000000000000100001000000000010000000000000001000010000000000100000000000000000000000000000000100000001000000000000000000000011000000010010000100100011000000000000000000000001000000110001000000010000000000000001000000010000001000000011000100010001 .param INIT_4 0000000100000011000000010000001100000010000000000000001000000000000000100000000000000010000000000000001000000000000000110000000000000010000000000000000000000000000000000000001000000010000000000000001100000010000000000000000000000010000000000000000100000011 .param INIT_5 0000000100000000000100000001000000010010000000100000001100000011000000110000001100000000000000000000000000000010000000100000010000000000000000000000000100000011000001100000010000000010000000100000001000000010000100100001001000000010000000100000000000000010 .param INIT_6 0000000000001000000010000000100000000001000000010000000000000000000000000000000000000100000001000000000000000000000000000000000000000000000100000000100000001000000000000000001000010000000010000001000000010010000100010001000000000000000000000000000000000000 .param INIT_7 0000000100001001000000010000100100000000000010000000100100000001000010000000000000001000000000000000100000000000000000000000000000000000000000000000001000000010000000000000000000000000000000000000011000000100000001000000010000000000000000000000000000000000 .param INIT_8 0000000000000000000110000000100000000010000000000000101000001000000100100001000000000011000010010000001100001001000000110001000100000011000010010000001100001001000000000000000000001000000010000000001000000010000000100000000000000000000010100000000000001000 .param INIT_9 0000000000000000000000000000000000000001000000010001000100010001000000000000000000001000000010100000000000000000000000000000000000000010000000100001100100000001000000000000000000010000000100000000000100000001000000010000000100000000000010000000001000000010 .param INIT_A 0000000000000000000000000000000000000000000000000000000100000001000000010000000000000000000000000001000000011000000000000000000000000000000000000000000000000000000000000000000000001001000010010000000000000000000000000000100000000000000000000000000000000000 .param INIT_B 0000000000000000000100000001000100011010000100100000000000010000000000000001000000010010000100100000000000000000000000000000100000000000000000000000000000001000000000100000001000011010000010100000001000000010000000000000000000000000000000000000000000000000 .param INIT_C 0000000100000001000000000000000000001000000010000000100000001001000100110000001100000010000000100001101000001010000100000000100100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011000100110000000100010001 .param INIT_D 0000000000010000000100000001000000000100000011000001010000000100000101000000010000010000000000000000000000000000000010010000100100000010000000100001010000010100000100000000000000000000000001000000011000000110000100000000100000000001000100010000001000001010 .param INIT_E 0000100000010001000000000000000100010000000000000001000000000000000000000000000000000000000010010000010000000101000000000000000100001000000010010000000000000000000001000000010000011000000010000000000000010000000101000001010000000000000000000001100000001000 .param INIT_F 0000010000001100000110000001100000010000000000000001100100001000000001010000110100000001000100010000000000010000000001010000010100010000000000000000000000000000000100000001000000000000000100000000110000001100000111000000010100000100000001000000100000001001 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[0] RDATA[1]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[1] RDATA[2]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_9_[4] RDATA[4]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[4] RDATA[5]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[5] RDATA[6]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[6] RDATA[7]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[7] RDATA[8]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[8] RDATA[9]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[9] RDATA[10]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_9_[5] RDATA[12]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[12] RDATA[13]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[13] RDATA[14]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[14] RDATA[15]=$techmap71921\murax.system_ram.ram_symbol3.2.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4506 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0000001100110001000000010000000100000011001000010000000100000001000000010001000100000001001000010000001100100011000000010000000100010000000100000000000000100000001100000001000000000000001000000011000000110000000000000010000000000000000000000001000000010000 .param INIT_1 0000001000000010001000000000000000000000001000000000000000000000000000000000000000000000001000100000000000100001001000010000000100010001001100010000000100000011000000010000000100100001000000010000000100100001000000010000001100010001000100010010000100000001 .param INIT_2 0000000000000000000000010000000000000000000000000000000000100000000000110010001100100000000000000000000000100000000000000000001000000000000000000001000000110000000100000011000000000000000000000000000000000000001100000001000000000000001000000000000000000000 .param INIT_3 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000000001001000000001000000010010000100100001000000000000000000010001000100010000000000000000001000000010000000100000001100000010000000100000 .param INIT_4 0000000100000001000000010000000100000000000000000000000000000000000000010000000100000000000000000000000000000000000000000000000000000001000000010000000000000000000000000000000000000001000000010000001000000000000000000000000000000000000000000000001100000011 .param INIT_5 0000000000000000000000100000001000010000000100000000001100000011000000000000000000000000000000000000000000000000000000010000010100000000000000000000000100000001000001000000010000000000000000000000000000000000000100010001000100000000000000000000000000000000 .param INIT_6 0000100000001000000000000001000000000001000000010001000000010000000000000000000000000100000001010000100000011000000000000000000000000000000100000000100000001000000000000000000000010000000010000001000000010000000100000001000000000001000000010000000000000000 .param INIT_7 0000001100000011000000010000000100000000000000000000000100000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000000000000000000000000000000000010000000110000001000000010000000000000000000000000000000000 .param INIT_8 0000000000010000000100000001000000000000000000000000000000000000000110000001100000000001000000010000000100000001000000010000000100000001000000010000000100000001000000000000000000001000000010000000001000000010000010000000100000000000000000000000000000000000 .param INIT_9 0000000000000000000000000000000000000001000000010000000100000001000000000000100000001010000110000001100000011000000100000001000000000010000000100000000000000000000000000000000000010000000100000000100100001001000100010001000100000000000000000001101000011010 .param INIT_A 0000000000000000000000000000000000000000000000000000000100001001000000010000000100000000000000000001000000010000000000000000000000000000000000000000000000000000000010000000000000001001000010010000000000000000000000000000000000000000000000000000000000000000 .param INIT_B 0001000000010000000100010000000100001010000000100000000000010000000000000001000000000010000100100001000000000000000010000001000000000000000000000000100000000000000000100000001000011010000110100000001000000010000000000000000000000000000000000000000000000000 .param INIT_C 0000100000000000000100000000000000000000000010000000000100000001000110100001001000010010000000100000101000001010000010010001000100000000000100000001000000000000000000000000000000000000000000000000000000000000000000000000000000000011000000110000000100010001 .param INIT_D 0000000000000000000100000000000000000100000111000000010000000100000001000000010000000000000100000000000000010000000110010000100100011011000110110001000000000000000010000000000000010100000000000000111000010110000100000000000000001000000000000001001100010011 .param INIT_E 0000000000001000000000010000000000000000000000000000000000010000000000000001000000011000000010000000010000000100000000000000000000001000000010000000000000000000000001010001010100000000000000000000000000000000000101000000010000000000000100000000000000000000 .param INIT_F 0001010000001100000110000000100000000000000100000001100100011001000001010001110100010000000100000001000000010000000101000001010000010000000000000000100000011000000000000001000000000000000100000000010000000100000001000001110000000100000001000000100000001000 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] RADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] RADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] RADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] RADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] RADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] RADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] RADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] RADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] RADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] RADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] RCLK=io_mainClk RCLKE=murax.system_ram.io_bus_cmd_valid RDATA[0]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[0] RDATA[1]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[1] RDATA[2]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[2] RDATA[3]=murax.system_ram._zz_9_[6] RDATA[4]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[4] RDATA[5]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[5] RDATA[6]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[6] RDATA[7]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[7] RDATA[8]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[8] RDATA[9]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[9] RDATA[10]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[10] RDATA[11]=murax.system_ram._zz_9_[7] RDATA[12]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[12] RDATA[13]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[13] RDATA[14]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[14] RDATA[15]=$techmap71926\murax.system_ram.ram_symbol3.3.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] WADDR[1]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] WADDR[2]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] WADDR[3]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] WADDR[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] WADDR[5]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] WADDR[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] WADDR[7]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] WADDR[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] WADDR[9]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] WADDR[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] WCLK=io_mainClk WCLKE=$abc$159056$n4506 WDATA[0]=$undef WDATA[1]=$undef WDATA[2]=$undef WDATA[3]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] WDATA[4]=$undef WDATA[5]=$undef WDATA[6]=$undef WDATA[7]=$undef WDATA[8]=$undef WDATA[9]=$undef WDATA[10]=$undef WDATA[11]=murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] WDATA[12]=$undef WDATA[13]=$undef WDATA[14]=$undef WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 0011000100100001001100010000000100100001001000010010000100000001000100010000000100100011000000010000001100100011001000010010000100110000000100000011000000100000001100000011000000010000001000000010000000100000000000000010000000010000000000000011000000110000 .param INIT_1 0000001000100010000000000000001000100010001000100010000000000010001000100000000000100010000000100010001000100001000000010000000100110001001100010010001100000011000000010010000100000001000000010010000100110001001000110000001100010001001100010000000100000001 .param INIT_2 0000000100000000000000010000000000100001000000010010000000000000001000100010001000000000000000000010000000110000001000000000000000000000000000000011000000010000001100000011000000100000000000000000000000100000000100000001000000100000001000000010000000000000 .param INIT_3 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000011000000010010000000100000001000000000000000110011000100110000000000010000001100000010000000100000000000000000000100100000 .param INIT_4 0000000100000001000000010000000100000010000000100000000000000000000000010000000100000000000000000000000000000000000000000000000100000000000000000000000100000000000000000000000000000000000000000000000100000000000000100000000000000000000000000000001100000011 .param INIT_5 0000000100000000000000100001001000010000000100100000001100000001000000000000001000000010000000000000001000000010000001110000010100000000000000000000000100000001000001100000011000000000000000000000000000000000000100010001000100000000000000000000000000000000 .param INIT_6 0000100000001000000010000000000000000001000000010001000000010000000000000000100000000100000001000001000000011000000000000000000000010000000100000000100000001000000000000000000000011000000110000001000000010000000100010001000000000001000000010000000000000000 .param INIT_7 0000001100000001000000010000000100000000000000000000000100000001000000000000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000000000000000000000000000000000000000000000000001000000010000000000000000000000000000000000 .param INIT_8 0000000000000000000100000001000000000000000000000000000000000000000110000001100000000001000000010000000100000001000100010001000100000001000000010000000100000001000000000000000000001000000010000000001000000000000010100000100000000000000000000000000000000000 .param INIT_9 0000000000000000000000000000000000000001000000010000000100000011000000000000000000001010000010100001100000011000000100000001000000001010000000100001000000010000000000000000000000010000000100000000100100001001000100010001000100000000000000000001101000011010 .param INIT_A 0000000000000000000000000000000000000000000000000000000100000001000000010000000100000000000000000001000000010000000000000000000000000000000000000000000000000000000010000000100000001001000010010000000000000000000000000000000000000000000000000000000000000000 .param INIT_B 0000000000010000000000010001000100000010000100100001000000010000000000000000000000000010000000100001000000000000000110000001000000000000000000000000100000000000000000100000001000011010000110100000001000000010000000000000000000000000000000000000000000000000 .param INIT_C 0001100000010000000100000000000000011000000010000000100100011001000110100000001000010010000000100001101000001010000110010000000100010000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000011011000010110001000100010001 .param INIT_D 0000000000010000000000000000000000010100000101000001010000000100000101000000010000011000000000000001100000010000000010010000100100001011000110110000000000000000000110000001000000010000000100000001111000000110000100000000000000001000000000000000001100010011 .param INIT_E 0000100000000000000000010000000100010000000000010001000100000000000100000001000000001000000000000000010000000100000010000000000000001000000000000000000100000000000101010001010100010000000010000000100000010000000001000000010000010000000100000001000000000000 .param INIT_F 0001110000000100000010000000100000010000000100000001100100001001000011010000010100010000000000010001000000010000000101000000010100010001000000000001100000010000000000000000000100010000000100010001010100011100000011000001010000000100000001000000100000001000 .param READ_MODE 00000000000000000000000000000011 .param WRITE_MODE 00000000000000000000000000000011 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[0] RADDR[1]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[1] RADDR[2]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[2] RADDR[3]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_valueNext[3] RADDR[4]=$false RADDR[5]=$false RADDR[6]=$false RADDR[7]=$false RADDR[8]=$false RADDR[9]=$false RADDR[10]=$false RCLK=io_mainClk RCLKE=$true RDATA[0]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[0] RDATA[1]=$techmap71924\murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[1] RDATA[2]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[1] RDATA[3]=$techmap71924\murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[3] RDATA[4]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[2] RDATA[5]=$techmap71924\murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[5] RDATA[6]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[3] RDATA[7]=$techmap71924\murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[7] RDATA[8]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[4] RDATA[9]=$techmap71924\murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[9] RDATA[10]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[5] RDATA[11]=$techmap71924\murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[11] RDATA[12]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[6] RDATA[13]=$techmap71924\murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[13] RDATA[14]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[7] RDATA[15]=$techmap71924\murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[0] WADDR[1]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[1] WADDR[2]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[2] WADDR[3]=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_value[3] WADDR[4]=$false WADDR[5]=$false WADDR[6]=$false WADDR[7]=$false WADDR[8]=$false WADDR[9]=$false WADDR[10]=$false WCLK=io_mainClk WCLKE=murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ WDATA[0]=murax.system_uartCtrl._zz_6_ WDATA[1]=$undef WDATA[2]=murax.system_uartCtrl._zz_7_ WDATA[3]=$undef WDATA[4]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] WDATA[5]=$undef WDATA[6]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] WDATA[7]=$undef WDATA[8]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] WDATA[9]=$undef WDATA[10]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] WDATA[11]=$undef WDATA[12]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] WDATA[13]=$undef WDATA[14]=murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_1 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_2 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_3 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_4 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_5 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_6 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_7 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_8 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_9 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_A xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_B xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_C xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_D xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_E xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_F xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param READ_MODE 00000000000000000000000000000001 .param WRITE_MODE 00000000000000000000000000000001 .gate SB_RAM40_4K MASK[0]=$undef MASK[1]=$undef MASK[2]=$undef MASK[3]=$undef MASK[4]=$undef MASK[5]=$undef MASK[6]=$undef MASK[7]=$undef MASK[8]=$undef MASK[9]=$undef MASK[10]=$undef MASK[11]=$undef MASK[12]=$undef MASK[13]=$undef MASK[14]=$undef MASK[15]=$undef RADDR[0]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[0] RADDR[1]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[1] RADDR[2]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[2] RADDR[3]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_valueNext[3] RADDR[4]=$false RADDR[5]=$false RADDR[6]=$false RADDR[7]=$false RADDR[8]=$false RADDR[9]=$false RADDR[10]=$false RCLK=io_mainClk RCLKE=$true RDATA[0]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[0] RDATA[1]=$techmap71919\murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[1] RDATA[2]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[1] RDATA[3]=$techmap71919\murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[3] RDATA[4]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[2] RDATA[5]=$techmap71919\murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[5] RDATA[6]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[3] RDATA[7]=$techmap71919\murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[7] RDATA[8]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[4] RDATA[9]=$techmap71919\murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[9] RDATA[10]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[5] RDATA[11]=$techmap71919\murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[11] RDATA[12]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[6] RDATA[13]=$techmap71919\murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[13] RDATA[14]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[7] RDATA[15]=$techmap71919\murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ram.0.0.0.A1DATA_16[15] RE=$true WADDR[0]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[0] WADDR[1]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[1] WADDR[2]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[2] WADDR[3]=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_value[3] WADDR[4]=$false WADDR[5]=$false WADDR[6]=$false WADDR[7]=$false WADDR[8]=$false WADDR[9]=$false WADDR[10]=$false WCLK=io_mainClk WCLKE=murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ WDATA[0]=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[0] WDATA[1]=$undef WDATA[2]=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[1] WDATA[3]=$undef WDATA[4]=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[2] WDATA[5]=$undef WDATA[6]=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[3] WDATA[7]=$undef WDATA[8]=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[4] WDATA[9]=$undef WDATA[10]=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[5] WDATA[11]=$undef WDATA[12]=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[6] WDATA[13]=$undef WDATA[14]=murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[7] WDATA[15]=$undef WE=$true .attr src "/usr/local/bin/../share/yosys/ice40/brams_map.v:277|/usr/local/bin/../share/yosys/ice40/brams_map.v:35" .param INIT_0 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_1 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_2 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_3 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_4 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_5 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_6 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_7 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_8 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_9 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_A xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_B xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_C xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_D xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_E xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param INIT_F xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx .param READ_MODE 00000000000000000000000000000001 .param WRITE_MODE 00000000000000000000000000000001 .names murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext io_B12 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[0] io_gpioA_write[0] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[1] io_gpioA_write[1] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[2] io_gpioA_write[2] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[3] io_gpioA_write[3] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[4] io_gpioA_write[4] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[5] io_gpioA_write[5] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[6] io_gpioA_write[6] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[7] io_gpioA_write[7] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[8] io_gpioA_write[8] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[9] io_gpioA_write[9] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[10] io_gpioA_write[10] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[11] io_gpioA_write[11] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[12] io_gpioA_write[12] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[13] io_gpioA_write[13] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[14] io_gpioA_write[14] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[15] io_gpioA_write[15] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[16] io_gpioA_write[16] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[17] io_gpioA_write[17] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[18] io_gpioA_write[18] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[19] io_gpioA_write[19] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[20] io_gpioA_write[20] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[21] io_gpioA_write[21] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[22] io_gpioA_write[22] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[23] io_gpioA_write[23] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[24] io_gpioA_write[24] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[25] io_gpioA_write[25] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[26] io_gpioA_write[26] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[27] io_gpioA_write[27] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[28] io_gpioA_write[28] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[29] io_gpioA_write[29] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[30] io_gpioA_write[30] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[31] io_gpioA_write[31] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[0] io_gpioA_writeEnable[0] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[1] io_gpioA_writeEnable[1] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[2] io_gpioA_writeEnable[2] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[3] io_gpioA_writeEnable[3] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[4] io_gpioA_writeEnable[4] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[5] io_gpioA_writeEnable[5] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[6] io_gpioA_writeEnable[6] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[7] io_gpioA_writeEnable[7] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[8] io_gpioA_writeEnable[8] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[9] io_gpioA_writeEnable[9] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[10] io_gpioA_writeEnable[10] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[11] io_gpioA_writeEnable[11] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[12] io_gpioA_writeEnable[12] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[13] io_gpioA_writeEnable[13] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[14] io_gpioA_writeEnable[14] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[15] io_gpioA_writeEnable[15] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[16] io_gpioA_writeEnable[16] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[17] io_gpioA_writeEnable[17] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[18] io_gpioA_writeEnable[18] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[19] io_gpioA_writeEnable[19] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[20] io_gpioA_writeEnable[20] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[21] io_gpioA_writeEnable[21] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[22] io_gpioA_writeEnable[22] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[23] io_gpioA_writeEnable[23] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[24] io_gpioA_writeEnable[24] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[25] io_gpioA_writeEnable[25] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[26] io_gpioA_writeEnable[26] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[27] io_gpioA_writeEnable[27] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[28] io_gpioA_writeEnable[28] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[29] io_gpioA_writeEnable[29] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[30] io_gpioA_writeEnable[30] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[31] io_gpioA_writeEnable[31] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[0] io_led[0] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[1] io_led[1] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[2] io_led[2] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[3] io_led[3] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[4] io_led[4] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[5] io_led[5] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[6] io_led[6] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[7] io_led[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax._zz_10_[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax._zz_10_[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax._zz_10_[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax._zz_10_[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax._zz_10_[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax._zz_10_[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax._zz_10_[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax._zz_10_[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax._zz_11_[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax._zz_11_[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax._zz_11_[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax._zz_11_[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax._zz_11_[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax._zz_11_[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax._zz_11_[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax._zz_11_[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax._zz_13_[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax._zz_13_[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax._zz_13_[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax._zz_13_[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax._zz_13_[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax._zz_13_[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax._zz_13_[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax._zz_13_[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax._zz_13_[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax._zz_13_[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax._zz_13_[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax._zz_13_[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax._zz_13_[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax._zz_13_[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax._zz_13_[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax._zz_13_[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax._zz_13_[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax._zz_13_[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax._zz_13_[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax._zz_13_[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax._zz_13_[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax._zz_13_[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax._zz_13_[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax._zz_13_[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax._zz_13_[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax._zz_13_[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax._zz_13_[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax._zz_13_[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax._zz_13_[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax._zz_13_[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax._zz_13_[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax._zz_13_[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write murax._zz_3_ 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write murax._zz_4_ 1 1 .names $undef murax._zz_5_[0] 1 1 .names $undef murax._zz_5_[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[2] murax._zz_5_[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[3] murax._zz_5_[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[4] murax._zz_5_[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[5] murax._zz_5_[5] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[6] murax._zz_5_[6] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[7] murax._zz_5_[7] 1 1 .names murax.system_ram.io_bus_cmd_valid murax._zz_6_ 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax._zz_8_[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax._zz_8_[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax._zz_8_[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax._zz_8_[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax._zz_9_[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax._zz_9_[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax._zz_9_[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax._zz_9_[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] murax.apb3Router_1_._zz_5_[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] murax.apb3Router_1_._zz_5_[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] murax.apb3Router_1_._zz_5_[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] murax.apb3Router_1_._zz_5_[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] murax.apb3Router_1_._zz_5_[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] murax.apb3Router_1_._zz_5_[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] murax.apb3Router_1_._zz_5_[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] murax.apb3Router_1_._zz_5_[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] murax.apb3Router_1_._zz_5_[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] murax.apb3Router_1_._zz_5_[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] murax.apb3Router_1_._zz_5_[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] murax.apb3Router_1_._zz_5_[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] murax.apb3Router_1_._zz_5_[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] murax.apb3Router_1_._zz_5_[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] murax.apb3Router_1_._zz_5_[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] murax.apb3Router_1_._zz_5_[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] murax.apb3Router_1_._zz_5_[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] murax.apb3Router_1_._zz_5_[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] murax.apb3Router_1_._zz_5_[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] murax.apb3Router_1_._zz_5_[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] murax.apb3Router_1_._zz_5_[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] murax.apb3Router_1_._zz_5_[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] murax.apb3Router_1_._zz_5_[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] murax.apb3Router_1_._zz_5_[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] murax.apb3Router_1_._zz_5_[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] murax.apb3Router_1_._zz_5_[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] murax.apb3Router_1_._zz_5_[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] murax.apb3Router_1_._zz_5_[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] murax.apb3Router_1_._zz_5_[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] murax.apb3Router_1_._zz_5_[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] murax.apb3Router_1_._zz_5_[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] murax.apb3Router_1_._zz_5_[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1_.io_input_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1_.io_input_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1_.io_input_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1_.io_input_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1_.io_input_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1_.io_input_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1_.io_input_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1_.io_input_PADDR[7] 1 1 .names $undef murax.apb3Router_1_.io_input_PADDR[8] 1 1 .names $undef murax.apb3Router_1_.io_input_PADDR[9] 1 1 .names $undef murax.apb3Router_1_.io_input_PADDR[10] 1 1 .names $undef murax.apb3Router_1_.io_input_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1_.io_input_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1_.io_input_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1_.io_input_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1_.io_input_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1_.io_input_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1_.io_input_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1_.io_input_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1_.io_input_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1_.io_input_PENABLE 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] murax.apb3Router_1_.io_input_PRDATA[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] murax.apb3Router_1_.io_input_PRDATA[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] murax.apb3Router_1_.io_input_PRDATA[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] murax.apb3Router_1_.io_input_PRDATA[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] murax.apb3Router_1_.io_input_PRDATA[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] murax.apb3Router_1_.io_input_PRDATA[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] murax.apb3Router_1_.io_input_PRDATA[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] murax.apb3Router_1_.io_input_PRDATA[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] murax.apb3Router_1_.io_input_PRDATA[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] murax.apb3Router_1_.io_input_PRDATA[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] murax.apb3Router_1_.io_input_PRDATA[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] murax.apb3Router_1_.io_input_PRDATA[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] murax.apb3Router_1_.io_input_PRDATA[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] murax.apb3Router_1_.io_input_PRDATA[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] murax.apb3Router_1_.io_input_PRDATA[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] murax.apb3Router_1_.io_input_PRDATA[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] murax.apb3Router_1_.io_input_PRDATA[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] murax.apb3Router_1_.io_input_PRDATA[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] murax.apb3Router_1_.io_input_PRDATA[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] murax.apb3Router_1_.io_input_PRDATA[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] murax.apb3Router_1_.io_input_PRDATA[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] murax.apb3Router_1_.io_input_PRDATA[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] murax.apb3Router_1_.io_input_PRDATA[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] murax.apb3Router_1_.io_input_PRDATA[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] murax.apb3Router_1_.io_input_PRDATA[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] murax.apb3Router_1_.io_input_PRDATA[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] murax.apb3Router_1_.io_input_PRDATA[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] murax.apb3Router_1_.io_input_PRDATA[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] murax.apb3Router_1_.io_input_PRDATA[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] murax.apb3Router_1_.io_input_PRDATA[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] murax.apb3Router_1_.io_input_PRDATA[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] murax.apb3Router_1_.io_input_PRDATA[31] 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1_.io_input_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1_.io_input_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1_.io_input_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1_.io_input_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1_.io_input_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1_.io_input_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1_.io_input_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1_.io_input_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1_.io_input_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1_.io_input_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1_.io_input_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1_.io_input_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1_.io_input_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1_.io_input_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1_.io_input_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1_.io_input_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1_.io_input_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1_.io_input_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1_.io_input_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1_.io_input_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1_.io_input_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1_.io_input_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1_.io_input_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1_.io_input_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1_.io_input_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1_.io_input_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1_.io_input_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1_.io_input_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1_.io_input_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1_.io_input_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1_.io_input_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1_.io_input_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1_.io_input_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1_.io_outputs_0_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1_.io_outputs_0_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1_.io_outputs_0_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1_.io_outputs_0_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1_.io_outputs_0_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1_.io_outputs_0_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1_.io_outputs_0_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1_.io_outputs_0_PADDR[7] 1 1 .names $undef murax.apb3Router_1_.io_outputs_0_PADDR[8] 1 1 .names $undef murax.apb3Router_1_.io_outputs_0_PADDR[9] 1 1 .names $undef murax.apb3Router_1_.io_outputs_0_PADDR[10] 1 1 .names $undef murax.apb3Router_1_.io_outputs_0_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1_.io_outputs_0_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1_.io_outputs_0_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1_.io_outputs_0_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1_.io_outputs_0_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1_.io_outputs_0_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1_.io_outputs_0_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1_.io_outputs_0_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1_.io_outputs_0_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1_.io_outputs_0_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1_.io_outputs_0_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1_.io_outputs_0_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1_.io_outputs_0_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1_.io_outputs_0_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1_.io_outputs_0_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1_.io_outputs_0_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1_.io_outputs_0_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1_.io_outputs_0_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1_.io_outputs_0_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1_.io_outputs_0_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1_.io_outputs_0_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1_.io_outputs_0_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1_.io_outputs_0_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1_.io_outputs_0_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1_.io_outputs_0_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1_.io_outputs_0_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1_.io_outputs_0_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1_.io_outputs_0_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1_.io_outputs_0_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1_.io_outputs_0_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1_.io_outputs_0_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1_.io_outputs_0_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1_.io_outputs_0_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1_.io_outputs_0_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1_.io_outputs_0_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1_.io_outputs_0_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1_.io_outputs_0_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1_.io_outputs_0_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1_.io_outputs_0_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1_.io_outputs_0_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1_.io_outputs_0_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1_.io_outputs_0_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1_.io_outputs_0_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1_.io_outputs_1_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1_.io_outputs_1_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1_.io_outputs_1_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1_.io_outputs_1_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1_.io_outputs_1_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1_.io_outputs_1_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1_.io_outputs_1_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1_.io_outputs_1_PADDR[7] 1 1 .names $undef murax.apb3Router_1_.io_outputs_1_PADDR[8] 1 1 .names $undef murax.apb3Router_1_.io_outputs_1_PADDR[9] 1 1 .names $undef murax.apb3Router_1_.io_outputs_1_PADDR[10] 1 1 .names $undef murax.apb3Router_1_.io_outputs_1_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1_.io_outputs_1_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1_.io_outputs_1_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1_.io_outputs_1_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1_.io_outputs_1_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1_.io_outputs_1_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1_.io_outputs_1_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1_.io_outputs_1_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1_.io_outputs_1_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1_.io_outputs_1_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1_.io_outputs_1_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1_.io_outputs_1_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1_.io_outputs_1_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1_.io_outputs_1_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1_.io_outputs_1_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1_.io_outputs_1_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1_.io_outputs_1_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1_.io_outputs_1_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1_.io_outputs_1_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1_.io_outputs_1_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1_.io_outputs_1_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1_.io_outputs_1_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1_.io_outputs_1_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1_.io_outputs_1_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1_.io_outputs_1_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1_.io_outputs_1_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1_.io_outputs_1_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1_.io_outputs_1_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1_.io_outputs_1_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1_.io_outputs_1_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1_.io_outputs_1_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1_.io_outputs_1_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1_.io_outputs_1_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1_.io_outputs_1_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1_.io_outputs_1_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1_.io_outputs_1_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1_.io_outputs_1_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1_.io_outputs_1_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1_.io_outputs_1_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1_.io_outputs_1_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1_.io_outputs_1_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1_.io_outputs_1_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1_.io_outputs_1_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1_.io_outputs_2_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1_.io_outputs_2_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1_.io_outputs_2_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1_.io_outputs_2_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1_.io_outputs_2_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1_.io_outputs_2_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1_.io_outputs_2_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1_.io_outputs_2_PADDR[7] 1 1 .names $undef murax.apb3Router_1_.io_outputs_2_PADDR[8] 1 1 .names $undef murax.apb3Router_1_.io_outputs_2_PADDR[9] 1 1 .names $undef murax.apb3Router_1_.io_outputs_2_PADDR[10] 1 1 .names $undef murax.apb3Router_1_.io_outputs_2_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1_.io_outputs_2_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1_.io_outputs_2_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1_.io_outputs_2_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1_.io_outputs_2_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1_.io_outputs_2_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1_.io_outputs_2_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1_.io_outputs_2_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1_.io_outputs_2_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1_.io_outputs_2_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1_.io_outputs_2_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1_.io_outputs_2_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1_.io_outputs_2_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1_.io_outputs_2_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1_.io_outputs_2_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1_.io_outputs_2_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1_.io_outputs_2_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1_.io_outputs_2_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1_.io_outputs_2_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1_.io_outputs_2_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1_.io_outputs_2_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1_.io_outputs_2_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1_.io_outputs_2_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1_.io_outputs_2_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1_.io_outputs_2_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1_.io_outputs_2_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1_.io_outputs_2_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1_.io_outputs_2_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1_.io_outputs_2_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1_.io_outputs_2_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1_.io_outputs_2_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1_.io_outputs_2_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1_.io_outputs_2_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1_.io_outputs_2_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1_.io_outputs_2_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1_.io_outputs_2_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1_.io_outputs_2_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1_.io_outputs_2_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1_.io_outputs_2_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1_.io_outputs_2_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1_.io_outputs_2_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1_.io_outputs_2_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1_.io_outputs_2_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1_.io_outputs_3_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1_.io_outputs_3_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1_.io_outputs_3_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1_.io_outputs_3_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1_.io_outputs_3_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1_.io_outputs_3_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1_.io_outputs_3_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1_.io_outputs_3_PADDR[7] 1 1 .names $undef murax.apb3Router_1_.io_outputs_3_PADDR[8] 1 1 .names $undef murax.apb3Router_1_.io_outputs_3_PADDR[9] 1 1 .names $undef murax.apb3Router_1_.io_outputs_3_PADDR[10] 1 1 .names $undef murax.apb3Router_1_.io_outputs_3_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1_.io_outputs_3_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1_.io_outputs_3_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1_.io_outputs_3_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1_.io_outputs_3_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1_.io_outputs_3_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1_.io_outputs_3_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1_.io_outputs_3_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1_.io_outputs_3_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1_.io_outputs_3_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1_.io_outputs_3_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1_.io_outputs_3_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1_.io_outputs_3_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1_.io_outputs_3_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1_.io_outputs_3_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1_.io_outputs_3_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1_.io_outputs_3_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1_.io_outputs_3_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1_.io_outputs_3_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1_.io_outputs_3_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1_.io_outputs_3_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1_.io_outputs_3_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1_.io_outputs_3_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1_.io_outputs_3_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1_.io_outputs_3_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1_.io_outputs_3_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1_.io_outputs_3_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1_.io_outputs_3_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1_.io_outputs_3_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1_.io_outputs_3_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1_.io_outputs_3_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1_.io_outputs_3_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1_.io_outputs_3_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1_.io_outputs_3_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1_.io_outputs_3_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1_.io_outputs_3_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1_.io_outputs_3_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1_.io_outputs_3_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1_.io_outputs_3_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1_.io_outputs_3_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1_.io_outputs_3_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1_.io_outputs_3_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1_.io_outputs_3_PWRITE 1 1 .names io_mainClk murax.apb3Router_1_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.apb3Router_1_.toplevel_resetCtrl_systemReset 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] murax.apb3Router_1__io_input_PRDATA[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] murax.apb3Router_1__io_input_PRDATA[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] murax.apb3Router_1__io_input_PRDATA[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] murax.apb3Router_1__io_input_PRDATA[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] murax.apb3Router_1__io_input_PRDATA[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] murax.apb3Router_1__io_input_PRDATA[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] murax.apb3Router_1__io_input_PRDATA[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] murax.apb3Router_1__io_input_PRDATA[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] murax.apb3Router_1__io_input_PRDATA[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] murax.apb3Router_1__io_input_PRDATA[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] murax.apb3Router_1__io_input_PRDATA[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] murax.apb3Router_1__io_input_PRDATA[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] murax.apb3Router_1__io_input_PRDATA[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] murax.apb3Router_1__io_input_PRDATA[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] murax.apb3Router_1__io_input_PRDATA[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] murax.apb3Router_1__io_input_PRDATA[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] murax.apb3Router_1__io_input_PRDATA[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] murax.apb3Router_1__io_input_PRDATA[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] murax.apb3Router_1__io_input_PRDATA[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] murax.apb3Router_1__io_input_PRDATA[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] murax.apb3Router_1__io_input_PRDATA[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] murax.apb3Router_1__io_input_PRDATA[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] murax.apb3Router_1__io_input_PRDATA[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] murax.apb3Router_1__io_input_PRDATA[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] murax.apb3Router_1__io_input_PRDATA[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] murax.apb3Router_1__io_input_PRDATA[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] murax.apb3Router_1__io_input_PRDATA[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] murax.apb3Router_1__io_input_PRDATA[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] murax.apb3Router_1__io_input_PRDATA[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] murax.apb3Router_1__io_input_PRDATA[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] murax.apb3Router_1__io_input_PRDATA[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] murax.apb3Router_1__io_input_PRDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1__io_outputs_0_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1__io_outputs_0_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1__io_outputs_0_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1__io_outputs_0_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1__io_outputs_0_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1__io_outputs_0_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1__io_outputs_0_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1__io_outputs_0_PADDR[7] 1 1 .names $undef murax.apb3Router_1__io_outputs_0_PADDR[8] 1 1 .names $undef murax.apb3Router_1__io_outputs_0_PADDR[9] 1 1 .names $undef murax.apb3Router_1__io_outputs_0_PADDR[10] 1 1 .names $undef murax.apb3Router_1__io_outputs_0_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1__io_outputs_0_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1__io_outputs_0_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1__io_outputs_0_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1__io_outputs_0_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1__io_outputs_0_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1__io_outputs_0_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1__io_outputs_0_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1__io_outputs_0_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1__io_outputs_0_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1__io_outputs_0_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1__io_outputs_0_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1__io_outputs_0_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1__io_outputs_0_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1__io_outputs_0_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1__io_outputs_0_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1__io_outputs_0_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1__io_outputs_0_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1__io_outputs_0_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1__io_outputs_0_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1__io_outputs_0_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1__io_outputs_0_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1__io_outputs_0_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1__io_outputs_0_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1__io_outputs_0_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1__io_outputs_0_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1__io_outputs_0_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1__io_outputs_0_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1__io_outputs_0_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1__io_outputs_0_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1__io_outputs_0_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1__io_outputs_0_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1__io_outputs_0_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1__io_outputs_0_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1__io_outputs_0_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1__io_outputs_0_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1__io_outputs_0_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1__io_outputs_0_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1__io_outputs_0_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1__io_outputs_0_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1__io_outputs_0_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1__io_outputs_0_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1__io_outputs_0_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1__io_outputs_1_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1__io_outputs_1_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1__io_outputs_1_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1__io_outputs_1_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1__io_outputs_1_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1__io_outputs_1_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1__io_outputs_1_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1__io_outputs_1_PADDR[7] 1 1 .names $undef murax.apb3Router_1__io_outputs_1_PADDR[8] 1 1 .names $undef murax.apb3Router_1__io_outputs_1_PADDR[9] 1 1 .names $undef murax.apb3Router_1__io_outputs_1_PADDR[10] 1 1 .names $undef murax.apb3Router_1__io_outputs_1_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1__io_outputs_1_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1__io_outputs_1_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1__io_outputs_1_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1__io_outputs_1_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1__io_outputs_1_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1__io_outputs_1_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1__io_outputs_1_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1__io_outputs_1_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1__io_outputs_1_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1__io_outputs_1_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1__io_outputs_1_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1__io_outputs_1_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1__io_outputs_1_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1__io_outputs_1_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1__io_outputs_1_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1__io_outputs_1_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1__io_outputs_1_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1__io_outputs_1_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1__io_outputs_1_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1__io_outputs_1_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1__io_outputs_1_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1__io_outputs_1_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1__io_outputs_1_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1__io_outputs_1_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1__io_outputs_1_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1__io_outputs_1_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1__io_outputs_1_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1__io_outputs_1_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1__io_outputs_1_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1__io_outputs_1_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1__io_outputs_1_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1__io_outputs_1_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1__io_outputs_1_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1__io_outputs_1_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1__io_outputs_1_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1__io_outputs_1_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1__io_outputs_1_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1__io_outputs_1_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1__io_outputs_1_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1__io_outputs_1_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1__io_outputs_1_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1__io_outputs_1_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1__io_outputs_2_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1__io_outputs_2_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1__io_outputs_2_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1__io_outputs_2_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1__io_outputs_2_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1__io_outputs_2_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1__io_outputs_2_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1__io_outputs_2_PADDR[7] 1 1 .names $undef murax.apb3Router_1__io_outputs_2_PADDR[8] 1 1 .names $undef murax.apb3Router_1__io_outputs_2_PADDR[9] 1 1 .names $undef murax.apb3Router_1__io_outputs_2_PADDR[10] 1 1 .names $undef murax.apb3Router_1__io_outputs_2_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1__io_outputs_2_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1__io_outputs_2_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1__io_outputs_2_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1__io_outputs_2_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1__io_outputs_2_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1__io_outputs_2_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1__io_outputs_2_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1__io_outputs_2_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1__io_outputs_2_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1__io_outputs_2_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1__io_outputs_2_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1__io_outputs_2_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1__io_outputs_2_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1__io_outputs_2_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1__io_outputs_2_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1__io_outputs_2_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1__io_outputs_2_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1__io_outputs_2_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1__io_outputs_2_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1__io_outputs_2_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1__io_outputs_2_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1__io_outputs_2_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1__io_outputs_2_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1__io_outputs_2_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1__io_outputs_2_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1__io_outputs_2_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1__io_outputs_2_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1__io_outputs_2_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1__io_outputs_2_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1__io_outputs_2_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1__io_outputs_2_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1__io_outputs_2_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1__io_outputs_2_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1__io_outputs_2_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1__io_outputs_2_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1__io_outputs_2_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1__io_outputs_2_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1__io_outputs_2_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1__io_outputs_2_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1__io_outputs_2_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1__io_outputs_2_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1__io_outputs_2_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.apb3Router_1__io_outputs_3_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.apb3Router_1__io_outputs_3_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.apb3Router_1__io_outputs_3_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.apb3Router_1__io_outputs_3_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.apb3Router_1__io_outputs_3_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.apb3Router_1__io_outputs_3_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.apb3Router_1__io_outputs_3_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.apb3Router_1__io_outputs_3_PADDR[7] 1 1 .names $undef murax.apb3Router_1__io_outputs_3_PADDR[8] 1 1 .names $undef murax.apb3Router_1__io_outputs_3_PADDR[9] 1 1 .names $undef murax.apb3Router_1__io_outputs_3_PADDR[10] 1 1 .names $undef murax.apb3Router_1__io_outputs_3_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.apb3Router_1__io_outputs_3_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.apb3Router_1__io_outputs_3_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.apb3Router_1__io_outputs_3_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.apb3Router_1__io_outputs_3_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.apb3Router_1__io_outputs_3_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.apb3Router_1__io_outputs_3_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.apb3Router_1__io_outputs_3_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.apb3Router_1__io_outputs_3_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.apb3Router_1__io_outputs_3_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.apb3Router_1__io_outputs_3_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.apb3Router_1__io_outputs_3_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.apb3Router_1__io_outputs_3_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.apb3Router_1__io_outputs_3_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.apb3Router_1__io_outputs_3_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.apb3Router_1__io_outputs_3_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.apb3Router_1__io_outputs_3_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.apb3Router_1__io_outputs_3_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.apb3Router_1__io_outputs_3_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.apb3Router_1__io_outputs_3_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.apb3Router_1__io_outputs_3_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.apb3Router_1__io_outputs_3_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.apb3Router_1__io_outputs_3_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.apb3Router_1__io_outputs_3_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.apb3Router_1__io_outputs_3_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.apb3Router_1__io_outputs_3_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.apb3Router_1__io_outputs_3_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.apb3Router_1__io_outputs_3_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.apb3Router_1__io_outputs_3_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.apb3Router_1__io_outputs_3_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.apb3Router_1__io_outputs_3_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.apb3Router_1__io_outputs_3_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.apb3Router_1__io_outputs_3_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.apb3Router_1__io_outputs_3_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.apb3Router_1__io_outputs_3_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.apb3Router_1__io_outputs_3_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.apb3Router_1__io_outputs_3_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.apb3Router_1__io_outputs_3_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.apb3Router_1__io_outputs_3_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.apb3Router_1__io_outputs_3_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.apb3Router_1__io_outputs_3_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.apb3Router_1__io_outputs_3_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.apb3Router_1__io_outputs_3_PWRITE 1 1 .names io_mainClk murax.bufferCC_4_.toplevel_io_mainClk 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.io_apb_decoder.io_input_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.io_apb_decoder.io_input_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.io_apb_decoder.io_input_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.io_apb_decoder.io_input_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.io_apb_decoder.io_input_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.io_apb_decoder.io_input_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.io_apb_decoder.io_input_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.io_apb_decoder.io_input_PADDR[7] 1 1 .names $undef murax.io_apb_decoder.io_input_PADDR[8] 1 1 .names $undef murax.io_apb_decoder.io_input_PADDR[9] 1 1 .names $undef murax.io_apb_decoder.io_input_PADDR[10] 1 1 .names $undef murax.io_apb_decoder.io_input_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.io_apb_decoder.io_input_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.io_apb_decoder.io_input_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.io_apb_decoder.io_input_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.io_apb_decoder.io_input_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.io_apb_decoder.io_input_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.io_apb_decoder.io_input_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.io_apb_decoder.io_input_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.io_apb_decoder.io_input_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.io_apb_decoder.io_input_PENABLE 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] murax.io_apb_decoder.io_input_PRDATA[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] murax.io_apb_decoder.io_input_PRDATA[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] murax.io_apb_decoder.io_input_PRDATA[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] murax.io_apb_decoder.io_input_PRDATA[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] murax.io_apb_decoder.io_input_PRDATA[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] murax.io_apb_decoder.io_input_PRDATA[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] murax.io_apb_decoder.io_input_PRDATA[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] murax.io_apb_decoder.io_input_PRDATA[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] murax.io_apb_decoder.io_input_PRDATA[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] murax.io_apb_decoder.io_input_PRDATA[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] murax.io_apb_decoder.io_input_PRDATA[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] murax.io_apb_decoder.io_input_PRDATA[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] murax.io_apb_decoder.io_input_PRDATA[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] murax.io_apb_decoder.io_input_PRDATA[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] murax.io_apb_decoder.io_input_PRDATA[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] murax.io_apb_decoder.io_input_PRDATA[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] murax.io_apb_decoder.io_input_PRDATA[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] murax.io_apb_decoder.io_input_PRDATA[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] murax.io_apb_decoder.io_input_PRDATA[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] murax.io_apb_decoder.io_input_PRDATA[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] murax.io_apb_decoder.io_input_PRDATA[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] murax.io_apb_decoder.io_input_PRDATA[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] murax.io_apb_decoder.io_input_PRDATA[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] murax.io_apb_decoder.io_input_PRDATA[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] murax.io_apb_decoder.io_input_PRDATA[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] murax.io_apb_decoder.io_input_PRDATA[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] murax.io_apb_decoder.io_input_PRDATA[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] murax.io_apb_decoder.io_input_PRDATA[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] murax.io_apb_decoder.io_input_PRDATA[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] murax.io_apb_decoder.io_input_PRDATA[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] murax.io_apb_decoder.io_input_PRDATA[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] murax.io_apb_decoder.io_input_PRDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid murax.io_apb_decoder.io_input_PSEL 1 1 .names murax.system_uartCtrl._zz_6_ murax.io_apb_decoder.io_input_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.io_apb_decoder.io_input_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.io_apb_decoder.io_input_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.io_apb_decoder.io_input_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.io_apb_decoder.io_input_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.io_apb_decoder.io_input_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.io_apb_decoder.io_input_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.io_apb_decoder.io_input_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.io_apb_decoder.io_input_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.io_apb_decoder.io_input_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.io_apb_decoder.io_input_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.io_apb_decoder.io_input_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.io_apb_decoder.io_input_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.io_apb_decoder.io_input_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.io_apb_decoder.io_input_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.io_apb_decoder.io_input_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.io_apb_decoder.io_input_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.io_apb_decoder.io_input_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.io_apb_decoder.io_input_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.io_apb_decoder.io_input_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.io_apb_decoder.io_input_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.io_apb_decoder.io_input_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.io_apb_decoder.io_input_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.io_apb_decoder.io_input_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.io_apb_decoder.io_input_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.io_apb_decoder.io_input_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.io_apb_decoder.io_input_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.io_apb_decoder.io_input_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.io_apb_decoder.io_input_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.io_apb_decoder.io_input_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.io_apb_decoder.io_input_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.io_apb_decoder.io_input_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.io_apb_decoder.io_input_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.io_apb_decoder.io_output_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.io_apb_decoder.io_output_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.io_apb_decoder.io_output_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.io_apb_decoder.io_output_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.io_apb_decoder.io_output_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.io_apb_decoder.io_output_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.io_apb_decoder.io_output_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.io_apb_decoder.io_output_PADDR[7] 1 1 .names $undef murax.io_apb_decoder.io_output_PADDR[8] 1 1 .names $undef murax.io_apb_decoder.io_output_PADDR[9] 1 1 .names $undef murax.io_apb_decoder.io_output_PADDR[10] 1 1 .names $undef murax.io_apb_decoder.io_output_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.io_apb_decoder.io_output_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.io_apb_decoder.io_output_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.io_apb_decoder.io_output_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.io_apb_decoder.io_output_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.io_apb_decoder.io_output_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.io_apb_decoder.io_output_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.io_apb_decoder.io_output_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.io_apb_decoder.io_output_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.io_apb_decoder.io_output_PENABLE 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] murax.io_apb_decoder.io_output_PRDATA[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] murax.io_apb_decoder.io_output_PRDATA[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] murax.io_apb_decoder.io_output_PRDATA[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] murax.io_apb_decoder.io_output_PRDATA[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] murax.io_apb_decoder.io_output_PRDATA[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] murax.io_apb_decoder.io_output_PRDATA[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] murax.io_apb_decoder.io_output_PRDATA[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] murax.io_apb_decoder.io_output_PRDATA[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] murax.io_apb_decoder.io_output_PRDATA[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] murax.io_apb_decoder.io_output_PRDATA[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] murax.io_apb_decoder.io_output_PRDATA[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] murax.io_apb_decoder.io_output_PRDATA[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] murax.io_apb_decoder.io_output_PRDATA[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] murax.io_apb_decoder.io_output_PRDATA[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] murax.io_apb_decoder.io_output_PRDATA[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] murax.io_apb_decoder.io_output_PRDATA[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] murax.io_apb_decoder.io_output_PRDATA[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] murax.io_apb_decoder.io_output_PRDATA[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] murax.io_apb_decoder.io_output_PRDATA[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] murax.io_apb_decoder.io_output_PRDATA[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] murax.io_apb_decoder.io_output_PRDATA[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] murax.io_apb_decoder.io_output_PRDATA[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] murax.io_apb_decoder.io_output_PRDATA[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] murax.io_apb_decoder.io_output_PRDATA[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] murax.io_apb_decoder.io_output_PRDATA[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] murax.io_apb_decoder.io_output_PRDATA[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] murax.io_apb_decoder.io_output_PRDATA[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] murax.io_apb_decoder.io_output_PRDATA[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] murax.io_apb_decoder.io_output_PRDATA[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] murax.io_apb_decoder.io_output_PRDATA[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] murax.io_apb_decoder.io_output_PRDATA[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] murax.io_apb_decoder.io_output_PRDATA[31] 1 1 .names murax.system_uartCtrl._zz_6_ murax.io_apb_decoder.io_output_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.io_apb_decoder.io_output_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.io_apb_decoder.io_output_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.io_apb_decoder.io_output_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.io_apb_decoder.io_output_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.io_apb_decoder.io_output_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.io_apb_decoder.io_output_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.io_apb_decoder.io_output_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.io_apb_decoder.io_output_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.io_apb_decoder.io_output_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.io_apb_decoder.io_output_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.io_apb_decoder.io_output_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.io_apb_decoder.io_output_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.io_apb_decoder.io_output_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.io_apb_decoder.io_output_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.io_apb_decoder.io_output_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.io_apb_decoder.io_output_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.io_apb_decoder.io_output_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.io_apb_decoder.io_output_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.io_apb_decoder.io_output_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.io_apb_decoder.io_output_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.io_apb_decoder.io_output_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.io_apb_decoder.io_output_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.io_apb_decoder.io_output_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.io_apb_decoder.io_output_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.io_apb_decoder.io_output_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.io_apb_decoder.io_output_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.io_apb_decoder.io_output_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.io_apb_decoder.io_output_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.io_apb_decoder.io_output_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.io_apb_decoder.io_output_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.io_apb_decoder.io_output_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.io_apb_decoder.io_output_PWRITE 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] murax.io_apb_decoder_io_input_PRDATA[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] murax.io_apb_decoder_io_input_PRDATA[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] murax.io_apb_decoder_io_input_PRDATA[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] murax.io_apb_decoder_io_input_PRDATA[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] murax.io_apb_decoder_io_input_PRDATA[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] murax.io_apb_decoder_io_input_PRDATA[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] murax.io_apb_decoder_io_input_PRDATA[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] murax.io_apb_decoder_io_input_PRDATA[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] murax.io_apb_decoder_io_input_PRDATA[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] murax.io_apb_decoder_io_input_PRDATA[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] murax.io_apb_decoder_io_input_PRDATA[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] murax.io_apb_decoder_io_input_PRDATA[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] murax.io_apb_decoder_io_input_PRDATA[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] murax.io_apb_decoder_io_input_PRDATA[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] murax.io_apb_decoder_io_input_PRDATA[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] murax.io_apb_decoder_io_input_PRDATA[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] murax.io_apb_decoder_io_input_PRDATA[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] murax.io_apb_decoder_io_input_PRDATA[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] murax.io_apb_decoder_io_input_PRDATA[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] murax.io_apb_decoder_io_input_PRDATA[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] murax.io_apb_decoder_io_input_PRDATA[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] murax.io_apb_decoder_io_input_PRDATA[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] murax.io_apb_decoder_io_input_PRDATA[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] murax.io_apb_decoder_io_input_PRDATA[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] murax.io_apb_decoder_io_input_PRDATA[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] murax.io_apb_decoder_io_input_PRDATA[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] murax.io_apb_decoder_io_input_PRDATA[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] murax.io_apb_decoder_io_input_PRDATA[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] murax.io_apb_decoder_io_input_PRDATA[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] murax.io_apb_decoder_io_input_PRDATA[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] murax.io_apb_decoder_io_input_PRDATA[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] murax.io_apb_decoder_io_input_PRDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.io_apb_decoder_io_output_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.io_apb_decoder_io_output_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.io_apb_decoder_io_output_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.io_apb_decoder_io_output_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.io_apb_decoder_io_output_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.io_apb_decoder_io_output_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.io_apb_decoder_io_output_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.io_apb_decoder_io_output_PADDR[7] 1 1 .names $undef murax.io_apb_decoder_io_output_PADDR[8] 1 1 .names $undef murax.io_apb_decoder_io_output_PADDR[9] 1 1 .names $undef murax.io_apb_decoder_io_output_PADDR[10] 1 1 .names $undef murax.io_apb_decoder_io_output_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.io_apb_decoder_io_output_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.io_apb_decoder_io_output_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.io_apb_decoder_io_output_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.io_apb_decoder_io_output_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.io_apb_decoder_io_output_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.io_apb_decoder_io_output_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.io_apb_decoder_io_output_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.io_apb_decoder_io_output_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.io_apb_decoder_io_output_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.io_apb_decoder_io_output_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.io_apb_decoder_io_output_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.io_apb_decoder_io_output_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.io_apb_decoder_io_output_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.io_apb_decoder_io_output_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.io_apb_decoder_io_output_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.io_apb_decoder_io_output_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.io_apb_decoder_io_output_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.io_apb_decoder_io_output_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.io_apb_decoder_io_output_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.io_apb_decoder_io_output_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.io_apb_decoder_io_output_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.io_apb_decoder_io_output_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.io_apb_decoder_io_output_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.io_apb_decoder_io_output_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.io_apb_decoder_io_output_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.io_apb_decoder_io_output_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.io_apb_decoder_io_output_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.io_apb_decoder_io_output_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.io_apb_decoder_io_output_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.io_apb_decoder_io_output_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.io_apb_decoder_io_output_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.io_apb_decoder_io_output_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.io_apb_decoder_io_output_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.io_apb_decoder_io_output_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.io_apb_decoder_io_output_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.io_apb_decoder_io_output_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.io_apb_decoder_io_output_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.io_apb_decoder_io_output_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.io_apb_decoder_io_output_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.io_apb_decoder_io_output_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.io_apb_decoder_io_output_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.io_apb_decoder_io_output_PWRITE 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[0] murax.io_gpioA_write[0] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[1] murax.io_gpioA_write[1] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[2] murax.io_gpioA_write[2] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[3] murax.io_gpioA_write[3] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[4] murax.io_gpioA_write[4] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[5] murax.io_gpioA_write[5] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[6] murax.io_gpioA_write[6] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[7] murax.io_gpioA_write[7] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[8] murax.io_gpioA_write[8] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[9] murax.io_gpioA_write[9] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[10] murax.io_gpioA_write[10] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[11] murax.io_gpioA_write[11] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[12] murax.io_gpioA_write[12] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[13] murax.io_gpioA_write[13] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[14] murax.io_gpioA_write[14] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[15] murax.io_gpioA_write[15] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[16] murax.io_gpioA_write[16] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[17] murax.io_gpioA_write[17] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[18] murax.io_gpioA_write[18] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[19] murax.io_gpioA_write[19] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[20] murax.io_gpioA_write[20] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[21] murax.io_gpioA_write[21] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[22] murax.io_gpioA_write[22] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[23] murax.io_gpioA_write[23] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[24] murax.io_gpioA_write[24] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[25] murax.io_gpioA_write[25] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[26] murax.io_gpioA_write[26] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[27] murax.io_gpioA_write[27] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[28] murax.io_gpioA_write[28] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[29] murax.io_gpioA_write[29] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[30] murax.io_gpioA_write[30] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[31] murax.io_gpioA_write[31] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[0] murax.io_gpioA_writeEnable[0] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[1] murax.io_gpioA_writeEnable[1] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[2] murax.io_gpioA_writeEnable[2] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[3] murax.io_gpioA_writeEnable[3] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[4] murax.io_gpioA_writeEnable[4] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[5] murax.io_gpioA_writeEnable[5] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[6] murax.io_gpioA_writeEnable[6] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[7] murax.io_gpioA_writeEnable[7] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[8] murax.io_gpioA_writeEnable[8] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[9] murax.io_gpioA_writeEnable[9] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[10] murax.io_gpioA_writeEnable[10] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[11] murax.io_gpioA_writeEnable[11] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[12] murax.io_gpioA_writeEnable[12] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[13] murax.io_gpioA_writeEnable[13] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[14] murax.io_gpioA_writeEnable[14] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[15] murax.io_gpioA_writeEnable[15] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[16] murax.io_gpioA_writeEnable[16] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[17] murax.io_gpioA_writeEnable[17] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[18] murax.io_gpioA_writeEnable[18] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[19] murax.io_gpioA_writeEnable[19] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[20] murax.io_gpioA_writeEnable[20] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[21] murax.io_gpioA_writeEnable[21] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[22] murax.io_gpioA_writeEnable[22] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[23] murax.io_gpioA_writeEnable[23] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[24] murax.io_gpioA_writeEnable[24] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[25] murax.io_gpioA_writeEnable[25] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[26] murax.io_gpioA_writeEnable[26] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[27] murax.io_gpioA_writeEnable[27] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[28] murax.io_gpioA_writeEnable[28] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[29] murax.io_gpioA_writeEnable[29] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[30] murax.io_gpioA_writeEnable[30] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[31] murax.io_gpioA_writeEnable[31] 1 1 .names io_jtag_tck murax.io_jtag_tck 1 1 .names io_G15 murax.io_jtag_tdi 1 1 .names io_G16 murax.io_jtag_tdo 1 1 .names io_F15 murax.io_jtag_tms 1 1 .names io_mainClk murax.io_mainClk 1 1 .names io_B10 murax.io_uart_rxd 1 1 .names murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext murax.io_uart_txd 1 1 .names $undef murax.jtagBridge_1_._zz_1_[1] 1 1 .names $undef murax.jtagBridge_1_._zz_1_[2] 1 1 .names $undef murax.jtagBridge_1_._zz_1_[3] 1 1 .names io_jtag_tck murax.jtagBridge_1_.flowCCByToggle_1_._zz_1_ 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_target murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.io_dataIn 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.buffers_1 murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.io_dataOut 1 1 .names io_mainClk murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_mainClkReset murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.toplevel_resetCtrl_mainClkReset 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.buffers_1 murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4__io_dataOut 1 1 .names io_G15 murax.jtagBridge_1_.flowCCByToggle_1_.io_input_payload_fragment 1 1 .names io_F15 murax.jtagBridge_1_.flowCCByToggle_1_.io_input_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment murax.jtagBridge_1_.flowCCByToggle_1_.io_output_payload_fragment 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last murax.jtagBridge_1_.flowCCByToggle_1_.io_output_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid murax.jtagBridge_1_.flowCCByToggle_1_.io_output_valid 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_data_fragment murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_payload_fragment 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.inputArea_data_last murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.bufferCC_4_.buffers_1 murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_target 1 1 .names io_mainClk murax.jtagBridge_1_.flowCCByToggle_1_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_mainClkReset murax.jtagBridge_1_.flowCCByToggle_1_.toplevel_resetCtrl_mainClkReset 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment murax.jtagBridge_1_.flowCCByToggle_1__io_output_payload_fragment 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last murax.jtagBridge_1_.flowCCByToggle_1__io_output_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid murax.jtagBridge_1_.flowCCByToggle_1__io_output_valid 1 1 .names io_jtag_tck murax.jtagBridge_1_.io_jtag_tck 1 1 .names io_G15 murax.jtagBridge_1_.io_jtag_tdi 1 1 .names io_G16 murax.jtagBridge_1_.io_jtag_tdo 1 1 .names io_F15 murax.jtagBridge_1_.io_jtag_tms 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment murax.jtagBridge_1_.io_remote_cmd_payload_fragment 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last murax.jtagBridge_1_.io_remote_cmd_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid murax.jtagBridge_1_.io_remote_cmd_valid 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[5] murax.jtagBridge_1_.io_remote_rsp_payload_data[5] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[6] murax.jtagBridge_1_.io_remote_rsp_payload_data[6] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[7] murax.jtagBridge_1_.io_remote_rsp_payload_data[7] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[8] murax.jtagBridge_1_.io_remote_rsp_payload_data[8] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[9] murax.jtagBridge_1_.io_remote_rsp_payload_data[9] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[10] murax.jtagBridge_1_.io_remote_rsp_payload_data[10] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[11] murax.jtagBridge_1_.io_remote_rsp_payload_data[11] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[12] murax.jtagBridge_1_.io_remote_rsp_payload_data[12] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[13] murax.jtagBridge_1_.io_remote_rsp_payload_data[13] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[14] murax.jtagBridge_1_.io_remote_rsp_payload_data[14] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[15] murax.jtagBridge_1_.io_remote_rsp_payload_data[15] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[16] murax.jtagBridge_1_.io_remote_rsp_payload_data[16] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[17] murax.jtagBridge_1_.io_remote_rsp_payload_data[17] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[18] murax.jtagBridge_1_.io_remote_rsp_payload_data[18] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[19] murax.jtagBridge_1_.io_remote_rsp_payload_data[19] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[20] murax.jtagBridge_1_.io_remote_rsp_payload_data[20] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[21] murax.jtagBridge_1_.io_remote_rsp_payload_data[21] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[22] murax.jtagBridge_1_.io_remote_rsp_payload_data[22] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[23] murax.jtagBridge_1_.io_remote_rsp_payload_data[23] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[24] murax.jtagBridge_1_.io_remote_rsp_payload_data[24] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[25] murax.jtagBridge_1_.io_remote_rsp_payload_data[25] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[26] murax.jtagBridge_1_.io_remote_rsp_payload_data[26] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[27] murax.jtagBridge_1_.io_remote_rsp_payload_data[27] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[28] murax.jtagBridge_1_.io_remote_rsp_payload_data[28] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[29] murax.jtagBridge_1_.io_remote_rsp_payload_data[29] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[30] murax.jtagBridge_1_.io_remote_rsp_payload_data[30] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[31] murax.jtagBridge_1_.io_remote_rsp_payload_data[31] 1 1 .names murax._zz_2_ murax.jtagBridge_1_.io_remote_rsp_valid 1 1 .names murax.jtagBridge_1_._zz_1_[0] murax.jtagBridge_1_.jtag_tap_fsm_stateNext[0] 1 1 .names $undef murax.jtagBridge_1_.jtag_tap_fsm_stateNext[1] 1 1 .names $undef murax.jtagBridge_1_.jtag_tap_fsm_stateNext[2] 1 1 .names $undef murax.jtagBridge_1_.jtag_tap_fsm_stateNext[3] 1 1 .names io_G15 murax.jtagBridge_1_.jtag_writeArea_source_payload_fragment 1 1 .names io_F15 murax.jtagBridge_1_.jtag_writeArea_source_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.io_input_valid murax.jtagBridge_1_.jtag_writeArea_source_valid 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment murax.jtagBridge_1_.system_cmd_payload_fragment 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last murax.jtagBridge_1_.system_cmd_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid murax.jtagBridge_1_.system_cmd_valid 1 1 .names io_mainClk murax.jtagBridge_1_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_mainClkReset murax.jtagBridge_1_.toplevel_resetCtrl_mainClkReset 1 1 .names io_G16 murax.jtagBridge_1__io_jtag_tdo 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment murax.jtagBridge_1__io_remote_cmd_payload_fragment 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last murax.jtagBridge_1__io_remote_cmd_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid murax.jtagBridge_1__io_remote_cmd_valid 1 1 .names murax._zz_14_ murax.resetCtrl_mainClkResetUnbuffered 1 1 .names $undef murax.systemDebugger_1_._zz_1_[0] 1 1 .names $undef murax.systemDebugger_1_._zz_1_[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[2] murax.systemDebugger_1_._zz_1_[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[3] murax.systemDebugger_1_._zz_1_[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[4] murax.systemDebugger_1_._zz_1_[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[5] murax.systemDebugger_1_._zz_1_[5] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[6] murax.systemDebugger_1_._zz_1_[6] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[7] murax.systemDebugger_1_._zz_1_[7] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[8] murax.systemDebugger_1_._zz_1_[8] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[9] murax.systemDebugger_1_._zz_1_[9] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[10] murax.systemDebugger_1_._zz_1_[10] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[11] murax.systemDebugger_1_._zz_1_[11] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[12] murax.systemDebugger_1_._zz_1_[12] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[13] murax.systemDebugger_1_._zz_1_[13] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[14] murax.systemDebugger_1_._zz_1_[14] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[15] murax.systemDebugger_1_._zz_1_[15] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[16] murax.systemDebugger_1_._zz_1_[16] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[17] murax.systemDebugger_1_._zz_1_[17] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[18] murax.systemDebugger_1_._zz_1_[18] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[19] murax.systemDebugger_1_._zz_1_[19] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[20] murax.systemDebugger_1_._zz_1_[20] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[21] murax.systemDebugger_1_._zz_1_[21] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[22] murax.systemDebugger_1_._zz_1_[22] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[23] murax.systemDebugger_1_._zz_1_[23] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[24] murax.systemDebugger_1_._zz_1_[24] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[25] murax.systemDebugger_1_._zz_1_[25] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[26] murax.systemDebugger_1_._zz_1_[26] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[27] murax.systemDebugger_1_._zz_1_[27] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[28] murax.systemDebugger_1_._zz_1_[28] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[29] murax.systemDebugger_1_._zz_1_[29] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[30] murax.systemDebugger_1_._zz_1_[30] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[31] murax.systemDebugger_1_._zz_1_[31] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[32] murax.systemDebugger_1_._zz_1_[32] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[33] murax.systemDebugger_1_._zz_1_[33] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[34] murax.systemDebugger_1_._zz_1_[34] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[35] murax.systemDebugger_1_._zz_1_[35] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[36] murax.systemDebugger_1_._zz_1_[36] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[37] murax.systemDebugger_1_._zz_1_[37] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[38] murax.systemDebugger_1_._zz_1_[38] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[39] murax.systemDebugger_1_._zz_1_[39] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[40] murax.systemDebugger_1_._zz_1_[40] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[41] murax.systemDebugger_1_._zz_1_[41] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[42] murax.systemDebugger_1_._zz_1_[42] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[43] murax.systemDebugger_1_._zz_1_[43] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[44] murax.systemDebugger_1_._zz_1_[44] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[45] murax.systemDebugger_1_._zz_1_[45] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[46] murax.systemDebugger_1_._zz_1_[46] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[47] murax.systemDebugger_1_._zz_1_[47] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[48] murax.systemDebugger_1_._zz_1_[48] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[49] murax.systemDebugger_1_._zz_1_[49] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[50] murax.systemDebugger_1_._zz_1_[50] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[51] murax.systemDebugger_1_._zz_1_[51] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[52] murax.systemDebugger_1_._zz_1_[52] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[53] murax.systemDebugger_1_._zz_1_[53] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[54] murax.systemDebugger_1_._zz_1_[54] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[55] murax.systemDebugger_1_._zz_1_[55] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[56] murax.systemDebugger_1_._zz_1_[56] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[57] murax.systemDebugger_1_._zz_1_[57] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[58] murax.systemDebugger_1_._zz_1_[58] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[59] murax.systemDebugger_1_._zz_1_[59] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[60] murax.systemDebugger_1_._zz_1_[60] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[61] murax.systemDebugger_1_._zz_1_[61] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[62] murax.systemDebugger_1_._zz_1_[62] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[63] murax.systemDebugger_1_._zz_1_[63] 1 1 .names murax.systemDebugger_1_._zz_3_ murax.systemDebugger_1_._zz_1_[64] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[65] murax.systemDebugger_1_._zz_1_[65] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[66] murax.systemDebugger_1_._zz_1_[66] 1 1 .names $undef murax.systemDebugger_1_.dispatcher_dataShifter[0] 1 1 .names $undef murax.systemDebugger_1_.dispatcher_dataShifter[1] 1 1 .names murax.systemDebugger_1_._zz_3_ murax.systemDebugger_1_.dispatcher_dataShifter[64] 1 1 .names murax.systemDebugger_1_.dispatcher_headerShifter[0] murax.systemDebugger_1_.dispatcher_header[0] 1 1 .names murax.systemDebugger_1_.dispatcher_headerShifter[1] murax.systemDebugger_1_.dispatcher_header[1] 1 1 .names murax.systemDebugger_1_.dispatcher_headerShifter[2] murax.systemDebugger_1_.dispatcher_header[2] 1 1 .names murax.systemDebugger_1_.dispatcher_headerShifter[3] murax.systemDebugger_1_.dispatcher_header[3] 1 1 .names murax.systemDebugger_1_.dispatcher_headerShifter[4] murax.systemDebugger_1_.dispatcher_header[4] 1 1 .names murax.systemDebugger_1_.dispatcher_headerShifter[5] murax.systemDebugger_1_.dispatcher_header[5] 1 1 .names murax.systemDebugger_1_.dispatcher_headerShifter[6] murax.systemDebugger_1_.dispatcher_header[6] 1 1 .names murax.systemDebugger_1_.dispatcher_headerShifter[7] murax.systemDebugger_1_.dispatcher_header[7] 1 1 .names $undef murax.systemDebugger_1_.io_mem_cmd_payload_address[0] 1 1 .names $undef murax.systemDebugger_1_.io_mem_cmd_payload_address[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[2] murax.systemDebugger_1_.io_mem_cmd_payload_address[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[3] murax.systemDebugger_1_.io_mem_cmd_payload_address[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[4] murax.systemDebugger_1_.io_mem_cmd_payload_address[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[5] murax.systemDebugger_1_.io_mem_cmd_payload_address[5] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[6] murax.systemDebugger_1_.io_mem_cmd_payload_address[6] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[7] murax.systemDebugger_1_.io_mem_cmd_payload_address[7] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[8] murax.systemDebugger_1_.io_mem_cmd_payload_address[8] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[9] murax.systemDebugger_1_.io_mem_cmd_payload_address[9] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[10] murax.systemDebugger_1_.io_mem_cmd_payload_address[10] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[11] murax.systemDebugger_1_.io_mem_cmd_payload_address[11] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[12] murax.systemDebugger_1_.io_mem_cmd_payload_address[12] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[13] murax.systemDebugger_1_.io_mem_cmd_payload_address[13] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[14] murax.systemDebugger_1_.io_mem_cmd_payload_address[14] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[15] murax.systemDebugger_1_.io_mem_cmd_payload_address[15] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[16] murax.systemDebugger_1_.io_mem_cmd_payload_address[16] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[17] murax.systemDebugger_1_.io_mem_cmd_payload_address[17] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[18] murax.systemDebugger_1_.io_mem_cmd_payload_address[18] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[19] murax.systemDebugger_1_.io_mem_cmd_payload_address[19] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[20] murax.systemDebugger_1_.io_mem_cmd_payload_address[20] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[21] murax.systemDebugger_1_.io_mem_cmd_payload_address[21] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[22] murax.systemDebugger_1_.io_mem_cmd_payload_address[22] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[23] murax.systemDebugger_1_.io_mem_cmd_payload_address[23] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[24] murax.systemDebugger_1_.io_mem_cmd_payload_address[24] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[25] murax.systemDebugger_1_.io_mem_cmd_payload_address[25] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[26] murax.systemDebugger_1_.io_mem_cmd_payload_address[26] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[27] murax.systemDebugger_1_.io_mem_cmd_payload_address[27] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[28] murax.systemDebugger_1_.io_mem_cmd_payload_address[28] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[29] murax.systemDebugger_1_.io_mem_cmd_payload_address[29] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[30] murax.systemDebugger_1_.io_mem_cmd_payload_address[30] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[31] murax.systemDebugger_1_.io_mem_cmd_payload_address[31] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[32] murax.systemDebugger_1_.io_mem_cmd_payload_data[0] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[33] murax.systemDebugger_1_.io_mem_cmd_payload_data[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[34] murax.systemDebugger_1_.io_mem_cmd_payload_data[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[35] murax.systemDebugger_1_.io_mem_cmd_payload_data[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[36] murax.systemDebugger_1_.io_mem_cmd_payload_data[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[37] murax.systemDebugger_1_.io_mem_cmd_payload_data[5] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[38] murax.systemDebugger_1_.io_mem_cmd_payload_data[6] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[39] murax.systemDebugger_1_.io_mem_cmd_payload_data[7] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[40] murax.systemDebugger_1_.io_mem_cmd_payload_data[8] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[41] murax.systemDebugger_1_.io_mem_cmd_payload_data[9] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[42] murax.systemDebugger_1_.io_mem_cmd_payload_data[10] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[43] murax.systemDebugger_1_.io_mem_cmd_payload_data[11] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[44] murax.systemDebugger_1_.io_mem_cmd_payload_data[12] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[45] murax.systemDebugger_1_.io_mem_cmd_payload_data[13] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[46] murax.systemDebugger_1_.io_mem_cmd_payload_data[14] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[47] murax.systemDebugger_1_.io_mem_cmd_payload_data[15] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[48] murax.systemDebugger_1_.io_mem_cmd_payload_data[16] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[49] murax.systemDebugger_1_.io_mem_cmd_payload_data[17] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[50] murax.systemDebugger_1_.io_mem_cmd_payload_data[18] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[51] murax.systemDebugger_1_.io_mem_cmd_payload_data[19] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[52] murax.systemDebugger_1_.io_mem_cmd_payload_data[20] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[53] murax.systemDebugger_1_.io_mem_cmd_payload_data[21] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[54] murax.systemDebugger_1_.io_mem_cmd_payload_data[22] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[55] murax.systemDebugger_1_.io_mem_cmd_payload_data[23] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[56] murax.systemDebugger_1_.io_mem_cmd_payload_data[24] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[57] murax.systemDebugger_1_.io_mem_cmd_payload_data[25] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[58] murax.systemDebugger_1_.io_mem_cmd_payload_data[26] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[59] murax.systemDebugger_1_.io_mem_cmd_payload_data[27] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[60] murax.systemDebugger_1_.io_mem_cmd_payload_data[28] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[61] murax.systemDebugger_1_.io_mem_cmd_payload_data[29] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[62] murax.systemDebugger_1_.io_mem_cmd_payload_data[30] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[63] murax.systemDebugger_1_.io_mem_cmd_payload_data[31] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[65] murax.systemDebugger_1_.io_mem_cmd_payload_size[0] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[66] murax.systemDebugger_1_.io_mem_cmd_payload_size[1] 1 1 .names murax.systemDebugger_1_._zz_3_ murax.systemDebugger_1_.io_mem_cmd_payload_wr 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[0] murax.systemDebugger_1_.io_mem_rsp_payload[0] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[1] murax.systemDebugger_1_.io_mem_rsp_payload[1] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[2] murax.systemDebugger_1_.io_mem_rsp_payload[2] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[3] murax.systemDebugger_1_.io_mem_rsp_payload[3] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[4] murax.systemDebugger_1_.io_mem_rsp_payload[4] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[5] murax.systemDebugger_1_.io_mem_rsp_payload[5] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[6] murax.systemDebugger_1_.io_mem_rsp_payload[6] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[7] murax.systemDebugger_1_.io_mem_rsp_payload[7] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[8] murax.systemDebugger_1_.io_mem_rsp_payload[8] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[9] murax.systemDebugger_1_.io_mem_rsp_payload[9] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[10] murax.systemDebugger_1_.io_mem_rsp_payload[10] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[11] murax.systemDebugger_1_.io_mem_rsp_payload[11] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[12] murax.systemDebugger_1_.io_mem_rsp_payload[12] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[13] murax.systemDebugger_1_.io_mem_rsp_payload[13] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[14] murax.systemDebugger_1_.io_mem_rsp_payload[14] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[15] murax.systemDebugger_1_.io_mem_rsp_payload[15] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[16] murax.systemDebugger_1_.io_mem_rsp_payload[16] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[17] murax.systemDebugger_1_.io_mem_rsp_payload[17] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[18] murax.systemDebugger_1_.io_mem_rsp_payload[18] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[19] murax.systemDebugger_1_.io_mem_rsp_payload[19] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[20] murax.systemDebugger_1_.io_mem_rsp_payload[20] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[21] murax.systemDebugger_1_.io_mem_rsp_payload[21] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[22] murax.systemDebugger_1_.io_mem_rsp_payload[22] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[23] murax.systemDebugger_1_.io_mem_rsp_payload[23] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[24] murax.systemDebugger_1_.io_mem_rsp_payload[24] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[25] murax.systemDebugger_1_.io_mem_rsp_payload[25] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[26] murax.systemDebugger_1_.io_mem_rsp_payload[26] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[27] murax.systemDebugger_1_.io_mem_rsp_payload[27] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[28] murax.systemDebugger_1_.io_mem_rsp_payload[28] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[29] murax.systemDebugger_1_.io_mem_rsp_payload[29] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[30] murax.systemDebugger_1_.io_mem_rsp_payload[30] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[31] murax.systemDebugger_1_.io_mem_rsp_payload[31] 1 1 .names murax._zz_2_ murax.systemDebugger_1_.io_mem_rsp_valid 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_fragment murax.systemDebugger_1_.io_remote_cmd_payload_fragment 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_payload_last murax.systemDebugger_1_.io_remote_cmd_payload_last 1 1 .names murax.jtagBridge_1_.flowCCByToggle_1_.outputArea_flow_m2sPipe_valid murax.systemDebugger_1_.io_remote_cmd_valid 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[0] murax.systemDebugger_1_.io_remote_rsp_payload_data[0] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[1] murax.systemDebugger_1_.io_remote_rsp_payload_data[1] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[2] murax.systemDebugger_1_.io_remote_rsp_payload_data[2] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[3] murax.systemDebugger_1_.io_remote_rsp_payload_data[3] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[4] murax.systemDebugger_1_.io_remote_rsp_payload_data[4] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[5] murax.systemDebugger_1_.io_remote_rsp_payload_data[5] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[6] murax.systemDebugger_1_.io_remote_rsp_payload_data[6] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[7] murax.systemDebugger_1_.io_remote_rsp_payload_data[7] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[8] murax.systemDebugger_1_.io_remote_rsp_payload_data[8] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[9] murax.systemDebugger_1_.io_remote_rsp_payload_data[9] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[10] murax.systemDebugger_1_.io_remote_rsp_payload_data[10] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[11] murax.systemDebugger_1_.io_remote_rsp_payload_data[11] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[12] murax.systemDebugger_1_.io_remote_rsp_payload_data[12] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[13] murax.systemDebugger_1_.io_remote_rsp_payload_data[13] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[14] murax.systemDebugger_1_.io_remote_rsp_payload_data[14] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[15] murax.systemDebugger_1_.io_remote_rsp_payload_data[15] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[16] murax.systemDebugger_1_.io_remote_rsp_payload_data[16] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[17] murax.systemDebugger_1_.io_remote_rsp_payload_data[17] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[18] murax.systemDebugger_1_.io_remote_rsp_payload_data[18] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[19] murax.systemDebugger_1_.io_remote_rsp_payload_data[19] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[20] murax.systemDebugger_1_.io_remote_rsp_payload_data[20] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[21] murax.systemDebugger_1_.io_remote_rsp_payload_data[21] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[22] murax.systemDebugger_1_.io_remote_rsp_payload_data[22] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[23] murax.systemDebugger_1_.io_remote_rsp_payload_data[23] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[24] murax.systemDebugger_1_.io_remote_rsp_payload_data[24] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[25] murax.systemDebugger_1_.io_remote_rsp_payload_data[25] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[26] murax.systemDebugger_1_.io_remote_rsp_payload_data[26] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[27] murax.systemDebugger_1_.io_remote_rsp_payload_data[27] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[28] murax.systemDebugger_1_.io_remote_rsp_payload_data[28] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[29] murax.systemDebugger_1_.io_remote_rsp_payload_data[29] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[30] murax.systemDebugger_1_.io_remote_rsp_payload_data[30] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[31] murax.systemDebugger_1_.io_remote_rsp_payload_data[31] 1 1 .names murax._zz_2_ murax.systemDebugger_1_.io_remote_rsp_valid 1 1 .names io_mainClk murax.systemDebugger_1_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_mainClkReset murax.systemDebugger_1_.toplevel_resetCtrl_mainClkReset 1 1 .names $undef murax.systemDebugger_1__io_mem_cmd_payload_address[0] 1 1 .names $undef murax.systemDebugger_1__io_mem_cmd_payload_address[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[2] murax.systemDebugger_1__io_mem_cmd_payload_address[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[3] murax.systemDebugger_1__io_mem_cmd_payload_address[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[4] murax.systemDebugger_1__io_mem_cmd_payload_address[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[5] murax.systemDebugger_1__io_mem_cmd_payload_address[5] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[6] murax.systemDebugger_1__io_mem_cmd_payload_address[6] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[7] murax.systemDebugger_1__io_mem_cmd_payload_address[7] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[8] murax.systemDebugger_1__io_mem_cmd_payload_address[8] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[9] murax.systemDebugger_1__io_mem_cmd_payload_address[9] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[10] murax.systemDebugger_1__io_mem_cmd_payload_address[10] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[11] murax.systemDebugger_1__io_mem_cmd_payload_address[11] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[12] murax.systemDebugger_1__io_mem_cmd_payload_address[12] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[13] murax.systemDebugger_1__io_mem_cmd_payload_address[13] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[14] murax.systemDebugger_1__io_mem_cmd_payload_address[14] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[15] murax.systemDebugger_1__io_mem_cmd_payload_address[15] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[16] murax.systemDebugger_1__io_mem_cmd_payload_address[16] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[17] murax.systemDebugger_1__io_mem_cmd_payload_address[17] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[18] murax.systemDebugger_1__io_mem_cmd_payload_address[18] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[19] murax.systemDebugger_1__io_mem_cmd_payload_address[19] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[20] murax.systemDebugger_1__io_mem_cmd_payload_address[20] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[21] murax.systemDebugger_1__io_mem_cmd_payload_address[21] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[22] murax.systemDebugger_1__io_mem_cmd_payload_address[22] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[23] murax.systemDebugger_1__io_mem_cmd_payload_address[23] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[24] murax.systemDebugger_1__io_mem_cmd_payload_address[24] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[25] murax.systemDebugger_1__io_mem_cmd_payload_address[25] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[26] murax.systemDebugger_1__io_mem_cmd_payload_address[26] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[27] murax.systemDebugger_1__io_mem_cmd_payload_address[27] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[28] murax.systemDebugger_1__io_mem_cmd_payload_address[28] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[29] murax.systemDebugger_1__io_mem_cmd_payload_address[29] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[30] murax.systemDebugger_1__io_mem_cmd_payload_address[30] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[31] murax.systemDebugger_1__io_mem_cmd_payload_address[31] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[32] murax.systemDebugger_1__io_mem_cmd_payload_data[0] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[33] murax.systemDebugger_1__io_mem_cmd_payload_data[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[34] murax.systemDebugger_1__io_mem_cmd_payload_data[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[35] murax.systemDebugger_1__io_mem_cmd_payload_data[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[36] murax.systemDebugger_1__io_mem_cmd_payload_data[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[37] murax.systemDebugger_1__io_mem_cmd_payload_data[5] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[38] murax.systemDebugger_1__io_mem_cmd_payload_data[6] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[39] murax.systemDebugger_1__io_mem_cmd_payload_data[7] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[40] murax.systemDebugger_1__io_mem_cmd_payload_data[8] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[41] murax.systemDebugger_1__io_mem_cmd_payload_data[9] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[42] murax.systemDebugger_1__io_mem_cmd_payload_data[10] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[43] murax.systemDebugger_1__io_mem_cmd_payload_data[11] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[44] murax.systemDebugger_1__io_mem_cmd_payload_data[12] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[45] murax.systemDebugger_1__io_mem_cmd_payload_data[13] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[46] murax.systemDebugger_1__io_mem_cmd_payload_data[14] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[47] murax.systemDebugger_1__io_mem_cmd_payload_data[15] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[48] murax.systemDebugger_1__io_mem_cmd_payload_data[16] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[49] murax.systemDebugger_1__io_mem_cmd_payload_data[17] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[50] murax.systemDebugger_1__io_mem_cmd_payload_data[18] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[51] murax.systemDebugger_1__io_mem_cmd_payload_data[19] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[52] murax.systemDebugger_1__io_mem_cmd_payload_data[20] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[53] murax.systemDebugger_1__io_mem_cmd_payload_data[21] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[54] murax.systemDebugger_1__io_mem_cmd_payload_data[22] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[55] murax.systemDebugger_1__io_mem_cmd_payload_data[23] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[56] murax.systemDebugger_1__io_mem_cmd_payload_data[24] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[57] murax.systemDebugger_1__io_mem_cmd_payload_data[25] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[58] murax.systemDebugger_1__io_mem_cmd_payload_data[26] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[59] murax.systemDebugger_1__io_mem_cmd_payload_data[27] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[60] murax.systemDebugger_1__io_mem_cmd_payload_data[28] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[61] murax.systemDebugger_1__io_mem_cmd_payload_data[29] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[62] murax.systemDebugger_1__io_mem_cmd_payload_data[30] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[63] murax.systemDebugger_1__io_mem_cmd_payload_data[31] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[65] murax.systemDebugger_1__io_mem_cmd_payload_size[0] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[66] murax.systemDebugger_1__io_mem_cmd_payload_size[1] 1 1 .names murax.systemDebugger_1_._zz_3_ murax.systemDebugger_1__io_mem_cmd_payload_wr 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[0] murax.systemDebugger_1__io_remote_rsp_payload_data[0] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[1] murax.systemDebugger_1__io_remote_rsp_payload_data[1] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[2] murax.systemDebugger_1__io_remote_rsp_payload_data[2] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[3] murax.systemDebugger_1__io_remote_rsp_payload_data[3] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[4] murax.systemDebugger_1__io_remote_rsp_payload_data[4] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[5] murax.systemDebugger_1__io_remote_rsp_payload_data[5] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[6] murax.systemDebugger_1__io_remote_rsp_payload_data[6] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[7] murax.systemDebugger_1__io_remote_rsp_payload_data[7] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[8] murax.systemDebugger_1__io_remote_rsp_payload_data[8] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[9] murax.systemDebugger_1__io_remote_rsp_payload_data[9] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[10] murax.systemDebugger_1__io_remote_rsp_payload_data[10] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[11] murax.systemDebugger_1__io_remote_rsp_payload_data[11] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[12] murax.systemDebugger_1__io_remote_rsp_payload_data[12] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[13] murax.systemDebugger_1__io_remote_rsp_payload_data[13] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[14] murax.systemDebugger_1__io_remote_rsp_payload_data[14] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[15] murax.systemDebugger_1__io_remote_rsp_payload_data[15] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[16] murax.systemDebugger_1__io_remote_rsp_payload_data[16] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[17] murax.systemDebugger_1__io_remote_rsp_payload_data[17] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[18] murax.systemDebugger_1__io_remote_rsp_payload_data[18] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[19] murax.systemDebugger_1__io_remote_rsp_payload_data[19] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[20] murax.systemDebugger_1__io_remote_rsp_payload_data[20] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[21] murax.systemDebugger_1__io_remote_rsp_payload_data[21] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[22] murax.systemDebugger_1__io_remote_rsp_payload_data[22] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[23] murax.systemDebugger_1__io_remote_rsp_payload_data[23] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[24] murax.systemDebugger_1__io_remote_rsp_payload_data[24] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[25] murax.systemDebugger_1__io_remote_rsp_payload_data[25] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[26] murax.systemDebugger_1__io_remote_rsp_payload_data[26] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[27] murax.systemDebugger_1__io_remote_rsp_payload_data[27] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[28] murax.systemDebugger_1__io_remote_rsp_payload_data[28] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[29] murax.systemDebugger_1__io_remote_rsp_payload_data[29] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[30] murax.systemDebugger_1__io_remote_rsp_payload_data[30] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[31] murax.systemDebugger_1__io_remote_rsp_payload_data[31] 1 1 .names murax._zz_2_ murax.systemDebugger_1__io_remote_rsp_valid 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.system_apbBridge.io_apb_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.system_apbBridge.io_apb_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.system_apbBridge.io_apb_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.system_apbBridge.io_apb_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.system_apbBridge.io_apb_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.system_apbBridge.io_apb_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.system_apbBridge.io_apb_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.system_apbBridge.io_apb_PADDR[7] 1 1 .names $undef murax.system_apbBridge.io_apb_PADDR[8] 1 1 .names $undef murax.system_apbBridge.io_apb_PADDR[9] 1 1 .names $undef murax.system_apbBridge.io_apb_PADDR[10] 1 1 .names $undef murax.system_apbBridge.io_apb_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.system_apbBridge.io_apb_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.system_apbBridge.io_apb_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.system_apbBridge.io_apb_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.system_apbBridge.io_apb_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.system_apbBridge.io_apb_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.system_apbBridge.io_apb_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.system_apbBridge.io_apb_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.system_apbBridge.io_apb_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.system_apbBridge.io_apb_PENABLE 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[0] murax.system_apbBridge.io_apb_PRDATA[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[1] murax.system_apbBridge.io_apb_PRDATA[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[2] murax.system_apbBridge.io_apb_PRDATA[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[3] murax.system_apbBridge.io_apb_PRDATA[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[4] murax.system_apbBridge.io_apb_PRDATA[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[5] murax.system_apbBridge.io_apb_PRDATA[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[6] murax.system_apbBridge.io_apb_PRDATA[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[7] murax.system_apbBridge.io_apb_PRDATA[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[8] murax.system_apbBridge.io_apb_PRDATA[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[9] murax.system_apbBridge.io_apb_PRDATA[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[10] murax.system_apbBridge.io_apb_PRDATA[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[11] murax.system_apbBridge.io_apb_PRDATA[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[12] murax.system_apbBridge.io_apb_PRDATA[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[13] murax.system_apbBridge.io_apb_PRDATA[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[14] murax.system_apbBridge.io_apb_PRDATA[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[15] murax.system_apbBridge.io_apb_PRDATA[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[16] murax.system_apbBridge.io_apb_PRDATA[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[17] murax.system_apbBridge.io_apb_PRDATA[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[18] murax.system_apbBridge.io_apb_PRDATA[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[19] murax.system_apbBridge.io_apb_PRDATA[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[20] murax.system_apbBridge.io_apb_PRDATA[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[21] murax.system_apbBridge.io_apb_PRDATA[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[22] murax.system_apbBridge.io_apb_PRDATA[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[23] murax.system_apbBridge.io_apb_PRDATA[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[24] murax.system_apbBridge.io_apb_PRDATA[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[25] murax.system_apbBridge.io_apb_PRDATA[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[26] murax.system_apbBridge.io_apb_PRDATA[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[27] murax.system_apbBridge.io_apb_PRDATA[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[28] murax.system_apbBridge.io_apb_PRDATA[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[29] murax.system_apbBridge.io_apb_PRDATA[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[30] murax.system_apbBridge.io_apb_PRDATA[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_payload_data[31] murax.system_apbBridge.io_apb_PRDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid murax.system_apbBridge.io_apb_PSEL 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_apbBridge.io_apb_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_apbBridge.io_apb_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_apbBridge.io_apb_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_apbBridge.io_apb_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_apbBridge.io_apb_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_apbBridge.io_apb_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_apbBridge.io_apb_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_apbBridge.io_apb_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_apbBridge.io_apb_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_apbBridge.io_apb_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_apbBridge.io_apb_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_apbBridge.io_apb_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_apbBridge.io_apb_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_apbBridge.io_apb_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_apbBridge.io_apb_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_apbBridge.io_apb_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_apbBridge.io_apb_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_apbBridge.io_apb_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_apbBridge.io_apb_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_apbBridge.io_apb_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_apbBridge.io_apb_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_apbBridge.io_apb_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_apbBridge.io_apb_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_apbBridge.io_apb_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_apbBridge.io_apb_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_apbBridge.io_apb_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_apbBridge.io_apb_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_apbBridge.io_apb_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_apbBridge.io_apb_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_apbBridge.io_apb_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_apbBridge.io_apb_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_apbBridge.io_apb_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.system_apbBridge.io_apb_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[7] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[8] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[9] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[10] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[19] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[20] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[21] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[22] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[23] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[24] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[25] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[26] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[27] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[28] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[29] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[30] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_address[31] 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_data[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_payload_write 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[8] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[9] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[10] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[11] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[20] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[21] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[22] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[23] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[24] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[25] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[26] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[27] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[28] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[29] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[30] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[31] 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_valid 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[0] 1 1 .names $undef murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_data[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_ready murax.system_apbBridge.io_pipelinedMemoryBus_cmd_ready 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[0] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[1] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[2] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[3] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[4] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[5] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[6] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[7] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[8] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[9] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[10] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[11] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[12] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[13] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[14] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[15] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[16] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[17] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[18] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[19] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[20] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[21] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[22] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[23] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[24] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[25] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[26] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[27] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[28] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[29] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[30] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[31] murax.system_apbBridge.io_pipelinedMemoryBus_rsp_payload_data[31] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_valid murax.system_apbBridge.io_pipelinedMemoryBus_rsp_valid 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[7] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[8] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[9] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[10] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[19] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[20] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[21] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[22] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[23] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[24] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[25] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[26] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[27] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[28] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[29] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[30] 1 1 .names $undef murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_address[31] 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_data[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.system_apbBridge.pipelinedMemoryBusStage_cmd_payload_write 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid murax.system_apbBridge.pipelinedMemoryBusStage_cmd_valid 1 1 .names io_mainClk murax.system_apbBridge.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_apbBridge.toplevel_resetCtrl_systemReset 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.system_apbBridge_io_apb_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.system_apbBridge_io_apb_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.system_apbBridge_io_apb_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.system_apbBridge_io_apb_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.system_apbBridge_io_apb_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.system_apbBridge_io_apb_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.system_apbBridge_io_apb_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.system_apbBridge_io_apb_PADDR[7] 1 1 .names $undef murax.system_apbBridge_io_apb_PADDR[8] 1 1 .names $undef murax.system_apbBridge_io_apb_PADDR[9] 1 1 .names $undef murax.system_apbBridge_io_apb_PADDR[10] 1 1 .names $undef murax.system_apbBridge_io_apb_PADDR[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[12] murax.system_apbBridge_io_apb_PADDR[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[13] murax.system_apbBridge_io_apb_PADDR[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[14] murax.system_apbBridge_io_apb_PADDR[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[15] murax.system_apbBridge_io_apb_PADDR[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[16] murax.system_apbBridge_io_apb_PADDR[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[17] murax.system_apbBridge_io_apb_PADDR[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[18] murax.system_apbBridge_io_apb_PADDR[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[19] murax.system_apbBridge_io_apb_PADDR[19] 1 1 .names murax.system_apbBridge.state murax.system_apbBridge_io_apb_PENABLE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_valid murax.system_apbBridge_io_apb_PSEL 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_apbBridge_io_apb_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_apbBridge_io_apb_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_apbBridge_io_apb_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_apbBridge_io_apb_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_apbBridge_io_apb_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_apbBridge_io_apb_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_apbBridge_io_apb_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_apbBridge_io_apb_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_apbBridge_io_apb_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_apbBridge_io_apb_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_apbBridge_io_apb_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_apbBridge_io_apb_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_apbBridge_io_apb_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_apbBridge_io_apb_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_apbBridge_io_apb_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_apbBridge_io_apb_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_apbBridge_io_apb_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_apbBridge_io_apb_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_apbBridge_io_apb_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_apbBridge_io_apb_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_apbBridge_io_apb_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_apbBridge_io_apb_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_apbBridge_io_apb_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_apbBridge_io_apb_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_apbBridge_io_apb_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_apbBridge_io_apb_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_apbBridge_io_apb_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_apbBridge_io_apb_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_apbBridge_io_apb_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_apbBridge_io_apb_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_apbBridge_io_apb_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_apbBridge_io_apb_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.system_apbBridge_io_apb_PWRITE 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_ready murax.system_apbBridge_io_pipelinedMemoryBus_cmd_ready 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[0] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[0] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[1] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[1] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[2] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[2] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[3] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[3] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[4] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[4] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[5] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[5] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[6] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[6] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[7] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[7] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[8] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[8] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[9] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[9] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[10] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[10] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[11] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[11] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[12] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[12] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[13] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[13] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[14] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[14] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[15] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[15] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[16] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[16] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[17] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[17] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[18] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[18] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[19] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[19] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[20] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[20] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[21] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[21] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[22] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[22] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[23] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[23] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[24] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[24] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[25] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[25] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[26] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[26] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[27] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[27] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[28] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[28] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[29] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[29] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[30] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[30] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_payload_data[31] murax.system_apbBridge_io_pipelinedMemoryBus_rsp_payload_data[31] 1 1 .names murax.system_apbBridge.pipelinedMemoryBusStage_rsp_m2sPipe_valid murax.system_apbBridge_io_pipelinedMemoryBus_rsp_valid 1 1 .names $true murax.system_cpu.CsrPlugin_interruptCode[0] 1 1 .names $true murax.system_cpu.CsrPlugin_interruptCode[1] 1 1 .names $undef murax.system_cpu.CsrPlugin_interruptCode[2] 1 1 .names murax.system_cpu._zz_110_ murax.system_cpu.CsrPlugin_interruptCode[3] 1 1 .names $undef murax.system_cpu.CsrPlugin_mepc[0] 1 1 .names $undef murax.system_cpu.CsrPlugin_mepc[1] 1 1 .names $true murax.system_cpu.CsrPlugin_trapCause[0] 1 1 .names $true murax.system_cpu.CsrPlugin_trapCause[1] 1 1 .names $undef murax.system_cpu.CsrPlugin_trapCause[2] 1 1 .names murax.system_cpu._zz_110_ murax.system_cpu.CsrPlugin_trapCause[3] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[0] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] murax.system_cpu.IBusSimplePlugin_cmd_payload_pc[31] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[0] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[2] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[3] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[4] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[5] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[6] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[7] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[8] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[9] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[10] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[11] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[12] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[13] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[14] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[15] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[16] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[17] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[18] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[19] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[20] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[21] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[22] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[23] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[24] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[25] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[26] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[27] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[28] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[29] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[30] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[31] murax.system_cpu.IBusSimplePlugin_fetchPc_output_payload[31] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_fetchPc_pc[0] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_fetchPc_pc[1] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[0] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[2] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[3] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[4] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[5] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[6] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[7] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[8] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[9] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[10] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[11] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[12] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[13] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[14] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[15] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[16] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[17] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[18] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[19] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[20] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[21] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[22] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[23] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[24] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[25] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[26] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[27] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[28] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[29] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[30] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[31] murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_payload[31] 1 1 .names murax.system_cpu._zz_86_ murax.system_cpu.IBusSimplePlugin_fetchPc_preOutput_valid 1 1 .names murax.system_cpu._zz_95_[0] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[0] 1 1 .names murax.system_cpu._zz_95_[1] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[1] 1 1 .names murax.system_cpu._zz_95_[2] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[2] 1 1 .names murax.system_cpu._zz_95_[3] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[3] 1 1 .names murax.system_cpu._zz_95_[4] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[4] 1 1 .names murax.system_cpu._zz_95_[5] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[5] 1 1 .names murax.system_cpu._zz_95_[6] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[6] 1 1 .names murax.system_cpu._zz_95_[7] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[7] 1 1 .names murax.system_cpu._zz_95_[8] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[8] 1 1 .names murax.system_cpu._zz_95_[9] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[9] 1 1 .names murax.system_cpu._zz_95_[10] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[10] 1 1 .names murax.system_cpu._zz_95_[11] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[11] 1 1 .names murax.system_cpu._zz_95_[12] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[12] 1 1 .names murax.system_cpu._zz_95_[13] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[13] 1 1 .names murax.system_cpu._zz_95_[14] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[14] 1 1 .names murax.system_cpu._zz_95_[15] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[15] 1 1 .names murax.system_cpu._zz_95_[16] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[16] 1 1 .names murax.system_cpu._zz_95_[17] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[17] 1 1 .names murax.system_cpu._zz_95_[18] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[18] 1 1 .names murax.system_cpu._zz_95_[19] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[19] 1 1 .names murax.system_cpu._zz_95_[20] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[20] 1 1 .names murax.system_cpu._zz_95_[21] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[21] 1 1 .names murax.system_cpu._zz_95_[22] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[22] 1 1 .names murax.system_cpu._zz_95_[23] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[23] 1 1 .names murax.system_cpu._zz_95_[24] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[24] 1 1 .names murax.system_cpu._zz_95_[25] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[25] 1 1 .names murax.system_cpu._zz_95_[26] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[26] 1 1 .names murax.system_cpu._zz_95_[27] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[27] 1 1 .names murax.system_cpu._zz_95_[28] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[28] 1 1 .names murax.system_cpu._zz_95_[29] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[29] 1 1 .names murax.system_cpu._zz_95_[30] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[30] 1 1 .names murax.system_cpu._zz_95_[31] murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_pc[31] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[0] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[2] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[3] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[4] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[5] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[6] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[7] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[8] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[9] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[10] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[11] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[12] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[13] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[14] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[15] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[16] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[17] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[18] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[19] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[20] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[21] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[22] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[23] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[24] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[25] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[26] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[27] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[28] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[29] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[30] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[31] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_payload[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_input_ready 1 1 .names $false murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[0] 1 1 .names $false murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[2] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[3] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[4] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[5] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[6] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[7] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[8] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[9] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[10] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[11] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[12] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[13] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[14] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[15] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[16] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[17] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[18] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[19] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[20] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[21] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[22] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[23] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[24] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[25] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[26] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[27] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[28] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[29] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[30] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pc[31] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_payload[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_0_output_ready 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[0] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[1] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_payload[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_ready 1 1 .names murax.system_cpu._zz_92_ murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_input_valid 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[0] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[1] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_payload[31] 1 1 .names murax.system_cpu._zz_95_[0] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[0] 1 1 .names murax.system_cpu._zz_95_[1] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[1] 1 1 .names murax.system_cpu._zz_95_[2] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[2] 1 1 .names murax.system_cpu._zz_95_[3] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[3] 1 1 .names murax.system_cpu._zz_95_[4] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[4] 1 1 .names murax.system_cpu._zz_95_[5] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[5] 1 1 .names murax.system_cpu._zz_95_[6] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[6] 1 1 .names murax.system_cpu._zz_95_[7] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[7] 1 1 .names murax.system_cpu._zz_95_[8] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[8] 1 1 .names murax.system_cpu._zz_95_[9] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[9] 1 1 .names murax.system_cpu._zz_95_[10] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[10] 1 1 .names murax.system_cpu._zz_95_[11] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[11] 1 1 .names murax.system_cpu._zz_95_[12] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[12] 1 1 .names murax.system_cpu._zz_95_[13] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[13] 1 1 .names murax.system_cpu._zz_95_[14] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[14] 1 1 .names murax.system_cpu._zz_95_[15] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[15] 1 1 .names murax.system_cpu._zz_95_[16] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[16] 1 1 .names murax.system_cpu._zz_95_[17] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[17] 1 1 .names murax.system_cpu._zz_95_[18] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[18] 1 1 .names murax.system_cpu._zz_95_[19] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[19] 1 1 .names murax.system_cpu._zz_95_[20] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[20] 1 1 .names murax.system_cpu._zz_95_[21] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[21] 1 1 .names murax.system_cpu._zz_95_[22] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[22] 1 1 .names murax.system_cpu._zz_95_[23] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[23] 1 1 .names murax.system_cpu._zz_95_[24] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[24] 1 1 .names murax.system_cpu._zz_95_[25] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[25] 1 1 .names murax.system_cpu._zz_95_[26] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[26] 1 1 .names murax.system_cpu._zz_95_[27] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[27] 1 1 .names murax.system_cpu._zz_95_[28] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[28] 1 1 .names murax.system_cpu._zz_95_[29] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[29] 1 1 .names murax.system_cpu._zz_95_[30] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[30] 1 1 .names murax.system_cpu._zz_95_[31] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_payload[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_ready 1 1 .names murax.system_cpu._zz_94_ murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_input_valid 1 1 .names murax.system_cpu._zz_95_[0] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[0] 1 1 .names murax.system_cpu._zz_95_[1] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[1] 1 1 .names murax.system_cpu._zz_95_[2] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[2] 1 1 .names murax.system_cpu._zz_95_[3] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[3] 1 1 .names murax.system_cpu._zz_95_[4] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[4] 1 1 .names murax.system_cpu._zz_95_[5] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[5] 1 1 .names murax.system_cpu._zz_95_[6] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[6] 1 1 .names murax.system_cpu._zz_95_[7] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[7] 1 1 .names murax.system_cpu._zz_95_[8] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[8] 1 1 .names murax.system_cpu._zz_95_[9] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[9] 1 1 .names murax.system_cpu._zz_95_[10] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[10] 1 1 .names murax.system_cpu._zz_95_[11] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[11] 1 1 .names murax.system_cpu._zz_95_[12] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[12] 1 1 .names murax.system_cpu._zz_95_[13] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[13] 1 1 .names murax.system_cpu._zz_95_[14] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[14] 1 1 .names murax.system_cpu._zz_95_[15] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[15] 1 1 .names murax.system_cpu._zz_95_[16] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[16] 1 1 .names murax.system_cpu._zz_95_[17] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[17] 1 1 .names murax.system_cpu._zz_95_[18] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[18] 1 1 .names murax.system_cpu._zz_95_[19] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[19] 1 1 .names murax.system_cpu._zz_95_[20] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[20] 1 1 .names murax.system_cpu._zz_95_[21] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[21] 1 1 .names murax.system_cpu._zz_95_[22] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[22] 1 1 .names murax.system_cpu._zz_95_[23] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[23] 1 1 .names murax.system_cpu._zz_95_[24] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[24] 1 1 .names murax.system_cpu._zz_95_[25] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[25] 1 1 .names murax.system_cpu._zz_95_[26] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[26] 1 1 .names murax.system_cpu._zz_95_[27] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[27] 1 1 .names murax.system_cpu._zz_95_[28] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[28] 1 1 .names murax.system_cpu._zz_95_[29] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[29] 1 1 .names murax.system_cpu._zz_95_[30] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[30] 1 1 .names murax.system_cpu._zz_95_[31] murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_payload[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_1_output_ready murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_ready 1 1 .names murax.system_cpu._zz_94_ murax.system_cpu.IBusSimplePlugin_iBusRsp_stages_2_output_valid 1 1 .names murax.system_cpu._zz_97_[0] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[0] 1 1 .names murax.system_cpu._zz_97_[1] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[1] 1 1 .names murax.system_cpu._zz_97_[2] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[2] 1 1 .names murax.system_cpu._zz_97_[3] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[3] 1 1 .names murax.system_cpu._zz_97_[4] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[4] 1 1 .names murax.system_cpu._zz_97_[5] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[5] 1 1 .names murax.system_cpu._zz_97_[6] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[6] 1 1 .names murax.system_cpu._zz_97_[7] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[7] 1 1 .names murax.system_cpu._zz_97_[8] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[8] 1 1 .names murax.system_cpu._zz_97_[9] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[9] 1 1 .names murax.system_cpu._zz_97_[10] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[10] 1 1 .names murax.system_cpu._zz_97_[11] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[11] 1 1 .names murax.system_cpu._zz_97_[12] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[12] 1 1 .names murax.system_cpu._zz_97_[13] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[13] 1 1 .names murax.system_cpu._zz_97_[14] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[14] 1 1 .names murax.system_cpu._zz_97_[15] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[15] 1 1 .names murax.system_cpu._zz_97_[16] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[16] 1 1 .names murax.system_cpu._zz_97_[17] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[17] 1 1 .names murax.system_cpu._zz_97_[18] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[18] 1 1 .names murax.system_cpu._zz_97_[19] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[19] 1 1 .names murax.system_cpu._zz_97_[20] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[20] 1 1 .names murax.system_cpu._zz_97_[21] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[21] 1 1 .names murax.system_cpu._zz_97_[22] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[22] 1 1 .names murax.system_cpu._zz_97_[23] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[23] 1 1 .names murax.system_cpu._zz_97_[24] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[24] 1 1 .names murax.system_cpu._zz_97_[25] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[25] 1 1 .names murax.system_cpu._zz_97_[26] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[26] 1 1 .names murax.system_cpu._zz_97_[27] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[27] 1 1 .names murax.system_cpu._zz_97_[28] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[28] 1 1 .names murax.system_cpu._zz_97_[29] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[29] 1 1 .names murax.system_cpu._zz_97_[30] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[30] 1 1 .names murax.system_cpu._zz_97_[31] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_pc[31] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[0] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[2] 1 1 .names murax.system_cpu._zz_99_[3] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[3] 1 1 .names murax.system_cpu._zz_99_[4] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[4] 1 1 .names murax.system_cpu._zz_99_[5] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[5] 1 1 .names murax.system_cpu._zz_99_[6] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[6] 1 1 .names murax.system_cpu._zz_99_[7] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[7] 1 1 .names murax.system_cpu._zz_99_[8] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[8] 1 1 .names murax.system_cpu._zz_99_[9] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[9] 1 1 .names murax.system_cpu._zz_99_[10] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[10] 1 1 .names murax.system_cpu._zz_99_[11] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[11] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[12] 1 1 .names murax.system_cpu._zz_99_[13] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[13] 1 1 .names murax.system_cpu._zz_99_[14] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[14] 1 1 .names murax.system_cpu._zz_99_[15] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[15] 1 1 .names murax.system_cpu._zz_99_[16] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[16] 1 1 .names murax.system_cpu._zz_99_[17] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[17] 1 1 .names murax.system_cpu._zz_99_[18] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[18] 1 1 .names murax.system_cpu._zz_99_[19] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[19] 1 1 .names murax.system_cpu._zz_99_[20] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[20] 1 1 .names murax.system_cpu._zz_99_[21] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[21] 1 1 .names murax.system_cpu._zz_99_[22] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[22] 1 1 .names murax.system_cpu._zz_99_[23] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[23] 1 1 .names murax.system_cpu._zz_99_[24] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[24] 1 1 .names murax.system_cpu._zz_99_[25] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[25] 1 1 .names murax.system_cpu._zz_99_[26] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[26] 1 1 .names murax.system_cpu._zz_99_[27] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[27] 1 1 .names murax.system_cpu._zz_99_[28] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[28] 1 1 .names murax.system_cpu._zz_99_[29] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[29] 1 1 .names murax.system_cpu._zz_99_[30] murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[30] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu.IBusSimplePlugin_injector_decodeInput_payload_rsp_inst[31] 1 1 .names murax.system_cpu._zz_96_ murax.system_cpu.IBusSimplePlugin_injector_decodeInput_valid 1 1 .names murax.system_cpu._zz_95_[0] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[0] 1 1 .names murax.system_cpu._zz_95_[1] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[1] 1 1 .names murax.system_cpu._zz_95_[2] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[2] 1 1 .names murax.system_cpu._zz_95_[3] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[3] 1 1 .names murax.system_cpu._zz_95_[4] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[4] 1 1 .names murax.system_cpu._zz_95_[5] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[5] 1 1 .names murax.system_cpu._zz_95_[6] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[6] 1 1 .names murax.system_cpu._zz_95_[7] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[7] 1 1 .names murax.system_cpu._zz_95_[8] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[8] 1 1 .names murax.system_cpu._zz_95_[9] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[9] 1 1 .names murax.system_cpu._zz_95_[10] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[10] 1 1 .names murax.system_cpu._zz_95_[11] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[11] 1 1 .names murax.system_cpu._zz_95_[12] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[12] 1 1 .names murax.system_cpu._zz_95_[13] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[13] 1 1 .names murax.system_cpu._zz_95_[14] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[14] 1 1 .names murax.system_cpu._zz_95_[15] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[15] 1 1 .names murax.system_cpu._zz_95_[16] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[16] 1 1 .names murax.system_cpu._zz_95_[17] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[17] 1 1 .names murax.system_cpu._zz_95_[18] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[18] 1 1 .names murax.system_cpu._zz_95_[19] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[19] 1 1 .names murax.system_cpu._zz_95_[20] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[20] 1 1 .names murax.system_cpu._zz_95_[21] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[21] 1 1 .names murax.system_cpu._zz_95_[22] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[22] 1 1 .names murax.system_cpu._zz_95_[23] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[23] 1 1 .names murax.system_cpu._zz_95_[24] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[24] 1 1 .names murax.system_cpu._zz_95_[25] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[25] 1 1 .names murax.system_cpu._zz_95_[26] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[26] 1 1 .names murax.system_cpu._zz_95_[27] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[27] 1 1 .names murax.system_cpu._zz_95_[28] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[28] 1 1 .names murax.system_cpu._zz_95_[29] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[29] 1 1 .names murax.system_cpu._zz_95_[30] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[30] 1 1 .names murax.system_cpu._zz_95_[31] murax.system_cpu.IBusSimplePlugin_rspJoin_fetchRsp_pc[31] 1 1 .names murax.system_cpu._zz_95_[0] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[0] 1 1 .names murax.system_cpu._zz_95_[1] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[1] 1 1 .names murax.system_cpu._zz_95_[2] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[2] 1 1 .names murax.system_cpu._zz_95_[3] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[3] 1 1 .names murax.system_cpu._zz_95_[4] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[4] 1 1 .names murax.system_cpu._zz_95_[5] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[5] 1 1 .names murax.system_cpu._zz_95_[6] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[6] 1 1 .names murax.system_cpu._zz_95_[7] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[7] 1 1 .names murax.system_cpu._zz_95_[8] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[8] 1 1 .names murax.system_cpu._zz_95_[9] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[9] 1 1 .names murax.system_cpu._zz_95_[10] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[10] 1 1 .names murax.system_cpu._zz_95_[11] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[11] 1 1 .names murax.system_cpu._zz_95_[12] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[12] 1 1 .names murax.system_cpu._zz_95_[13] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[13] 1 1 .names murax.system_cpu._zz_95_[14] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[14] 1 1 .names murax.system_cpu._zz_95_[15] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[15] 1 1 .names murax.system_cpu._zz_95_[16] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[16] 1 1 .names murax.system_cpu._zz_95_[17] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[17] 1 1 .names murax.system_cpu._zz_95_[18] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[18] 1 1 .names murax.system_cpu._zz_95_[19] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[19] 1 1 .names murax.system_cpu._zz_95_[20] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[20] 1 1 .names murax.system_cpu._zz_95_[21] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[21] 1 1 .names murax.system_cpu._zz_95_[22] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[22] 1 1 .names murax.system_cpu._zz_95_[23] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[23] 1 1 .names murax.system_cpu._zz_95_[24] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[24] 1 1 .names murax.system_cpu._zz_95_[25] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[25] 1 1 .names murax.system_cpu._zz_95_[26] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[26] 1 1 .names murax.system_cpu._zz_95_[27] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[27] 1 1 .names murax.system_cpu._zz_95_[28] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[28] 1 1 .names murax.system_cpu._zz_95_[29] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[29] 1 1 .names murax.system_cpu._zz_95_[30] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[30] 1 1 .names murax.system_cpu._zz_95_[31] murax.system_cpu.IBusSimplePlugin_rspJoin_join_payload_pc[31] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[0] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[1] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[3] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[4] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[5] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[6] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[7] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[8] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[9] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[10] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[11] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[12] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[13] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[14] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[15] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[16] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[17] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[18] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[19] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[20] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[21] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[22] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[23] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[24] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[25] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[26] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[27] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[28] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[29] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[30] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[31] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[32] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_2_[32] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[0] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[1] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[3] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[4] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[5] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[6] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[7] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[8] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[9] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[10] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[11] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[12] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[13] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[14] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[15] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[16] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[17] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[18] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[19] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[20] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[21] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[22] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[23] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[24] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[25] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[26] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[27] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[28] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[29] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[30] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[31] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[32] murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_3_[32] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[0] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[1] 1 1 .names $undef murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_4_[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.full 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_occupancy 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c._zz_1_ murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.pushing 1 1 .names io_mainClk murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.toplevel_resetCtrl_systemReset 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.risingOccupancy murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c_io_occupancy 1 1 .names murax.system_cpu.decode_to_execute_RS2[0] murax.system_cpu._zz_102_[0] 1 1 .names murax.system_cpu.decode_to_execute_RS2[1] murax.system_cpu._zz_102_[1] 1 1 .names murax.system_cpu.decode_to_execute_RS2[2] murax.system_cpu._zz_102_[2] 1 1 .names murax.system_cpu.decode_to_execute_RS2[3] murax.system_cpu._zz_102_[3] 1 1 .names murax.system_cpu.decode_to_execute_RS2[4] murax.system_cpu._zz_102_[4] 1 1 .names murax.system_cpu.decode_to_execute_RS2[5] murax.system_cpu._zz_102_[5] 1 1 .names murax.system_cpu.decode_to_execute_RS2[6] murax.system_cpu._zz_102_[6] 1 1 .names murax.system_cpu.decode_to_execute_RS2[7] murax.system_cpu._zz_102_[7] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[8] murax.system_cpu._zz_102_[8] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[9] murax.system_cpu._zz_102_[9] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[10] murax.system_cpu._zz_102_[10] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[11] murax.system_cpu._zz_102_[11] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[12] murax.system_cpu._zz_102_[12] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[13] murax.system_cpu._zz_102_[13] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[14] murax.system_cpu._zz_102_[14] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[15] murax.system_cpu._zz_102_[15] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[16] murax.system_cpu._zz_102_[16] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[17] murax.system_cpu._zz_102_[17] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[18] murax.system_cpu._zz_102_[18] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[19] murax.system_cpu._zz_102_[19] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[20] murax.system_cpu._zz_102_[20] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[21] murax.system_cpu._zz_102_[21] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[22] murax.system_cpu._zz_102_[22] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[23] murax.system_cpu._zz_102_[23] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[24] murax.system_cpu._zz_102_[24] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[25] murax.system_cpu._zz_102_[25] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[26] murax.system_cpu._zz_102_[26] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[27] murax.system_cpu._zz_102_[27] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[28] murax.system_cpu._zz_102_[28] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[29] murax.system_cpu._zz_102_[29] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[30] murax.system_cpu._zz_102_[30] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[31] murax.system_cpu._zz_102_[31] 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_10_ 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_111_[0] 1 1 .names $undef murax.system_cpu._zz_111_[1] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_111_[2] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_111_[3] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_111_[7] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_111_[8] 1 1 .names murax.system_cpu._zz_53_ murax.system_cpu._zz_111_[9] 1 1 .names murax.system_cpu.decode_SRC_LESS_UNSIGNED murax.system_cpu._zz_111_[10] 1 1 .names murax.system_cpu.decode_MEMORY_ENABLE murax.system_cpu._zz_111_[13] 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_111_[14] 1 1 .names murax.system_cpu._zz_237_ murax.system_cpu._zz_111_[15] 1 1 .names murax.system_cpu.decode_IS_CSR murax.system_cpu._zz_111_[16] 1 1 .names murax.system_cpu.decode_SRC_USE_SUB_LESS murax.system_cpu._zz_111_[19] 1 1 .names murax.system_cpu._zz_15_[0] murax.system_cpu._zz_111_[21] 1 1 .names murax.system_cpu._zz_15_[1] murax.system_cpu._zz_111_[22] 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_118_ 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_119_[0] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_119_[1] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_11_[0] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_11_[1] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_121_[0] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_121_[1] 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_122_[0] 1 1 .names murax.system_cpu._zz_237_ murax.system_cpu._zz_122_[1] 1 1 .names murax.system_cpu._zz_15_[0] murax.system_cpu._zz_124_[0] 1 1 .names murax.system_cpu._zz_15_[1] murax.system_cpu._zz_124_[1] 1 1 .names murax.system_cpu.decode_SRC1[0] murax.system_cpu._zz_127_[0] 1 1 .names murax.system_cpu.decode_SRC1[1] murax.system_cpu._zz_127_[1] 1 1 .names murax.system_cpu.decode_SRC1[2] murax.system_cpu._zz_127_[2] 1 1 .names murax.system_cpu.decode_SRC1[3] murax.system_cpu._zz_127_[3] 1 1 .names murax.system_cpu.decode_SRC1[4] murax.system_cpu._zz_127_[4] 1 1 .names $undef murax.system_cpu._zz_127_[5] 1 1 .names $undef murax.system_cpu._zz_127_[6] 1 1 .names $undef murax.system_cpu._zz_127_[7] 1 1 .names $undef murax.system_cpu._zz_127_[8] 1 1 .names $undef murax.system_cpu._zz_127_[9] 1 1 .names $undef murax.system_cpu._zz_127_[10] 1 1 .names $undef murax.system_cpu._zz_127_[11] 1 1 .names $undef murax.system_cpu._zz_127_[12] 1 1 .names $undef murax.system_cpu._zz_127_[13] 1 1 .names $undef murax.system_cpu._zz_127_[14] 1 1 .names $undef murax.system_cpu._zz_127_[15] 1 1 .names $undef murax.system_cpu._zz_127_[16] 1 1 .names $undef murax.system_cpu._zz_127_[17] 1 1 .names $undef murax.system_cpu._zz_127_[18] 1 1 .names $undef murax.system_cpu._zz_127_[19] 1 1 .names $undef murax.system_cpu._zz_127_[20] 1 1 .names $undef murax.system_cpu._zz_127_[21] 1 1 .names $undef murax.system_cpu._zz_127_[22] 1 1 .names $undef murax.system_cpu._zz_127_[23] 1 1 .names $undef murax.system_cpu._zz_127_[24] 1 1 .names $undef murax.system_cpu._zz_127_[25] 1 1 .names $undef murax.system_cpu._zz_127_[26] 1 1 .names $undef murax.system_cpu._zz_127_[27] 1 1 .names $undef murax.system_cpu._zz_127_[28] 1 1 .names $undef murax.system_cpu._zz_127_[29] 1 1 .names $undef murax.system_cpu._zz_127_[30] 1 1 .names $undef murax.system_cpu._zz_127_[31] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[0] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[1] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[2] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[3] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[4] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[5] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[6] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[7] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[8] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[9] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[10] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[11] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[12] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[13] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[14] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[15] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[16] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[17] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[18] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_129_[19] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_12_[0] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_12_[1] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_130_ 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[0] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[1] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[2] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[3] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[4] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[5] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[6] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[7] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[8] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[9] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[10] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[11] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[12] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[13] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[14] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[15] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[16] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[17] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[18] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_131_[19] 1 1 .names murax.system_cpu.decode_SRC2[0] murax.system_cpu._zz_132_[0] 1 1 .names murax.system_cpu.decode_SRC2[1] murax.system_cpu._zz_132_[1] 1 1 .names murax.system_cpu.decode_SRC2[2] murax.system_cpu._zz_132_[2] 1 1 .names murax.system_cpu.decode_SRC2[3] murax.system_cpu._zz_132_[3] 1 1 .names murax.system_cpu.decode_SRC2[4] murax.system_cpu._zz_132_[4] 1 1 .names murax.system_cpu.decode_SRC2[5] murax.system_cpu._zz_132_[5] 1 1 .names murax.system_cpu.decode_SRC2[6] murax.system_cpu._zz_132_[6] 1 1 .names murax.system_cpu.decode_SRC2[7] murax.system_cpu._zz_132_[7] 1 1 .names murax.system_cpu.decode_SRC2[8] murax.system_cpu._zz_132_[8] 1 1 .names murax.system_cpu.decode_SRC2[9] murax.system_cpu._zz_132_[9] 1 1 .names murax.system_cpu.decode_SRC2[10] murax.system_cpu._zz_132_[10] 1 1 .names murax.system_cpu.decode_SRC2[11] murax.system_cpu._zz_132_[11] 1 1 .names murax.system_cpu.decode_SRC2[12] murax.system_cpu._zz_132_[12] 1 1 .names murax.system_cpu.decode_SRC2[13] murax.system_cpu._zz_132_[13] 1 1 .names murax.system_cpu.decode_SRC2[14] murax.system_cpu._zz_132_[14] 1 1 .names murax.system_cpu.decode_SRC2[15] murax.system_cpu._zz_132_[15] 1 1 .names murax.system_cpu.decode_SRC2[16] murax.system_cpu._zz_132_[16] 1 1 .names murax.system_cpu.decode_SRC2[17] murax.system_cpu._zz_132_[17] 1 1 .names murax.system_cpu.decode_SRC2[18] murax.system_cpu._zz_132_[18] 1 1 .names murax.system_cpu.decode_SRC2[19] murax.system_cpu._zz_132_[19] 1 1 .names murax.system_cpu.decode_SRC2[20] murax.system_cpu._zz_132_[20] 1 1 .names murax.system_cpu.decode_SRC2[21] murax.system_cpu._zz_132_[21] 1 1 .names murax.system_cpu.decode_SRC2[22] murax.system_cpu._zz_132_[22] 1 1 .names murax.system_cpu.decode_SRC2[23] murax.system_cpu._zz_132_[23] 1 1 .names murax.system_cpu.decode_SRC2[24] murax.system_cpu._zz_132_[24] 1 1 .names murax.system_cpu.decode_SRC2[25] murax.system_cpu._zz_132_[25] 1 1 .names murax.system_cpu.decode_SRC2[26] murax.system_cpu._zz_132_[26] 1 1 .names murax.system_cpu.decode_SRC2[27] murax.system_cpu._zz_132_[27] 1 1 .names murax.system_cpu.decode_SRC2[28] murax.system_cpu._zz_132_[28] 1 1 .names murax.system_cpu.decode_SRC2[29] murax.system_cpu._zz_132_[29] 1 1 .names murax.system_cpu.decode_SRC2[30] murax.system_cpu._zz_132_[30] 1 1 .names murax.system_cpu.decode_SRC2[31] murax.system_cpu._zz_132_[31] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[12] murax.system_cpu._zz_139_[0] 1 1 .names murax.system_cpu._zz_165_ murax.system_cpu._zz_139_[1] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[14] murax.system_cpu._zz_139_[2] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_13_[0] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_13_[1] 1 1 .names murax.system_cpu.execute_BRANCH_DO murax.system_cpu._zz_141_ 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[0] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[1] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[2] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[3] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[4] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[5] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[6] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[7] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[8] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[9] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_143_[10] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_144_ 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[0] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[1] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[2] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[3] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[4] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[5] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[6] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[7] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[8] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[9] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[10] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[11] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[12] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[13] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[14] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[15] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[16] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[17] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[18] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_145_[19] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_146_ 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[0] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[1] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[2] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[3] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[4] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[5] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[6] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[7] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[8] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[9] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[10] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[11] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[12] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[13] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[14] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[15] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[16] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[17] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_147_[18] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[25] murax.system_cpu._zz_148_[5] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[26] murax.system_cpu._zz_148_[6] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[27] murax.system_cpu._zz_148_[7] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[28] murax.system_cpu._zz_148_[8] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[29] murax.system_cpu._zz_148_[9] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[30] murax.system_cpu._zz_148_[10] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[20] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[21] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[22] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[23] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[24] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[25] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[26] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[27] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[28] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[29] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[30] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_148_[31] 1 1 .names murax.system_cpu._zz_15_[0] murax.system_cpu._zz_14_[0] 1 1 .names murax.system_cpu._zz_15_[1] murax.system_cpu._zz_14_[1] 1 1 .names murax.system_cpu.CsrPlugin_interruptJump murax.system_cpu._zz_159_ 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[2] murax.system_cpu._zz_162_[0] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[3] murax.system_cpu._zz_162_[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[4] murax.system_cpu._zz_162_[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[5] murax.system_cpu._zz_162_[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[6] murax.system_cpu._zz_162_[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[7] murax.system_cpu._zz_162_[5] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[12] murax.system_cpu._zz_163_[0] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] murax.system_cpu._zz_163_[1] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[28] murax.system_cpu._zz_164_[0] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[29] murax.system_cpu._zz_164_[1] 1 1 .names $false murax.system_cpu._zz_168_[0] 1 1 .names $false murax.system_cpu._zz_168_[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_inc murax.system_cpu._zz_168_[2] 1 1 .names $false murax.system_cpu._zz_169_[0] 1 1 .names $false murax.system_cpu._zz_169_[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_inc murax.system_cpu._zz_169_[2] 1 1 .names $false murax.system_cpu._zz_169_[3] 1 1 .names $false murax.system_cpu._zz_169_[4] 1 1 .names $false murax.system_cpu._zz_169_[5] 1 1 .names $false murax.system_cpu._zz_169_[6] 1 1 .names $false murax.system_cpu._zz_169_[7] 1 1 .names $false murax.system_cpu._zz_169_[8] 1 1 .names $false murax.system_cpu._zz_169_[9] 1 1 .names $false murax.system_cpu._zz_169_[10] 1 1 .names $false murax.system_cpu._zz_169_[11] 1 1 .names $false murax.system_cpu._zz_169_[12] 1 1 .names $false murax.system_cpu._zz_169_[13] 1 1 .names $false murax.system_cpu._zz_169_[14] 1 1 .names $false murax.system_cpu._zz_169_[15] 1 1 .names $false murax.system_cpu._zz_169_[16] 1 1 .names $false murax.system_cpu._zz_169_[17] 1 1 .names $false murax.system_cpu._zz_169_[18] 1 1 .names $false murax.system_cpu._zz_169_[19] 1 1 .names $false murax.system_cpu._zz_169_[20] 1 1 .names $false murax.system_cpu._zz_169_[21] 1 1 .names $false murax.system_cpu._zz_169_[22] 1 1 .names $false murax.system_cpu._zz_169_[23] 1 1 .names $false murax.system_cpu._zz_169_[24] 1 1 .names $false murax.system_cpu._zz_169_[25] 1 1 .names $false murax.system_cpu._zz_169_[26] 1 1 .names $false murax.system_cpu._zz_169_[27] 1 1 .names $false murax.system_cpu._zz_169_[28] 1 1 .names $false murax.system_cpu._zz_169_[29] 1 1 .names $false murax.system_cpu._zz_169_[30] 1 1 .names $false murax.system_cpu._zz_169_[31] 1 1 .names murax.system_cpu._zz_15_[0] murax.system_cpu._zz_16_[0] 1 1 .names murax.system_cpu._zz_15_[1] murax.system_cpu._zz_16_[1] 1 1 .names murax.system_cpu._zz_171_ murax.system_cpu._zz_172_[0] 1 1 .names $false murax.system_cpu._zz_172_[1] 1 1 .names $false murax.system_cpu._zz_172_[2] 1 1 .names murax.system_cpu._zz_53_ murax.system_cpu._zz_179_ 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_17_[0] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_17_[1] 1 1 .names murax.system_cpu.decode_SRC_LESS_UNSIGNED murax.system_cpu._zz_180_ 1 1 .names murax.system_cpu.decode_MEMORY_ENABLE murax.system_cpu._zz_183_ 1 1 .names murax.system_cpu.decode_IS_CSR murax.system_cpu._zz_184_ 1 1 .names murax.system_cpu.decode_SRC_USE_SUB_LESS murax.system_cpu._zz_185_ 1 1 .names murax.system_cpu._zz_99_[15] murax.system_cpu._zz_189_[0] 1 1 .names murax.system_cpu._zz_99_[16] murax.system_cpu._zz_189_[1] 1 1 .names murax.system_cpu._zz_99_[17] murax.system_cpu._zz_189_[2] 1 1 .names murax.system_cpu._zz_99_[18] murax.system_cpu._zz_189_[3] 1 1 .names murax.system_cpu._zz_99_[19] murax.system_cpu._zz_189_[4] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_18_[0] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_18_[1] 1 1 .names murax.system_cpu._zz_99_[20] murax.system_cpu._zz_190_[0] 1 1 .names murax.system_cpu._zz_99_[21] murax.system_cpu._zz_190_[1] 1 1 .names murax.system_cpu._zz_99_[22] murax.system_cpu._zz_190_[2] 1 1 .names murax.system_cpu._zz_99_[23] murax.system_cpu._zz_190_[3] 1 1 .names murax.system_cpu._zz_99_[24] murax.system_cpu._zz_190_[4] 1 1 .names murax.system_cpu._zz_99_[25] murax.system_cpu._zz_190_[5] 1 1 .names murax.system_cpu._zz_99_[26] murax.system_cpu._zz_190_[6] 1 1 .names murax.system_cpu._zz_99_[27] murax.system_cpu._zz_190_[7] 1 1 .names murax.system_cpu._zz_99_[28] murax.system_cpu._zz_190_[8] 1 1 .names murax.system_cpu._zz_99_[29] murax.system_cpu._zz_190_[9] 1 1 .names murax.system_cpu._zz_99_[30] murax.system_cpu._zz_190_[10] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_190_[11] 1 1 .names murax.system_cpu._zz_99_[7] murax.system_cpu._zz_191_[0] 1 1 .names murax.system_cpu._zz_99_[8] murax.system_cpu._zz_191_[1] 1 1 .names murax.system_cpu._zz_99_[9] murax.system_cpu._zz_191_[2] 1 1 .names murax.system_cpu._zz_99_[10] murax.system_cpu._zz_191_[3] 1 1 .names murax.system_cpu._zz_99_[11] murax.system_cpu._zz_191_[4] 1 1 .names murax.system_cpu._zz_99_[25] murax.system_cpu._zz_191_[5] 1 1 .names murax.system_cpu._zz_99_[26] murax.system_cpu._zz_191_[6] 1 1 .names murax.system_cpu._zz_99_[27] murax.system_cpu._zz_191_[7] 1 1 .names murax.system_cpu._zz_99_[28] murax.system_cpu._zz_191_[8] 1 1 .names murax.system_cpu._zz_99_[29] murax.system_cpu._zz_191_[9] 1 1 .names murax.system_cpu._zz_99_[30] murax.system_cpu._zz_191_[10] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_191_[11] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu._zz_192_[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu._zz_192_[1] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[2] murax.system_cpu._zz_192_[2] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[3] murax.system_cpu._zz_192_[3] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[4] murax.system_cpu._zz_192_[4] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[5] murax.system_cpu._zz_192_[5] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[6] murax.system_cpu._zz_192_[6] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[7] murax.system_cpu._zz_192_[7] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[8] murax.system_cpu._zz_192_[8] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[9] murax.system_cpu._zz_192_[9] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[10] murax.system_cpu._zz_192_[10] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[11] murax.system_cpu._zz_192_[11] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[12] murax.system_cpu._zz_192_[12] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[13] murax.system_cpu._zz_192_[13] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[14] murax.system_cpu._zz_192_[14] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[15] murax.system_cpu._zz_192_[15] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[16] murax.system_cpu._zz_192_[16] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[17] murax.system_cpu._zz_192_[17] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[18] murax.system_cpu._zz_192_[18] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[19] murax.system_cpu._zz_192_[19] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[20] murax.system_cpu._zz_192_[20] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[21] murax.system_cpu._zz_192_[21] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[22] murax.system_cpu._zz_192_[22] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[23] murax.system_cpu._zz_192_[23] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[24] murax.system_cpu._zz_192_[24] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[25] murax.system_cpu._zz_192_[25] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[26] murax.system_cpu._zz_192_[26] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[27] murax.system_cpu._zz_192_[27] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[28] murax.system_cpu._zz_192_[28] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[29] murax.system_cpu._zz_192_[29] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[30] murax.system_cpu._zz_192_[30] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[31] murax.system_cpu._zz_192_[31] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[0] murax.system_cpu._zz_194_[0] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[1] murax.system_cpu._zz_194_[1] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[2] murax.system_cpu._zz_194_[2] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[3] murax.system_cpu._zz_194_[3] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[4] murax.system_cpu._zz_194_[4] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[5] murax.system_cpu._zz_194_[5] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[6] murax.system_cpu._zz_194_[6] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[7] murax.system_cpu._zz_194_[7] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[8] murax.system_cpu._zz_194_[8] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[9] murax.system_cpu._zz_194_[9] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[10] murax.system_cpu._zz_194_[10] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[11] murax.system_cpu._zz_194_[11] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[12] murax.system_cpu._zz_194_[12] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[13] murax.system_cpu._zz_194_[13] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[14] murax.system_cpu._zz_194_[14] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[15] murax.system_cpu._zz_194_[15] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[16] murax.system_cpu._zz_194_[16] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[17] murax.system_cpu._zz_194_[17] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[18] murax.system_cpu._zz_194_[18] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[19] murax.system_cpu._zz_194_[19] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[20] murax.system_cpu._zz_194_[20] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[21] murax.system_cpu._zz_194_[21] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[22] murax.system_cpu._zz_194_[22] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[23] murax.system_cpu._zz_194_[23] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[24] murax.system_cpu._zz_194_[24] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[25] murax.system_cpu._zz_194_[25] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[26] murax.system_cpu._zz_194_[26] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[27] murax.system_cpu._zz_194_[27] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[28] murax.system_cpu._zz_194_[28] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[29] murax.system_cpu._zz_194_[29] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[30] murax.system_cpu._zz_194_[30] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[31] murax.system_cpu._zz_194_[31] 1 1 .names murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS murax.system_cpu._zz_196_ 1 1 .names murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS murax.system_cpu._zz_197_[0] 1 1 .names $false murax.system_cpu._zz_197_[1] 1 1 .names $false murax.system_cpu._zz_197_[2] 1 1 .names $false murax.system_cpu._zz_197_[3] 1 1 .names $false murax.system_cpu._zz_197_[4] 1 1 .names $false murax.system_cpu._zz_197_[5] 1 1 .names $false murax.system_cpu._zz_197_[6] 1 1 .names $false murax.system_cpu._zz_197_[7] 1 1 .names $false murax.system_cpu._zz_197_[8] 1 1 .names $false murax.system_cpu._zz_197_[9] 1 1 .names $false murax.system_cpu._zz_197_[10] 1 1 .names $false murax.system_cpu._zz_197_[11] 1 1 .names $false murax.system_cpu._zz_197_[12] 1 1 .names $false murax.system_cpu._zz_197_[13] 1 1 .names $false murax.system_cpu._zz_197_[14] 1 1 .names $false murax.system_cpu._zz_197_[15] 1 1 .names $false murax.system_cpu._zz_197_[16] 1 1 .names $false murax.system_cpu._zz_197_[17] 1 1 .names $false murax.system_cpu._zz_197_[18] 1 1 .names $false murax.system_cpu._zz_197_[19] 1 1 .names $false murax.system_cpu._zz_197_[20] 1 1 .names $false murax.system_cpu._zz_197_[21] 1 1 .names $false murax.system_cpu._zz_197_[22] 1 1 .names $false murax.system_cpu._zz_197_[23] 1 1 .names $false murax.system_cpu._zz_197_[24] 1 1 .names $false murax.system_cpu._zz_197_[25] 1 1 .names $false murax.system_cpu._zz_197_[26] 1 1 .names $false murax.system_cpu._zz_197_[27] 1 1 .names $false murax.system_cpu._zz_197_[28] 1 1 .names $false murax.system_cpu._zz_197_[29] 1 1 .names $false murax.system_cpu._zz_197_[30] 1 1 .names $false murax.system_cpu._zz_197_[31] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_19_[0] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_19_[1] 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_1_[0] 1 1 .names murax.system_cpu._zz_237_ murax.system_cpu._zz_1_[1] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[21] murax.system_cpu._zz_202_[0] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[22] murax.system_cpu._zz_202_[1] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[23] murax.system_cpu._zz_202_[2] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[24] murax.system_cpu._zz_202_[3] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[25] murax.system_cpu._zz_202_[4] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[26] murax.system_cpu._zz_202_[5] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[27] murax.system_cpu._zz_202_[6] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[28] murax.system_cpu._zz_202_[7] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[29] murax.system_cpu._zz_202_[8] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[30] murax.system_cpu._zz_202_[9] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[20] murax.system_cpu._zz_202_[10] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[12] murax.system_cpu._zz_202_[11] 1 1 .names murax.system_cpu._zz_165_ murax.system_cpu._zz_202_[12] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[14] murax.system_cpu._zz_202_[13] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[15] murax.system_cpu._zz_202_[14] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[16] murax.system_cpu._zz_202_[15] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[17] murax.system_cpu._zz_202_[16] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[18] murax.system_cpu._zz_202_[17] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[19] murax.system_cpu._zz_202_[18] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_202_[19] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[20] murax.system_cpu._zz_203_[0] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[21] murax.system_cpu._zz_203_[1] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[22] murax.system_cpu._zz_203_[2] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[23] murax.system_cpu._zz_203_[3] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[24] murax.system_cpu._zz_203_[4] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[25] murax.system_cpu._zz_203_[5] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[26] murax.system_cpu._zz_203_[6] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[27] murax.system_cpu._zz_203_[7] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[28] murax.system_cpu._zz_203_[8] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[29] murax.system_cpu._zz_203_[9] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[30] murax.system_cpu._zz_203_[10] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_203_[11] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[8] murax.system_cpu._zz_204_[0] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[9] murax.system_cpu._zz_204_[1] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[10] murax.system_cpu._zz_204_[2] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[11] murax.system_cpu._zz_204_[3] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[25] murax.system_cpu._zz_204_[4] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[26] murax.system_cpu._zz_204_[5] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[27] murax.system_cpu._zz_204_[6] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[28] murax.system_cpu._zz_204_[7] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[29] murax.system_cpu._zz_204_[8] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[30] murax.system_cpu._zz_204_[9] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[7] murax.system_cpu._zz_204_[10] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu._zz_204_[11] 1 1 .names murax.system_cpu._zz_206_ murax.system_cpu._zz_207_ 1 1 .names murax.system_cpu._zz_205_ murax.system_cpu._zz_209_ 1 1 .names murax.system_cpu.decode_DO_EBREAK murax.system_cpu._zz_20_ 1 1 .names murax.system_cpu._zz_206_ murax.system_cpu._zz_210_ 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_218_ 1 1 .names $false murax.system_cpu._zz_21_[0] 1 1 .names $undef murax.system_cpu._zz_21_[1] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[2] murax.system_cpu._zz_21_[2] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[3] murax.system_cpu._zz_21_[3] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[4] murax.system_cpu._zz_21_[4] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[5] murax.system_cpu._zz_21_[5] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[6] murax.system_cpu._zz_21_[6] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[7] murax.system_cpu._zz_21_[7] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[8] murax.system_cpu._zz_21_[8] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[9] murax.system_cpu._zz_21_[9] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[10] murax.system_cpu._zz_21_[10] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[11] murax.system_cpu._zz_21_[11] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[12] murax.system_cpu._zz_21_[12] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[13] murax.system_cpu._zz_21_[13] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[14] murax.system_cpu._zz_21_[14] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[15] murax.system_cpu._zz_21_[15] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[16] murax.system_cpu._zz_21_[16] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[17] murax.system_cpu._zz_21_[17] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[18] murax.system_cpu._zz_21_[18] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[19] murax.system_cpu._zz_21_[19] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[20] murax.system_cpu._zz_21_[20] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[21] murax.system_cpu._zz_21_[21] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[22] murax.system_cpu._zz_21_[22] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[23] murax.system_cpu._zz_21_[23] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[24] murax.system_cpu._zz_21_[24] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[25] murax.system_cpu._zz_21_[25] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[26] murax.system_cpu._zz_21_[26] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[27] murax.system_cpu._zz_21_[27] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[28] murax.system_cpu._zz_21_[28] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[29] murax.system_cpu._zz_21_[29] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[30] murax.system_cpu._zz_21_[30] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[31] murax.system_cpu._zz_21_[31] 1 1 .names murax.system_cpu.decode_SRC_USE_SUB_LESS murax.system_cpu._zz_222_ 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_224_[0] 1 1 .names $undef murax.system_cpu._zz_224_[1] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_224_[2] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_224_[3] 1 1 .names murax.system_cpu._zz_111_[4] murax.system_cpu._zz_224_[4] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu._zz_224_[5] 1 1 .names murax.system_cpu._zz_111_[6] murax.system_cpu._zz_224_[6] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_224_[7] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_224_[8] 1 1 .names murax.system_cpu._zz_53_ murax.system_cpu._zz_224_[9] 1 1 .names murax.system_cpu.decode_SRC_LESS_UNSIGNED murax.system_cpu._zz_224_[10] 1 1 .names murax.system_cpu._zz_111_[11] murax.system_cpu._zz_224_[11] 1 1 .names murax.system_cpu._zz_111_[12] murax.system_cpu._zz_224_[12] 1 1 .names murax.system_cpu.decode_MEMORY_ENABLE murax.system_cpu._zz_224_[13] 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_224_[14] 1 1 .names murax.system_cpu._zz_237_ murax.system_cpu._zz_224_[15] 1 1 .names murax.system_cpu.decode_IS_CSR murax.system_cpu._zz_224_[16] 1 1 .names murax.system_cpu._zz_111_[17] murax.system_cpu._zz_224_[17] 1 1 .names $false murax.system_cpu._zz_225_[0] 1 1 .names $false murax.system_cpu._zz_225_[1] 1 1 .names $false murax.system_cpu._zz_225_[2] 1 1 .names $false murax.system_cpu._zz_225_[3] 1 1 .names $false murax.system_cpu._zz_225_[4] 1 1 .names $false murax.system_cpu._zz_225_[5] 1 1 .names $false murax.system_cpu._zz_225_[6] 1 1 .names $false murax.system_cpu._zz_225_[7] 1 1 .names $false murax.system_cpu._zz_225_[8] 1 1 .names $false murax.system_cpu._zz_225_[9] 1 1 .names $false murax.system_cpu._zz_225_[10] 1 1 .names $false murax.system_cpu._zz_225_[11] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu._zz_225_[12] 1 1 .names murax.system_cpu._zz_99_[13] murax.system_cpu._zz_225_[13] 1 1 .names $false murax.system_cpu._zz_225_[14] 1 1 .names $false murax.system_cpu._zz_225_[15] 1 1 .names $false murax.system_cpu._zz_225_[16] 1 1 .names $false murax.system_cpu._zz_225_[17] 1 1 .names $false murax.system_cpu._zz_225_[18] 1 1 .names $false murax.system_cpu._zz_225_[19] 1 1 .names $false murax.system_cpu._zz_225_[20] 1 1 .names $false murax.system_cpu._zz_225_[21] 1 1 .names $false murax.system_cpu._zz_225_[22] 1 1 .names $false murax.system_cpu._zz_225_[23] 1 1 .names $false murax.system_cpu._zz_225_[24] 1 1 .names $false murax.system_cpu._zz_225_[25] 1 1 .names $false murax.system_cpu._zz_225_[26] 1 1 .names $false murax.system_cpu._zz_225_[27] 1 1 .names $false murax.system_cpu._zz_225_[28] 1 1 .names $false murax.system_cpu._zz_225_[29] 1 1 .names $false murax.system_cpu._zz_225_[30] 1 1 .names $false murax.system_cpu._zz_225_[31] 1 1 .names $false murax.system_cpu._zz_227_[0] 1 1 .names $false murax.system_cpu._zz_227_[1] 1 1 .names $false murax.system_cpu._zz_227_[2] 1 1 .names $false murax.system_cpu._zz_227_[3] 1 1 .names $false murax.system_cpu._zz_227_[4] 1 1 .names $false murax.system_cpu._zz_227_[5] 1 1 .names $false murax.system_cpu._zz_227_[6] 1 1 .names $false murax.system_cpu._zz_227_[7] 1 1 .names $false murax.system_cpu._zz_227_[8] 1 1 .names $false murax.system_cpu._zz_227_[9] 1 1 .names $false murax.system_cpu._zz_227_[10] 1 1 .names $false murax.system_cpu._zz_227_[11] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu._zz_227_[12] 1 1 .names murax.system_cpu._zz_99_[13] murax.system_cpu._zz_227_[13] 1 1 .names $false murax.system_cpu._zz_227_[14] 1 1 .names $false murax.system_cpu._zz_227_[15] 1 1 .names $false murax.system_cpu._zz_227_[16] 1 1 .names $false murax.system_cpu._zz_227_[17] 1 1 .names $false murax.system_cpu._zz_227_[18] 1 1 .names $false murax.system_cpu._zz_227_[19] 1 1 .names $false murax.system_cpu._zz_227_[20] 1 1 .names $false murax.system_cpu._zz_227_[21] 1 1 .names $false murax.system_cpu._zz_227_[22] 1 1 .names $false murax.system_cpu._zz_227_[23] 1 1 .names $false murax.system_cpu._zz_227_[24] 1 1 .names $false murax.system_cpu._zz_227_[25] 1 1 .names $false murax.system_cpu._zz_227_[26] 1 1 .names $false murax.system_cpu._zz_227_[27] 1 1 .names $false murax.system_cpu._zz_227_[28] 1 1 .names $false murax.system_cpu._zz_227_[29] 1 1 .names $false murax.system_cpu._zz_227_[30] 1 1 .names $false murax.system_cpu._zz_227_[31] 1 1 .names murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] murax.system_cpu._zz_22_[0] 1 1 .names murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] murax.system_cpu._zz_22_[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_232_ 1 1 .names murax.system_cpu._zz_115_ murax.system_cpu._zz_234_[0] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_234_[1] 1 1 .names murax.system_cpu.decode_IS_CSR murax.system_cpu._zz_236_ 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_238_[0] 1 1 .names $undef murax.system_cpu._zz_238_[1] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_238_[2] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_238_[3] 1 1 .names murax.system_cpu._zz_111_[4] murax.system_cpu._zz_238_[4] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu._zz_238_[5] 1 1 .names murax.system_cpu._zz_111_[6] murax.system_cpu._zz_238_[6] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_238_[7] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_238_[8] 1 1 .names murax.system_cpu._zz_53_ murax.system_cpu._zz_238_[9] 1 1 .names murax.system_cpu.decode_SRC_LESS_UNSIGNED murax.system_cpu._zz_238_[10] 1 1 .names murax.system_cpu._zz_111_[11] murax.system_cpu._zz_238_[11] 1 1 .names murax.system_cpu._zz_111_[12] murax.system_cpu._zz_238_[12] 1 1 .names murax.system_cpu.decode_MEMORY_ENABLE murax.system_cpu._zz_238_[13] 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_238_[14] 1 1 .names murax.system_cpu.execute_BRANCH_DO murax.system_cpu._zz_23_ 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_246_ 1 1 .names murax.system_cpu.decode_MEMORY_ENABLE murax.system_cpu._zz_248_ 1 1 .names murax.system_cpu._zz_111_[12] murax.system_cpu._zz_249_ 1 1 .names murax.system_cpu.decode_to_execute_SHIFT_CTRL[0] murax.system_cpu._zz_24_[0] 1 1 .names murax.system_cpu.decode_to_execute_SHIFT_CTRL[1] murax.system_cpu._zz_24_[1] 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_250_[0] 1 1 .names $undef murax.system_cpu._zz_250_[1] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_250_[2] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_250_[3] 1 1 .names murax.system_cpu._zz_111_[4] murax.system_cpu._zz_250_[4] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu._zz_250_[5] 1 1 .names murax.system_cpu._zz_111_[6] murax.system_cpu._zz_250_[6] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_250_[7] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_250_[8] 1 1 .names murax.system_cpu._zz_53_ murax.system_cpu._zz_250_[9] 1 1 .names murax.system_cpu.decode_SRC_LESS_UNSIGNED murax.system_cpu._zz_250_[10] 1 1 .names murax.system_cpu._zz_111_[11] murax.system_cpu._zz_250_[11] 1 1 .names $false murax.system_cpu._zz_252_[0] 1 1 .names $false murax.system_cpu._zz_252_[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_252_[2] 1 1 .names $false murax.system_cpu._zz_252_[3] 1 1 .names $false murax.system_cpu._zz_252_[4] 1 1 .names murax.system_cpu._zz_99_[5] murax.system_cpu._zz_252_[5] 1 1 .names murax.system_cpu._zz_99_[6] murax.system_cpu._zz_252_[6] 1 1 .names $false murax.system_cpu._zz_252_[7] 1 1 .names $false murax.system_cpu._zz_252_[8] 1 1 .names $false murax.system_cpu._zz_252_[9] 1 1 .names $false murax.system_cpu._zz_252_[10] 1 1 .names $false murax.system_cpu._zz_252_[11] 1 1 .names $false murax.system_cpu._zz_252_[12] 1 1 .names $false murax.system_cpu._zz_252_[13] 1 1 .names $false murax.system_cpu._zz_252_[14] 1 1 .names $false murax.system_cpu._zz_252_[15] 1 1 .names $false murax.system_cpu._zz_252_[16] 1 1 .names $false murax.system_cpu._zz_252_[17] 1 1 .names $false murax.system_cpu._zz_252_[18] 1 1 .names $false murax.system_cpu._zz_252_[19] 1 1 .names $false murax.system_cpu._zz_252_[20] 1 1 .names $false murax.system_cpu._zz_252_[21] 1 1 .names $false murax.system_cpu._zz_252_[22] 1 1 .names $false murax.system_cpu._zz_252_[23] 1 1 .names $false murax.system_cpu._zz_252_[24] 1 1 .names $false murax.system_cpu._zz_252_[25] 1 1 .names $false murax.system_cpu._zz_252_[26] 1 1 .names $false murax.system_cpu._zz_252_[27] 1 1 .names $false murax.system_cpu._zz_252_[28] 1 1 .names $false murax.system_cpu._zz_252_[29] 1 1 .names $false murax.system_cpu._zz_252_[30] 1 1 .names $false murax.system_cpu._zz_252_[31] 1 1 .names $false murax.system_cpu._zz_254_[0] 1 1 .names $false murax.system_cpu._zz_254_[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_254_[2] 1 1 .names $false murax.system_cpu._zz_254_[3] 1 1 .names $false murax.system_cpu._zz_254_[4] 1 1 .names $false murax.system_cpu._zz_254_[5] 1 1 .names $false murax.system_cpu._zz_254_[6] 1 1 .names $false murax.system_cpu._zz_254_[7] 1 1 .names $false murax.system_cpu._zz_254_[8] 1 1 .names $false murax.system_cpu._zz_254_[9] 1 1 .names $false murax.system_cpu._zz_254_[10] 1 1 .names $false murax.system_cpu._zz_254_[11] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu._zz_254_[12] 1 1 .names murax.system_cpu._zz_99_[13] murax.system_cpu._zz_254_[13] 1 1 .names $false murax.system_cpu._zz_254_[14] 1 1 .names $false murax.system_cpu._zz_254_[15] 1 1 .names $false murax.system_cpu._zz_254_[16] 1 1 .names $false murax.system_cpu._zz_254_[17] 1 1 .names $false murax.system_cpu._zz_254_[18] 1 1 .names $false murax.system_cpu._zz_254_[19] 1 1 .names $false murax.system_cpu._zz_254_[20] 1 1 .names $false murax.system_cpu._zz_254_[21] 1 1 .names $false murax.system_cpu._zz_254_[22] 1 1 .names $false murax.system_cpu._zz_254_[23] 1 1 .names $false murax.system_cpu._zz_254_[24] 1 1 .names $false murax.system_cpu._zz_254_[25] 1 1 .names $false murax.system_cpu._zz_254_[26] 1 1 .names $false murax.system_cpu._zz_254_[27] 1 1 .names $false murax.system_cpu._zz_254_[28] 1 1 .names $false murax.system_cpu._zz_254_[29] 1 1 .names $false murax.system_cpu._zz_254_[30] 1 1 .names $false murax.system_cpu._zz_254_[31] 1 1 .names $false murax.system_cpu._zz_256_[0] 1 1 .names $false murax.system_cpu._zz_256_[1] 1 1 .names $false murax.system_cpu._zz_256_[2] 1 1 .names $false murax.system_cpu._zz_256_[3] 1 1 .names murax.system_cpu._zz_99_[4] murax.system_cpu._zz_256_[4] 1 1 .names $false murax.system_cpu._zz_256_[5] 1 1 .names murax.system_cpu._zz_99_[6] murax.system_cpu._zz_256_[6] 1 1 .names $false murax.system_cpu._zz_256_[7] 1 1 .names $false murax.system_cpu._zz_256_[8] 1 1 .names $false murax.system_cpu._zz_256_[9] 1 1 .names $false murax.system_cpu._zz_256_[10] 1 1 .names $false murax.system_cpu._zz_256_[11] 1 1 .names $false murax.system_cpu._zz_256_[12] 1 1 .names $false murax.system_cpu._zz_256_[13] 1 1 .names $false murax.system_cpu._zz_256_[14] 1 1 .names $false murax.system_cpu._zz_256_[15] 1 1 .names $false murax.system_cpu._zz_256_[16] 1 1 .names $false murax.system_cpu._zz_256_[17] 1 1 .names $false murax.system_cpu._zz_256_[18] 1 1 .names $false murax.system_cpu._zz_256_[19] 1 1 .names $false murax.system_cpu._zz_256_[20] 1 1 .names $false murax.system_cpu._zz_256_[21] 1 1 .names $false murax.system_cpu._zz_256_[22] 1 1 .names $false murax.system_cpu._zz_256_[23] 1 1 .names $false murax.system_cpu._zz_256_[24] 1 1 .names $false murax.system_cpu._zz_256_[25] 1 1 .names $false murax.system_cpu._zz_256_[26] 1 1 .names $false murax.system_cpu._zz_256_[27] 1 1 .names $false murax.system_cpu._zz_256_[28] 1 1 .names $false murax.system_cpu._zz_256_[29] 1 1 .names $false murax.system_cpu._zz_256_[30] 1 1 .names $false murax.system_cpu._zz_256_[31] 1 1 .names murax.system_cpu._zz_111_[12] murax.system_cpu._zz_258_ 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_259_[1] 1 1 .names murax.system_cpu.decode_SRC_LESS_UNSIGNED murax.system_cpu._zz_261_ 1 1 .names murax.system_cpu._zz_53_ murax.system_cpu._zz_262_ 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_263_[0] 1 1 .names $undef murax.system_cpu._zz_263_[1] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_263_[2] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_263_[3] 1 1 .names murax.system_cpu._zz_111_[4] murax.system_cpu._zz_263_[4] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu._zz_263_[5] 1 1 .names murax.system_cpu._zz_111_[6] murax.system_cpu._zz_263_[6] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_263_[7] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_263_[8] 1 1 .names $false murax.system_cpu._zz_264_[0] 1 1 .names $false murax.system_cpu._zz_264_[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_264_[2] 1 1 .names $false murax.system_cpu._zz_264_[3] 1 1 .names $false murax.system_cpu._zz_264_[4] 1 1 .names $false murax.system_cpu._zz_264_[5] 1 1 .names murax.system_cpu._zz_99_[6] murax.system_cpu._zz_264_[6] 1 1 .names $false murax.system_cpu._zz_264_[7] 1 1 .names $false murax.system_cpu._zz_264_[8] 1 1 .names $false murax.system_cpu._zz_264_[9] 1 1 .names $false murax.system_cpu._zz_264_[10] 1 1 .names $false murax.system_cpu._zz_264_[11] 1 1 .names $false murax.system_cpu._zz_264_[12] 1 1 .names $false murax.system_cpu._zz_264_[13] 1 1 .names $false murax.system_cpu._zz_264_[14] 1 1 .names $false murax.system_cpu._zz_264_[15] 1 1 .names $false murax.system_cpu._zz_264_[16] 1 1 .names $false murax.system_cpu._zz_264_[17] 1 1 .names $false murax.system_cpu._zz_264_[18] 1 1 .names $false murax.system_cpu._zz_264_[19] 1 1 .names $false murax.system_cpu._zz_264_[20] 1 1 .names $false murax.system_cpu._zz_264_[21] 1 1 .names $false murax.system_cpu._zz_264_[22] 1 1 .names $false murax.system_cpu._zz_264_[23] 1 1 .names $false murax.system_cpu._zz_264_[24] 1 1 .names $false murax.system_cpu._zz_264_[25] 1 1 .names $false murax.system_cpu._zz_264_[26] 1 1 .names $false murax.system_cpu._zz_264_[27] 1 1 .names $false murax.system_cpu._zz_264_[28] 1 1 .names $false murax.system_cpu._zz_264_[29] 1 1 .names $false murax.system_cpu._zz_264_[30] 1 1 .names $false murax.system_cpu._zz_264_[31] 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_267_ 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu._zz_26_[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu._zz_26_[1] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[2] murax.system_cpu._zz_26_[2] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[3] murax.system_cpu._zz_26_[3] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[4] murax.system_cpu._zz_26_[4] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[5] murax.system_cpu._zz_26_[5] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[6] murax.system_cpu._zz_26_[6] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[7] murax.system_cpu._zz_26_[7] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[8] murax.system_cpu._zz_26_[8] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[9] murax.system_cpu._zz_26_[9] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[10] murax.system_cpu._zz_26_[10] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[11] murax.system_cpu._zz_26_[11] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[12] murax.system_cpu._zz_26_[12] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[13] murax.system_cpu._zz_26_[13] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[14] murax.system_cpu._zz_26_[14] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[15] murax.system_cpu._zz_26_[15] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[16] murax.system_cpu._zz_26_[16] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[17] murax.system_cpu._zz_26_[17] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[18] murax.system_cpu._zz_26_[18] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[19] murax.system_cpu._zz_26_[19] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[20] murax.system_cpu._zz_26_[20] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[21] murax.system_cpu._zz_26_[21] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[22] murax.system_cpu._zz_26_[22] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[23] murax.system_cpu._zz_26_[23] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[24] murax.system_cpu._zz_26_[24] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[25] murax.system_cpu._zz_26_[25] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[26] murax.system_cpu._zz_26_[26] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[27] murax.system_cpu._zz_26_[27] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[28] murax.system_cpu._zz_26_[28] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[29] murax.system_cpu._zz_26_[29] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[30] murax.system_cpu._zz_26_[30] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[31] murax.system_cpu._zz_26_[31] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_271_ 1 1 .names murax.system_cpu._zz_111_[20] murax.system_cpu._zz_272_[0] 1 1 .names murax.system_cpu._zz_115_ murax.system_cpu._zz_272_[3] 1 1 .names murax.system_cpu._zz_111_[6] murax.system_cpu._zz_276_ 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_277_[0] 1 1 .names $undef murax.system_cpu._zz_277_[1] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_277_[2] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_277_[3] 1 1 .names murax.system_cpu._zz_111_[4] murax.system_cpu._zz_277_[4] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu._zz_277_[5] 1 1 .names $false murax.system_cpu._zz_279_[0] 1 1 .names $false murax.system_cpu._zz_279_[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_279_[2] 1 1 .names $false murax.system_cpu._zz_279_[3] 1 1 .names $false murax.system_cpu._zz_279_[4] 1 1 .names $false murax.system_cpu._zz_279_[5] 1 1 .names $false murax.system_cpu._zz_279_[6] 1 1 .names $false murax.system_cpu._zz_279_[7] 1 1 .names $false murax.system_cpu._zz_279_[8] 1 1 .names $false murax.system_cpu._zz_279_[9] 1 1 .names $false murax.system_cpu._zz_279_[10] 1 1 .names $false murax.system_cpu._zz_279_[11] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu._zz_279_[12] 1 1 .names $false murax.system_cpu._zz_279_[13] 1 1 .names murax.system_cpu._zz_99_[14] murax.system_cpu._zz_279_[14] 1 1 .names $false murax.system_cpu._zz_279_[15] 1 1 .names $false murax.system_cpu._zz_279_[16] 1 1 .names $false murax.system_cpu._zz_279_[17] 1 1 .names $false murax.system_cpu._zz_279_[18] 1 1 .names $false murax.system_cpu._zz_279_[19] 1 1 .names $false murax.system_cpu._zz_279_[20] 1 1 .names $false murax.system_cpu._zz_279_[21] 1 1 .names $false murax.system_cpu._zz_279_[22] 1 1 .names $false murax.system_cpu._zz_279_[23] 1 1 .names $false murax.system_cpu._zz_279_[24] 1 1 .names $false murax.system_cpu._zz_279_[25] 1 1 .names $false murax.system_cpu._zz_279_[26] 1 1 .names $false murax.system_cpu._zz_279_[27] 1 1 .names $false murax.system_cpu._zz_279_[28] 1 1 .names $false murax.system_cpu._zz_279_[29] 1 1 .names $false murax.system_cpu._zz_279_[30] 1 1 .names $false murax.system_cpu._zz_279_[31] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu._zz_27_[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu._zz_27_[1] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[2] murax.system_cpu._zz_27_[2] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[3] murax.system_cpu._zz_27_[3] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[4] murax.system_cpu._zz_27_[4] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[5] murax.system_cpu._zz_27_[5] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[6] murax.system_cpu._zz_27_[6] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[7] murax.system_cpu._zz_27_[7] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[8] murax.system_cpu._zz_27_[8] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[9] murax.system_cpu._zz_27_[9] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[10] murax.system_cpu._zz_27_[10] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[11] murax.system_cpu._zz_27_[11] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[12] murax.system_cpu._zz_27_[12] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[13] murax.system_cpu._zz_27_[13] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[14] murax.system_cpu._zz_27_[14] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[15] murax.system_cpu._zz_27_[15] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[16] murax.system_cpu._zz_27_[16] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[17] murax.system_cpu._zz_27_[17] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[18] murax.system_cpu._zz_27_[18] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[19] murax.system_cpu._zz_27_[19] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[20] murax.system_cpu._zz_27_[20] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[21] murax.system_cpu._zz_27_[21] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[22] murax.system_cpu._zz_27_[22] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[23] murax.system_cpu._zz_27_[23] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[24] murax.system_cpu._zz_27_[24] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[25] murax.system_cpu._zz_27_[25] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[26] murax.system_cpu._zz_27_[26] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[27] murax.system_cpu._zz_27_[27] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[28] murax.system_cpu._zz_27_[28] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[29] murax.system_cpu._zz_27_[29] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[30] murax.system_cpu._zz_27_[30] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[31] murax.system_cpu._zz_27_[31] 1 1 .names murax.system_cpu._zz_111_[20] murax.system_cpu._zz_284_[0] 1 1 .names murax.system_cpu._zz_272_[1] murax.system_cpu._zz_284_[1] 1 1 .names $false murax.system_cpu._zz_285_[0] 1 1 .names $false murax.system_cpu._zz_285_[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_285_[2] 1 1 .names $false murax.system_cpu._zz_285_[3] 1 1 .names murax.system_cpu._zz_99_[4] murax.system_cpu._zz_285_[4] 1 1 .names $false murax.system_cpu._zz_285_[5] 1 1 .names murax.system_cpu._zz_99_[6] murax.system_cpu._zz_285_[6] 1 1 .names $false murax.system_cpu._zz_285_[7] 1 1 .names $false murax.system_cpu._zz_285_[8] 1 1 .names $false murax.system_cpu._zz_285_[9] 1 1 .names $false murax.system_cpu._zz_285_[10] 1 1 .names $false murax.system_cpu._zz_285_[11] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu._zz_285_[12] 1 1 .names murax.system_cpu._zz_99_[13] murax.system_cpu._zz_285_[13] 1 1 .names murax.system_cpu._zz_99_[14] murax.system_cpu._zz_285_[14] 1 1 .names $false murax.system_cpu._zz_285_[15] 1 1 .names $false murax.system_cpu._zz_285_[16] 1 1 .names $false murax.system_cpu._zz_285_[17] 1 1 .names $false murax.system_cpu._zz_285_[18] 1 1 .names $false murax.system_cpu._zz_285_[19] 1 1 .names $false murax.system_cpu._zz_285_[20] 1 1 .names $false murax.system_cpu._zz_285_[21] 1 1 .names $false murax.system_cpu._zz_285_[22] 1 1 .names $false murax.system_cpu._zz_285_[23] 1 1 .names $false murax.system_cpu._zz_285_[24] 1 1 .names $false murax.system_cpu._zz_285_[25] 1 1 .names $false murax.system_cpu._zz_285_[26] 1 1 .names $false murax.system_cpu._zz_285_[27] 1 1 .names $false murax.system_cpu._zz_285_[28] 1 1 .names $false murax.system_cpu._zz_285_[29] 1 1 .names $false murax.system_cpu._zz_285_[30] 1 1 .names $false murax.system_cpu._zz_285_[31] 1 1 .names murax.system_cpu._zz_113_ murax.system_cpu._zz_289_[0] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_289_[1] 1 1 .names murax.system_cpu._zz_97_[0] murax.system_cpu._zz_28_[0] 1 1 .names murax.system_cpu._zz_97_[1] murax.system_cpu._zz_28_[1] 1 1 .names murax.system_cpu._zz_97_[2] murax.system_cpu._zz_28_[2] 1 1 .names murax.system_cpu._zz_97_[3] murax.system_cpu._zz_28_[3] 1 1 .names murax.system_cpu._zz_97_[4] murax.system_cpu._zz_28_[4] 1 1 .names murax.system_cpu._zz_97_[5] murax.system_cpu._zz_28_[5] 1 1 .names murax.system_cpu._zz_97_[6] murax.system_cpu._zz_28_[6] 1 1 .names murax.system_cpu._zz_97_[7] murax.system_cpu._zz_28_[7] 1 1 .names murax.system_cpu._zz_97_[8] murax.system_cpu._zz_28_[8] 1 1 .names murax.system_cpu._zz_97_[9] murax.system_cpu._zz_28_[9] 1 1 .names murax.system_cpu._zz_97_[10] murax.system_cpu._zz_28_[10] 1 1 .names murax.system_cpu._zz_97_[11] murax.system_cpu._zz_28_[11] 1 1 .names murax.system_cpu._zz_97_[12] murax.system_cpu._zz_28_[12] 1 1 .names murax.system_cpu._zz_97_[13] murax.system_cpu._zz_28_[13] 1 1 .names murax.system_cpu._zz_97_[14] murax.system_cpu._zz_28_[14] 1 1 .names murax.system_cpu._zz_97_[15] murax.system_cpu._zz_28_[15] 1 1 .names murax.system_cpu._zz_97_[16] murax.system_cpu._zz_28_[16] 1 1 .names murax.system_cpu._zz_97_[17] murax.system_cpu._zz_28_[17] 1 1 .names murax.system_cpu._zz_97_[18] murax.system_cpu._zz_28_[18] 1 1 .names murax.system_cpu._zz_97_[19] murax.system_cpu._zz_28_[19] 1 1 .names murax.system_cpu._zz_97_[20] murax.system_cpu._zz_28_[20] 1 1 .names murax.system_cpu._zz_97_[21] murax.system_cpu._zz_28_[21] 1 1 .names murax.system_cpu._zz_97_[22] murax.system_cpu._zz_28_[22] 1 1 .names murax.system_cpu._zz_97_[23] murax.system_cpu._zz_28_[23] 1 1 .names murax.system_cpu._zz_97_[24] murax.system_cpu._zz_28_[24] 1 1 .names murax.system_cpu._zz_97_[25] murax.system_cpu._zz_28_[25] 1 1 .names murax.system_cpu._zz_97_[26] murax.system_cpu._zz_28_[26] 1 1 .names murax.system_cpu._zz_97_[27] murax.system_cpu._zz_28_[27] 1 1 .names murax.system_cpu._zz_97_[28] murax.system_cpu._zz_28_[28] 1 1 .names murax.system_cpu._zz_97_[29] murax.system_cpu._zz_28_[29] 1 1 .names murax.system_cpu._zz_97_[30] murax.system_cpu._zz_28_[30] 1 1 .names murax.system_cpu._zz_97_[31] murax.system_cpu._zz_28_[31] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu._zz_291_ 1 1 .names murax.system_cpu._zz_111_[4] murax.system_cpu._zz_292_ 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_293_[0] 1 1 .names $undef murax.system_cpu._zz_293_[1] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_293_[2] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_293_[3] 1 1 .names $false murax.system_cpu._zz_295_[0] 1 1 .names $false murax.system_cpu._zz_295_[1] 1 1 .names $false murax.system_cpu._zz_295_[2] 1 1 .names $false murax.system_cpu._zz_295_[3] 1 1 .names murax.system_cpu._zz_99_[4] murax.system_cpu._zz_295_[4] 1 1 .names $false murax.system_cpu._zz_295_[5] 1 1 .names $false murax.system_cpu._zz_295_[6] 1 1 .names $false murax.system_cpu._zz_295_[7] 1 1 .names $false murax.system_cpu._zz_295_[8] 1 1 .names $false murax.system_cpu._zz_295_[9] 1 1 .names $false murax.system_cpu._zz_295_[10] 1 1 .names $false murax.system_cpu._zz_295_[11] 1 1 .names $false murax.system_cpu._zz_295_[12] 1 1 .names murax.system_cpu._zz_99_[13] murax.system_cpu._zz_295_[13] 1 1 .names $false murax.system_cpu._zz_295_[14] 1 1 .names $false murax.system_cpu._zz_295_[15] 1 1 .names $false murax.system_cpu._zz_295_[16] 1 1 .names $false murax.system_cpu._zz_295_[17] 1 1 .names $false murax.system_cpu._zz_295_[18] 1 1 .names $false murax.system_cpu._zz_295_[19] 1 1 .names $false murax.system_cpu._zz_295_[20] 1 1 .names $false murax.system_cpu._zz_295_[21] 1 1 .names $false murax.system_cpu._zz_295_[22] 1 1 .names $false murax.system_cpu._zz_295_[23] 1 1 .names $false murax.system_cpu._zz_295_[24] 1 1 .names $false murax.system_cpu._zz_295_[25] 1 1 .names $false murax.system_cpu._zz_295_[26] 1 1 .names $false murax.system_cpu._zz_295_[27] 1 1 .names $false murax.system_cpu._zz_295_[28] 1 1 .names $false murax.system_cpu._zz_295_[29] 1 1 .names $false murax.system_cpu._zz_295_[30] 1 1 .names $false murax.system_cpu._zz_295_[31] 1 1 .names murax.system_cpu._zz_153_[0] murax.system_cpu._zz_29_[0] 1 1 .names murax.system_cpu._zz_153_[1] murax.system_cpu._zz_29_[1] 1 1 .names murax.system_cpu._zz_153_[2] murax.system_cpu._zz_29_[2] 1 1 .names murax.system_cpu._zz_153_[3] murax.system_cpu._zz_29_[3] 1 1 .names murax.system_cpu._zz_153_[4] murax.system_cpu._zz_29_[4] 1 1 .names murax.system_cpu._zz_153_[5] murax.system_cpu._zz_29_[5] 1 1 .names murax.system_cpu._zz_153_[6] murax.system_cpu._zz_29_[6] 1 1 .names murax.system_cpu._zz_153_[7] murax.system_cpu._zz_29_[7] 1 1 .names murax.system_cpu._zz_153_[8] murax.system_cpu._zz_29_[8] 1 1 .names murax.system_cpu._zz_153_[9] murax.system_cpu._zz_29_[9] 1 1 .names murax.system_cpu._zz_153_[10] murax.system_cpu._zz_29_[10] 1 1 .names murax.system_cpu._zz_153_[11] murax.system_cpu._zz_29_[11] 1 1 .names murax.system_cpu._zz_153_[12] murax.system_cpu._zz_29_[12] 1 1 .names murax.system_cpu._zz_153_[13] murax.system_cpu._zz_29_[13] 1 1 .names murax.system_cpu._zz_153_[14] murax.system_cpu._zz_29_[14] 1 1 .names murax.system_cpu._zz_153_[15] murax.system_cpu._zz_29_[15] 1 1 .names murax.system_cpu._zz_153_[16] murax.system_cpu._zz_29_[16] 1 1 .names murax.system_cpu._zz_153_[17] murax.system_cpu._zz_29_[17] 1 1 .names murax.system_cpu._zz_153_[18] murax.system_cpu._zz_29_[18] 1 1 .names murax.system_cpu._zz_153_[19] murax.system_cpu._zz_29_[19] 1 1 .names murax.system_cpu._zz_153_[20] murax.system_cpu._zz_29_[20] 1 1 .names murax.system_cpu._zz_153_[21] murax.system_cpu._zz_29_[21] 1 1 .names murax.system_cpu._zz_153_[22] murax.system_cpu._zz_29_[22] 1 1 .names murax.system_cpu._zz_153_[23] murax.system_cpu._zz_29_[23] 1 1 .names murax.system_cpu._zz_153_[24] murax.system_cpu._zz_29_[24] 1 1 .names murax.system_cpu._zz_153_[25] murax.system_cpu._zz_29_[25] 1 1 .names murax.system_cpu._zz_153_[26] murax.system_cpu._zz_29_[26] 1 1 .names murax.system_cpu._zz_153_[27] murax.system_cpu._zz_29_[27] 1 1 .names murax.system_cpu._zz_153_[28] murax.system_cpu._zz_29_[28] 1 1 .names murax.system_cpu._zz_153_[29] murax.system_cpu._zz_29_[29] 1 1 .names murax.system_cpu._zz_153_[30] murax.system_cpu._zz_29_[30] 1 1 .names murax.system_cpu._zz_153_[31] murax.system_cpu._zz_29_[31] 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_2_[0] 1 1 .names murax.system_cpu._zz_237_ murax.system_cpu._zz_2_[1] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_302_ 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_306_ 1 1 .names murax.system_cpu._zz_111_[17] murax.system_cpu._zz_30_[0] 1 1 .names murax.system_cpu._zz_111_[18] murax.system_cpu._zz_30_[1] 1 1 .names murax.system_cpu.decode_SRC2[0] murax.system_cpu._zz_31_[0] 1 1 .names murax.system_cpu.decode_SRC2[1] murax.system_cpu._zz_31_[1] 1 1 .names murax.system_cpu.decode_SRC2[2] murax.system_cpu._zz_31_[2] 1 1 .names murax.system_cpu.decode_SRC2[3] murax.system_cpu._zz_31_[3] 1 1 .names murax.system_cpu.decode_SRC2[4] murax.system_cpu._zz_31_[4] 1 1 .names murax.system_cpu.decode_SRC2[5] murax.system_cpu._zz_31_[5] 1 1 .names murax.system_cpu.decode_SRC2[6] murax.system_cpu._zz_31_[6] 1 1 .names murax.system_cpu.decode_SRC2[7] murax.system_cpu._zz_31_[7] 1 1 .names murax.system_cpu.decode_SRC2[8] murax.system_cpu._zz_31_[8] 1 1 .names murax.system_cpu.decode_SRC2[9] murax.system_cpu._zz_31_[9] 1 1 .names murax.system_cpu.decode_SRC2[10] murax.system_cpu._zz_31_[10] 1 1 .names murax.system_cpu.decode_SRC2[11] murax.system_cpu._zz_31_[11] 1 1 .names murax.system_cpu.decode_SRC2[12] murax.system_cpu._zz_31_[12] 1 1 .names murax.system_cpu.decode_SRC2[13] murax.system_cpu._zz_31_[13] 1 1 .names murax.system_cpu.decode_SRC2[14] murax.system_cpu._zz_31_[14] 1 1 .names murax.system_cpu.decode_SRC2[15] murax.system_cpu._zz_31_[15] 1 1 .names murax.system_cpu.decode_SRC2[16] murax.system_cpu._zz_31_[16] 1 1 .names murax.system_cpu.decode_SRC2[17] murax.system_cpu._zz_31_[17] 1 1 .names murax.system_cpu.decode_SRC2[18] murax.system_cpu._zz_31_[18] 1 1 .names murax.system_cpu.decode_SRC2[19] murax.system_cpu._zz_31_[19] 1 1 .names murax.system_cpu.decode_SRC2[20] murax.system_cpu._zz_31_[20] 1 1 .names murax.system_cpu.decode_SRC2[21] murax.system_cpu._zz_31_[21] 1 1 .names murax.system_cpu.decode_SRC2[22] murax.system_cpu._zz_31_[22] 1 1 .names murax.system_cpu.decode_SRC2[23] murax.system_cpu._zz_31_[23] 1 1 .names murax.system_cpu.decode_SRC2[24] murax.system_cpu._zz_31_[24] 1 1 .names murax.system_cpu.decode_SRC2[25] murax.system_cpu._zz_31_[25] 1 1 .names murax.system_cpu.decode_SRC2[26] murax.system_cpu._zz_31_[26] 1 1 .names murax.system_cpu.decode_SRC2[27] murax.system_cpu._zz_31_[27] 1 1 .names murax.system_cpu.decode_SRC2[28] murax.system_cpu._zz_31_[28] 1 1 .names murax.system_cpu.decode_SRC2[29] murax.system_cpu._zz_31_[29] 1 1 .names murax.system_cpu.decode_SRC2[30] murax.system_cpu._zz_31_[30] 1 1 .names murax.system_cpu.decode_SRC2[31] murax.system_cpu._zz_31_[31] 1 1 .names murax.system_cpu._zz_152_[0] murax.system_cpu._zz_32_[0] 1 1 .names murax.system_cpu._zz_152_[1] murax.system_cpu._zz_32_[1] 1 1 .names murax.system_cpu._zz_152_[2] murax.system_cpu._zz_32_[2] 1 1 .names murax.system_cpu._zz_152_[3] murax.system_cpu._zz_32_[3] 1 1 .names murax.system_cpu._zz_152_[4] murax.system_cpu._zz_32_[4] 1 1 .names murax.system_cpu._zz_152_[5] murax.system_cpu._zz_32_[5] 1 1 .names murax.system_cpu._zz_152_[6] murax.system_cpu._zz_32_[6] 1 1 .names murax.system_cpu._zz_152_[7] murax.system_cpu._zz_32_[7] 1 1 .names murax.system_cpu._zz_152_[8] murax.system_cpu._zz_32_[8] 1 1 .names murax.system_cpu._zz_152_[9] murax.system_cpu._zz_32_[9] 1 1 .names murax.system_cpu._zz_152_[10] murax.system_cpu._zz_32_[10] 1 1 .names murax.system_cpu._zz_152_[11] murax.system_cpu._zz_32_[11] 1 1 .names murax.system_cpu._zz_152_[12] murax.system_cpu._zz_32_[12] 1 1 .names murax.system_cpu._zz_152_[13] murax.system_cpu._zz_32_[13] 1 1 .names murax.system_cpu._zz_152_[14] murax.system_cpu._zz_32_[14] 1 1 .names murax.system_cpu._zz_152_[15] murax.system_cpu._zz_32_[15] 1 1 .names murax.system_cpu._zz_152_[16] murax.system_cpu._zz_32_[16] 1 1 .names murax.system_cpu._zz_152_[17] murax.system_cpu._zz_32_[17] 1 1 .names murax.system_cpu._zz_152_[18] murax.system_cpu._zz_32_[18] 1 1 .names murax.system_cpu._zz_152_[19] murax.system_cpu._zz_32_[19] 1 1 .names murax.system_cpu._zz_152_[20] murax.system_cpu._zz_32_[20] 1 1 .names murax.system_cpu._zz_152_[21] murax.system_cpu._zz_32_[21] 1 1 .names murax.system_cpu._zz_152_[22] murax.system_cpu._zz_32_[22] 1 1 .names murax.system_cpu._zz_152_[23] murax.system_cpu._zz_32_[23] 1 1 .names murax.system_cpu._zz_152_[24] murax.system_cpu._zz_32_[24] 1 1 .names murax.system_cpu._zz_152_[25] murax.system_cpu._zz_32_[25] 1 1 .names murax.system_cpu._zz_152_[26] murax.system_cpu._zz_32_[26] 1 1 .names murax.system_cpu._zz_152_[27] murax.system_cpu._zz_32_[27] 1 1 .names murax.system_cpu._zz_152_[28] murax.system_cpu._zz_32_[28] 1 1 .names murax.system_cpu._zz_152_[29] murax.system_cpu._zz_32_[29] 1 1 .names murax.system_cpu._zz_152_[30] murax.system_cpu._zz_32_[30] 1 1 .names murax.system_cpu._zz_152_[31] murax.system_cpu._zz_32_[31] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu._zz_33_[0] 1 1 .names murax.system_cpu._zz_111_[6] murax.system_cpu._zz_33_[1] 1 1 .names murax.system_cpu.decode_SRC1[0] murax.system_cpu._zz_34_[0] 1 1 .names murax.system_cpu.decode_SRC1[1] murax.system_cpu._zz_34_[1] 1 1 .names murax.system_cpu.decode_SRC1[2] murax.system_cpu._zz_34_[2] 1 1 .names murax.system_cpu.decode_SRC1[3] murax.system_cpu._zz_34_[3] 1 1 .names murax.system_cpu.decode_SRC1[4] murax.system_cpu._zz_34_[4] 1 1 .names $undef murax.system_cpu._zz_34_[5] 1 1 .names $undef murax.system_cpu._zz_34_[6] 1 1 .names $undef murax.system_cpu._zz_34_[7] 1 1 .names $undef murax.system_cpu._zz_34_[8] 1 1 .names $undef murax.system_cpu._zz_34_[9] 1 1 .names $undef murax.system_cpu._zz_34_[10] 1 1 .names $undef murax.system_cpu._zz_34_[11] 1 1 .names $undef murax.system_cpu._zz_34_[12] 1 1 .names $undef murax.system_cpu._zz_34_[13] 1 1 .names $undef murax.system_cpu._zz_34_[14] 1 1 .names $undef murax.system_cpu._zz_34_[15] 1 1 .names $undef murax.system_cpu._zz_34_[16] 1 1 .names $undef murax.system_cpu._zz_34_[17] 1 1 .names $undef murax.system_cpu._zz_34_[18] 1 1 .names $undef murax.system_cpu._zz_34_[19] 1 1 .names $undef murax.system_cpu._zz_34_[20] 1 1 .names $undef murax.system_cpu._zz_34_[21] 1 1 .names $undef murax.system_cpu._zz_34_[22] 1 1 .names $undef murax.system_cpu._zz_34_[23] 1 1 .names $undef murax.system_cpu._zz_34_[24] 1 1 .names $undef murax.system_cpu._zz_34_[25] 1 1 .names $undef murax.system_cpu._zz_34_[26] 1 1 .names $undef murax.system_cpu._zz_34_[27] 1 1 .names $undef murax.system_cpu._zz_34_[28] 1 1 .names $undef murax.system_cpu._zz_34_[29] 1 1 .names $undef murax.system_cpu._zz_34_[30] 1 1 .names $undef murax.system_cpu._zz_34_[31] 1 1 .names murax.system_cpu.decode_to_execute_ALU_CTRL[0] murax.system_cpu._zz_35_[0] 1 1 .names murax.system_cpu.decode_to_execute_ALU_CTRL[1] murax.system_cpu._zz_35_[1] 1 1 .names murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] murax.system_cpu._zz_37_[0] 1 1 .names murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] murax.system_cpu._zz_37_[1] 1 1 .names $undef murax.system_cpu._zz_38_[0] 1 1 .names $undef murax.system_cpu._zz_38_[1] 1 1 .names $undef murax.system_cpu._zz_38_[2] 1 1 .names $undef murax.system_cpu._zz_38_[3] 1 1 .names $undef murax.system_cpu._zz_38_[4] 1 1 .names $undef murax.system_cpu._zz_38_[5] 1 1 .names $undef murax.system_cpu._zz_38_[6] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] murax.system_cpu._zz_38_[7] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] murax.system_cpu._zz_38_[8] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] murax.system_cpu._zz_38_[9] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] murax.system_cpu._zz_38_[10] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] murax.system_cpu._zz_38_[11] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[12] murax.system_cpu._zz_38_[12] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] murax.system_cpu._zz_38_[13] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[14] murax.system_cpu._zz_38_[14] 1 1 .names $undef murax.system_cpu._zz_38_[15] 1 1 .names $undef murax.system_cpu._zz_38_[16] 1 1 .names $undef murax.system_cpu._zz_38_[17] 1 1 .names $undef murax.system_cpu._zz_38_[18] 1 1 .names $undef murax.system_cpu._zz_38_[19] 1 1 .names $undef murax.system_cpu._zz_38_[20] 1 1 .names $undef murax.system_cpu._zz_38_[21] 1 1 .names $undef murax.system_cpu._zz_38_[22] 1 1 .names $undef murax.system_cpu._zz_38_[23] 1 1 .names $undef murax.system_cpu._zz_38_[24] 1 1 .names $undef murax.system_cpu._zz_38_[25] 1 1 .names $undef murax.system_cpu._zz_38_[26] 1 1 .names $undef murax.system_cpu._zz_38_[27] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[28] murax.system_cpu._zz_38_[28] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[29] murax.system_cpu._zz_38_[29] 1 1 .names $undef murax.system_cpu._zz_38_[30] 1 1 .names $undef murax.system_cpu._zz_38_[31] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_VALID murax.system_cpu._zz_39_ 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_3_[0] 1 1 .names murax.system_cpu._zz_237_ murax.system_cpu._zz_3_[1] 1 1 .names murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_valid murax.system_cpu._zz_40_ 1 1 .names murax.system_cpu._zz_153_[0] murax.system_cpu._zz_41_[0] 1 1 .names murax.system_cpu._zz_153_[1] murax.system_cpu._zz_41_[1] 1 1 .names murax.system_cpu._zz_153_[2] murax.system_cpu._zz_41_[2] 1 1 .names murax.system_cpu._zz_153_[3] murax.system_cpu._zz_41_[3] 1 1 .names murax.system_cpu._zz_153_[4] murax.system_cpu._zz_41_[4] 1 1 .names murax.system_cpu._zz_153_[5] murax.system_cpu._zz_41_[5] 1 1 .names murax.system_cpu._zz_153_[6] murax.system_cpu._zz_41_[6] 1 1 .names murax.system_cpu._zz_153_[7] murax.system_cpu._zz_41_[7] 1 1 .names murax.system_cpu._zz_153_[8] murax.system_cpu._zz_41_[8] 1 1 .names murax.system_cpu._zz_153_[9] murax.system_cpu._zz_41_[9] 1 1 .names murax.system_cpu._zz_153_[10] murax.system_cpu._zz_41_[10] 1 1 .names murax.system_cpu._zz_153_[11] murax.system_cpu._zz_41_[11] 1 1 .names murax.system_cpu._zz_153_[12] murax.system_cpu._zz_41_[12] 1 1 .names murax.system_cpu._zz_153_[13] murax.system_cpu._zz_41_[13] 1 1 .names murax.system_cpu._zz_153_[14] murax.system_cpu._zz_41_[14] 1 1 .names murax.system_cpu._zz_153_[15] murax.system_cpu._zz_41_[15] 1 1 .names murax.system_cpu._zz_153_[16] murax.system_cpu._zz_41_[16] 1 1 .names murax.system_cpu._zz_153_[17] murax.system_cpu._zz_41_[17] 1 1 .names murax.system_cpu._zz_153_[18] murax.system_cpu._zz_41_[18] 1 1 .names murax.system_cpu._zz_153_[19] murax.system_cpu._zz_41_[19] 1 1 .names murax.system_cpu._zz_153_[20] murax.system_cpu._zz_41_[20] 1 1 .names murax.system_cpu._zz_153_[21] murax.system_cpu._zz_41_[21] 1 1 .names murax.system_cpu._zz_153_[22] murax.system_cpu._zz_41_[22] 1 1 .names murax.system_cpu._zz_153_[23] murax.system_cpu._zz_41_[23] 1 1 .names murax.system_cpu._zz_153_[24] murax.system_cpu._zz_41_[24] 1 1 .names murax.system_cpu._zz_153_[25] murax.system_cpu._zz_41_[25] 1 1 .names murax.system_cpu._zz_153_[26] murax.system_cpu._zz_41_[26] 1 1 .names murax.system_cpu._zz_153_[27] murax.system_cpu._zz_41_[27] 1 1 .names murax.system_cpu._zz_153_[28] murax.system_cpu._zz_41_[28] 1 1 .names murax.system_cpu._zz_153_[29] murax.system_cpu._zz_41_[29] 1 1 .names murax.system_cpu._zz_153_[30] murax.system_cpu._zz_41_[30] 1 1 .names murax.system_cpu._zz_153_[31] murax.system_cpu._zz_41_[31] 1 1 .names murax.system_cpu._zz_152_[0] murax.system_cpu._zz_42_[0] 1 1 .names murax.system_cpu._zz_152_[1] murax.system_cpu._zz_42_[1] 1 1 .names murax.system_cpu._zz_152_[2] murax.system_cpu._zz_42_[2] 1 1 .names murax.system_cpu._zz_152_[3] murax.system_cpu._zz_42_[3] 1 1 .names murax.system_cpu._zz_152_[4] murax.system_cpu._zz_42_[4] 1 1 .names murax.system_cpu._zz_152_[5] murax.system_cpu._zz_42_[5] 1 1 .names murax.system_cpu._zz_152_[6] murax.system_cpu._zz_42_[6] 1 1 .names murax.system_cpu._zz_152_[7] murax.system_cpu._zz_42_[7] 1 1 .names murax.system_cpu._zz_152_[8] murax.system_cpu._zz_42_[8] 1 1 .names murax.system_cpu._zz_152_[9] murax.system_cpu._zz_42_[9] 1 1 .names murax.system_cpu._zz_152_[10] murax.system_cpu._zz_42_[10] 1 1 .names murax.system_cpu._zz_152_[11] murax.system_cpu._zz_42_[11] 1 1 .names murax.system_cpu._zz_152_[12] murax.system_cpu._zz_42_[12] 1 1 .names murax.system_cpu._zz_152_[13] murax.system_cpu._zz_42_[13] 1 1 .names murax.system_cpu._zz_152_[14] murax.system_cpu._zz_42_[14] 1 1 .names murax.system_cpu._zz_152_[15] murax.system_cpu._zz_42_[15] 1 1 .names murax.system_cpu._zz_152_[16] murax.system_cpu._zz_42_[16] 1 1 .names murax.system_cpu._zz_152_[17] murax.system_cpu._zz_42_[17] 1 1 .names murax.system_cpu._zz_152_[18] murax.system_cpu._zz_42_[18] 1 1 .names murax.system_cpu._zz_152_[19] murax.system_cpu._zz_42_[19] 1 1 .names murax.system_cpu._zz_152_[20] murax.system_cpu._zz_42_[20] 1 1 .names murax.system_cpu._zz_152_[21] murax.system_cpu._zz_42_[21] 1 1 .names murax.system_cpu._zz_152_[22] murax.system_cpu._zz_42_[22] 1 1 .names murax.system_cpu._zz_152_[23] murax.system_cpu._zz_42_[23] 1 1 .names murax.system_cpu._zz_152_[24] murax.system_cpu._zz_42_[24] 1 1 .names murax.system_cpu._zz_152_[25] murax.system_cpu._zz_42_[25] 1 1 .names murax.system_cpu._zz_152_[26] murax.system_cpu._zz_42_[26] 1 1 .names murax.system_cpu._zz_152_[27] murax.system_cpu._zz_42_[27] 1 1 .names murax.system_cpu._zz_152_[28] murax.system_cpu._zz_42_[28] 1 1 .names murax.system_cpu._zz_152_[29] murax.system_cpu._zz_42_[29] 1 1 .names murax.system_cpu._zz_152_[30] murax.system_cpu._zz_42_[30] 1 1 .names murax.system_cpu._zz_152_[31] murax.system_cpu._zz_42_[31] 1 1 .names murax.system_cpu._zz_15_[0] murax.system_cpu._zz_43_[0] 1 1 .names murax.system_cpu._zz_15_[1] murax.system_cpu._zz_43_[1] 1 1 .names murax.system_cpu._zz_111_[20] murax.system_cpu._zz_44_ 1 1 .names murax.system_cpu.decode_SRC_USE_SUB_LESS murax.system_cpu._zz_45_ 1 1 .names murax.system_cpu._zz_111_[17] murax.system_cpu._zz_46_[0] 1 1 .names murax.system_cpu._zz_111_[18] murax.system_cpu._zz_46_[1] 1 1 .names murax.system_cpu.decode_IS_CSR murax.system_cpu._zz_47_ 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu._zz_48_[0] 1 1 .names murax.system_cpu._zz_237_ murax.system_cpu._zz_48_[1] 1 1 .names murax.system_cpu.decode_MEMORY_ENABLE murax.system_cpu._zz_49_ 1 1 .names murax.system_cpu.execute_to_memory_ENV_CTRL murax.system_cpu._zz_4_ 1 1 .names murax.system_cpu._zz_111_[12] murax.system_cpu._zz_50_ 1 1 .names murax.system_cpu._zz_111_[11] murax.system_cpu._zz_51_ 1 1 .names murax.system_cpu.decode_SRC_LESS_UNSIGNED murax.system_cpu._zz_52_ 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu._zz_54_[0] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu._zz_54_[1] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu._zz_55_[0] 1 1 .names murax.system_cpu._zz_111_[6] murax.system_cpu._zz_55_[1] 1 1 .names murax.system_cpu._zz_111_[4] murax.system_cpu._zz_56_ 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu._zz_57_[0] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu._zz_57_[1] 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_59_ 1 1 .names murax.system_cpu.execute_to_memory_ENV_CTRL murax.system_cpu._zz_5_ 1 1 .names murax.system_cpu.execute_to_memory_ENV_CTRL murax.system_cpu._zz_61_ 1 1 .names murax.system_cpu.decode_to_execute_ENV_CTRL murax.system_cpu._zz_62_ 1 1 .names murax.system_cpu.decode_CSR_WRITE_OPCODE murax.system_cpu._zz_64_ 1 1 .names murax.system_cpu.memory_to_writeBack_ENV_CTRL murax.system_cpu._zz_65_ 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_cpu._zz_67_[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_cpu._zz_67_[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_cpu._zz_67_[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_cpu._zz_67_[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_cpu._zz_67_[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_cpu._zz_67_[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_cpu._zz_67_[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_cpu._zz_67_[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_cpu._zz_67_[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_cpu._zz_67_[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_cpu._zz_67_[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_cpu._zz_67_[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_cpu._zz_67_[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_cpu._zz_67_[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_cpu._zz_67_[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_cpu._zz_67_[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_cpu._zz_67_[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_cpu._zz_67_[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_cpu._zz_67_[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_cpu._zz_67_[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_cpu._zz_67_[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_cpu._zz_67_[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_cpu._zz_67_[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_cpu._zz_67_[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_cpu._zz_67_[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_cpu._zz_67_[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_cpu._zz_67_[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_cpu._zz_67_[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_cpu._zz_67_[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_cpu._zz_67_[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_cpu._zz_67_[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_cpu._zz_67_[31] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu._zz_68_[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu._zz_68_[1] 1 1 .names murax.system_cpu.decode_to_execute_ENV_CTRL murax.system_cpu._zz_6_ 1 1 .names $undef murax.system_cpu._zz_71_[0] 1 1 .names $undef murax.system_cpu._zz_71_[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_71_[2] 1 1 .names murax.system_cpu._zz_99_[3] murax.system_cpu._zz_71_[3] 1 1 .names murax.system_cpu._zz_99_[4] murax.system_cpu._zz_71_[4] 1 1 .names murax.system_cpu._zz_99_[5] murax.system_cpu._zz_71_[5] 1 1 .names murax.system_cpu._zz_99_[6] murax.system_cpu._zz_71_[6] 1 1 .names murax.system_cpu._zz_99_[7] murax.system_cpu._zz_71_[7] 1 1 .names murax.system_cpu._zz_99_[8] murax.system_cpu._zz_71_[8] 1 1 .names murax.system_cpu._zz_99_[9] murax.system_cpu._zz_71_[9] 1 1 .names murax.system_cpu._zz_99_[10] murax.system_cpu._zz_71_[10] 1 1 .names murax.system_cpu._zz_99_[11] murax.system_cpu._zz_71_[11] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu._zz_71_[12] 1 1 .names murax.system_cpu._zz_99_[13] murax.system_cpu._zz_71_[13] 1 1 .names murax.system_cpu._zz_99_[14] murax.system_cpu._zz_71_[14] 1 1 .names murax.system_cpu._zz_99_[15] murax.system_cpu._zz_71_[15] 1 1 .names murax.system_cpu._zz_99_[16] murax.system_cpu._zz_71_[16] 1 1 .names murax.system_cpu._zz_99_[17] murax.system_cpu._zz_71_[17] 1 1 .names murax.system_cpu._zz_99_[18] murax.system_cpu._zz_71_[18] 1 1 .names murax.system_cpu._zz_99_[19] murax.system_cpu._zz_71_[19] 1 1 .names murax.system_cpu._zz_99_[20] murax.system_cpu._zz_71_[20] 1 1 .names murax.system_cpu._zz_99_[21] murax.system_cpu._zz_71_[21] 1 1 .names murax.system_cpu._zz_99_[22] murax.system_cpu._zz_71_[22] 1 1 .names murax.system_cpu._zz_99_[23] murax.system_cpu._zz_71_[23] 1 1 .names murax.system_cpu._zz_99_[24] murax.system_cpu._zz_71_[24] 1 1 .names murax.system_cpu._zz_99_[25] murax.system_cpu._zz_71_[25] 1 1 .names murax.system_cpu._zz_99_[26] murax.system_cpu._zz_71_[26] 1 1 .names murax.system_cpu._zz_99_[27] murax.system_cpu._zz_71_[27] 1 1 .names murax.system_cpu._zz_99_[28] murax.system_cpu._zz_71_[28] 1 1 .names murax.system_cpu._zz_99_[29] murax.system_cpu._zz_71_[29] 1 1 .names murax.system_cpu._zz_99_[30] murax.system_cpu._zz_71_[30] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_71_[31] 1 1 .names murax.system_cpu._zz_97_[0] murax.system_cpu._zz_72_[0] 1 1 .names murax.system_cpu._zz_97_[1] murax.system_cpu._zz_72_[1] 1 1 .names murax.system_cpu._zz_97_[2] murax.system_cpu._zz_72_[2] 1 1 .names murax.system_cpu._zz_97_[3] murax.system_cpu._zz_72_[3] 1 1 .names murax.system_cpu._zz_97_[4] murax.system_cpu._zz_72_[4] 1 1 .names murax.system_cpu._zz_97_[5] murax.system_cpu._zz_72_[5] 1 1 .names murax.system_cpu._zz_97_[6] murax.system_cpu._zz_72_[6] 1 1 .names murax.system_cpu._zz_97_[7] murax.system_cpu._zz_72_[7] 1 1 .names murax.system_cpu._zz_97_[8] murax.system_cpu._zz_72_[8] 1 1 .names murax.system_cpu._zz_97_[9] murax.system_cpu._zz_72_[9] 1 1 .names murax.system_cpu._zz_97_[10] murax.system_cpu._zz_72_[10] 1 1 .names murax.system_cpu._zz_97_[11] murax.system_cpu._zz_72_[11] 1 1 .names murax.system_cpu._zz_97_[12] murax.system_cpu._zz_72_[12] 1 1 .names murax.system_cpu._zz_97_[13] murax.system_cpu._zz_72_[13] 1 1 .names murax.system_cpu._zz_97_[14] murax.system_cpu._zz_72_[14] 1 1 .names murax.system_cpu._zz_97_[15] murax.system_cpu._zz_72_[15] 1 1 .names murax.system_cpu._zz_97_[16] murax.system_cpu._zz_72_[16] 1 1 .names murax.system_cpu._zz_97_[17] murax.system_cpu._zz_72_[17] 1 1 .names murax.system_cpu._zz_97_[18] murax.system_cpu._zz_72_[18] 1 1 .names murax.system_cpu._zz_97_[19] murax.system_cpu._zz_72_[19] 1 1 .names murax.system_cpu._zz_97_[20] murax.system_cpu._zz_72_[20] 1 1 .names murax.system_cpu._zz_97_[21] murax.system_cpu._zz_72_[21] 1 1 .names murax.system_cpu._zz_97_[22] murax.system_cpu._zz_72_[22] 1 1 .names murax.system_cpu._zz_97_[23] murax.system_cpu._zz_72_[23] 1 1 .names murax.system_cpu._zz_97_[24] murax.system_cpu._zz_72_[24] 1 1 .names murax.system_cpu._zz_97_[25] murax.system_cpu._zz_72_[25] 1 1 .names murax.system_cpu._zz_97_[26] murax.system_cpu._zz_72_[26] 1 1 .names murax.system_cpu._zz_97_[27] murax.system_cpu._zz_72_[27] 1 1 .names murax.system_cpu._zz_97_[28] murax.system_cpu._zz_72_[28] 1 1 .names murax.system_cpu._zz_97_[29] murax.system_cpu._zz_72_[29] 1 1 .names murax.system_cpu._zz_97_[30] murax.system_cpu._zz_72_[30] 1 1 .names murax.system_cpu._zz_97_[31] murax.system_cpu._zz_72_[31] 1 1 .names $undef murax.system_cpu._zz_73_[0] 1 1 .names $undef murax.system_cpu._zz_73_[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[2] murax.system_cpu._zz_73_[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[3] murax.system_cpu._zz_73_[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[4] murax.system_cpu._zz_73_[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[5] murax.system_cpu._zz_73_[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[6] murax.system_cpu._zz_73_[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[7] murax.system_cpu._zz_73_[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[8] murax.system_cpu._zz_73_[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[9] murax.system_cpu._zz_73_[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[10] murax.system_cpu._zz_73_[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[11] murax.system_cpu._zz_73_[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[12] murax.system_cpu._zz_73_[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[13] murax.system_cpu._zz_73_[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[14] murax.system_cpu._zz_73_[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[25] murax.system_cpu._zz_73_[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[26] murax.system_cpu._zz_73_[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[27] murax.system_cpu._zz_73_[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[28] murax.system_cpu._zz_73_[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[29] murax.system_cpu._zz_73_[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[30] murax.system_cpu._zz_73_[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[31] murax.system_cpu._zz_73_[31] 1 1 .names murax.system_cpu.decode_to_execute_ENV_CTRL murax.system_cpu._zz_7_ 1 1 .names $undef murax.system_cpu._zz_81_[0] 1 1 .names $undef murax.system_cpu._zz_81_[1] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[2] murax.system_cpu._zz_81_[2] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[3] murax.system_cpu._zz_81_[3] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[4] murax.system_cpu._zz_81_[4] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[5] murax.system_cpu._zz_81_[5] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[6] murax.system_cpu._zz_81_[6] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[7] murax.system_cpu._zz_81_[7] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[8] murax.system_cpu._zz_81_[8] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[9] murax.system_cpu._zz_81_[9] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[10] murax.system_cpu._zz_81_[10] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[11] murax.system_cpu._zz_81_[11] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[12] murax.system_cpu._zz_81_[12] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[13] murax.system_cpu._zz_81_[13] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[14] murax.system_cpu._zz_81_[14] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[15] murax.system_cpu._zz_81_[15] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[16] murax.system_cpu._zz_81_[16] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[17] murax.system_cpu._zz_81_[17] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[18] murax.system_cpu._zz_81_[18] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[19] murax.system_cpu._zz_81_[19] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[20] murax.system_cpu._zz_81_[20] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[21] murax.system_cpu._zz_81_[21] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[22] murax.system_cpu._zz_81_[22] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[23] murax.system_cpu._zz_81_[23] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[24] murax.system_cpu._zz_81_[24] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[25] murax.system_cpu._zz_81_[25] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[26] murax.system_cpu._zz_81_[26] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[27] murax.system_cpu._zz_81_[27] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[28] murax.system_cpu._zz_81_[28] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[29] murax.system_cpu._zz_81_[29] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[30] murax.system_cpu._zz_81_[30] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[31] murax.system_cpu._zz_81_[31] 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu._zz_8_ 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_output_ready murax.system_cpu._zz_90_ 1 1 .names murax.system_cpu._zz_92_ murax.system_cpu._zz_91_ 1 1 .names murax.system_cpu._zz_94_ murax.system_cpu._zz_93_ 1 1 .names $undef murax.system_cpu._zz_99_[0] 1 1 .names $undef murax.system_cpu._zz_99_[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu._zz_99_[2] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu._zz_99_[12] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu._zz_99_[31] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu.dBus_cmd_payload_address[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu.dBus_cmd_payload_address[1] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[2] murax.system_cpu.dBus_cmd_payload_address[2] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[3] murax.system_cpu.dBus_cmd_payload_address[3] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[4] murax.system_cpu.dBus_cmd_payload_address[4] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[5] murax.system_cpu.dBus_cmd_payload_address[5] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[6] murax.system_cpu.dBus_cmd_payload_address[6] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[7] murax.system_cpu.dBus_cmd_payload_address[7] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[8] murax.system_cpu.dBus_cmd_payload_address[8] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[9] murax.system_cpu.dBus_cmd_payload_address[9] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[10] murax.system_cpu.dBus_cmd_payload_address[10] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[11] murax.system_cpu.dBus_cmd_payload_address[11] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[12] murax.system_cpu.dBus_cmd_payload_address[12] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[13] murax.system_cpu.dBus_cmd_payload_address[13] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[14] murax.system_cpu.dBus_cmd_payload_address[14] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[15] murax.system_cpu.dBus_cmd_payload_address[15] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[16] murax.system_cpu.dBus_cmd_payload_address[16] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[17] murax.system_cpu.dBus_cmd_payload_address[17] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[18] murax.system_cpu.dBus_cmd_payload_address[18] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[19] murax.system_cpu.dBus_cmd_payload_address[19] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[20] murax.system_cpu.dBus_cmd_payload_address[20] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[21] murax.system_cpu.dBus_cmd_payload_address[21] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[22] murax.system_cpu.dBus_cmd_payload_address[22] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[23] murax.system_cpu.dBus_cmd_payload_address[23] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[24] murax.system_cpu.dBus_cmd_payload_address[24] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[25] murax.system_cpu.dBus_cmd_payload_address[25] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[26] murax.system_cpu.dBus_cmd_payload_address[26] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[27] murax.system_cpu.dBus_cmd_payload_address[27] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[28] murax.system_cpu.dBus_cmd_payload_address[28] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[29] murax.system_cpu.dBus_cmd_payload_address[29] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[30] murax.system_cpu.dBus_cmd_payload_address[30] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[31] murax.system_cpu.dBus_cmd_payload_address[31] 1 1 .names murax.system_cpu.decode_to_execute_RS2[0] murax.system_cpu.dBus_cmd_payload_data[0] 1 1 .names murax.system_cpu.decode_to_execute_RS2[1] murax.system_cpu.dBus_cmd_payload_data[1] 1 1 .names murax.system_cpu.decode_to_execute_RS2[2] murax.system_cpu.dBus_cmd_payload_data[2] 1 1 .names murax.system_cpu.decode_to_execute_RS2[3] murax.system_cpu.dBus_cmd_payload_data[3] 1 1 .names murax.system_cpu.decode_to_execute_RS2[4] murax.system_cpu.dBus_cmd_payload_data[4] 1 1 .names murax.system_cpu.decode_to_execute_RS2[5] murax.system_cpu.dBus_cmd_payload_data[5] 1 1 .names murax.system_cpu.decode_to_execute_RS2[6] murax.system_cpu.dBus_cmd_payload_data[6] 1 1 .names murax.system_cpu.decode_to_execute_RS2[7] murax.system_cpu.dBus_cmd_payload_data[7] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[8] murax.system_cpu.dBus_cmd_payload_data[8] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[9] murax.system_cpu.dBus_cmd_payload_data[9] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[10] murax.system_cpu.dBus_cmd_payload_data[10] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[11] murax.system_cpu.dBus_cmd_payload_data[11] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[12] murax.system_cpu.dBus_cmd_payload_data[12] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[13] murax.system_cpu.dBus_cmd_payload_data[13] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[14] murax.system_cpu.dBus_cmd_payload_data[14] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[15] murax.system_cpu.dBus_cmd_payload_data[15] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[16] murax.system_cpu.dBus_cmd_payload_data[16] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[17] murax.system_cpu.dBus_cmd_payload_data[17] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[18] murax.system_cpu.dBus_cmd_payload_data[18] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[19] murax.system_cpu.dBus_cmd_payload_data[19] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[20] murax.system_cpu.dBus_cmd_payload_data[20] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[21] murax.system_cpu.dBus_cmd_payload_data[21] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[22] murax.system_cpu.dBus_cmd_payload_data[22] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[23] murax.system_cpu.dBus_cmd_payload_data[23] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[24] murax.system_cpu.dBus_cmd_payload_data[24] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[25] murax.system_cpu.dBus_cmd_payload_data[25] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[26] murax.system_cpu.dBus_cmd_payload_data[26] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[27] murax.system_cpu.dBus_cmd_payload_data[27] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[28] murax.system_cpu.dBus_cmd_payload_data[28] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[29] murax.system_cpu.dBus_cmd_payload_data[29] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[30] murax.system_cpu.dBus_cmd_payload_data[30] 1 1 .names murax.system_cpu_dBus_cmd_payload_data[31] murax.system_cpu.dBus_cmd_payload_data[31] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[12] murax.system_cpu.dBus_cmd_payload_size[0] 1 1 .names murax.system_cpu._zz_165_ murax.system_cpu.dBus_cmd_payload_size[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_ready murax.system_cpu.dBus_cmd_ready 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_cpu.dBus_rsp_data[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_cpu.dBus_rsp_data[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_cpu.dBus_rsp_data[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_cpu.dBus_rsp_data[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_cpu.dBus_rsp_data[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_cpu.dBus_rsp_data[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_cpu.dBus_rsp_data[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_cpu.dBus_rsp_data[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_cpu.dBus_rsp_data[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_cpu.dBus_rsp_data[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_cpu.dBus_rsp_data[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_cpu.dBus_rsp_data[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_cpu.dBus_rsp_data[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_cpu.dBus_rsp_data[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_cpu.dBus_rsp_data[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_cpu.dBus_rsp_data[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_cpu.dBus_rsp_data[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_cpu.dBus_rsp_data[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_cpu.dBus_rsp_data[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_cpu.dBus_rsp_data[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_cpu.dBus_rsp_data[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_cpu.dBus_rsp_data[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_cpu.dBus_rsp_data[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_cpu.dBus_rsp_data[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_cpu.dBus_rsp_data[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_cpu.dBus_rsp_data[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_cpu.dBus_rsp_data[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_cpu.dBus_rsp_data[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_cpu.dBus_rsp_data[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_cpu.dBus_rsp_data[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_cpu.dBus_rsp_data[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_cpu.dBus_rsp_data[31] 1 1 .names $undef murax.system_cpu.debug_bus_cmd_payload_address[0] 1 1 .names $undef murax.system_cpu.debug_bus_cmd_payload_address[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[2] murax.system_cpu.debug_bus_cmd_payload_address[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[3] murax.system_cpu.debug_bus_cmd_payload_address[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[4] murax.system_cpu.debug_bus_cmd_payload_address[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[5] murax.system_cpu.debug_bus_cmd_payload_address[5] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[6] murax.system_cpu.debug_bus_cmd_payload_address[6] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[7] murax.system_cpu.debug_bus_cmd_payload_address[7] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[32] murax.system_cpu.debug_bus_cmd_payload_data[0] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[33] murax.system_cpu.debug_bus_cmd_payload_data[1] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[34] murax.system_cpu.debug_bus_cmd_payload_data[2] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[35] murax.system_cpu.debug_bus_cmd_payload_data[3] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[36] murax.system_cpu.debug_bus_cmd_payload_data[4] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[37] murax.system_cpu.debug_bus_cmd_payload_data[5] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[38] murax.system_cpu.debug_bus_cmd_payload_data[6] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[39] murax.system_cpu.debug_bus_cmd_payload_data[7] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[40] murax.system_cpu.debug_bus_cmd_payload_data[8] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[41] murax.system_cpu.debug_bus_cmd_payload_data[9] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[42] murax.system_cpu.debug_bus_cmd_payload_data[10] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[43] murax.system_cpu.debug_bus_cmd_payload_data[11] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[44] murax.system_cpu.debug_bus_cmd_payload_data[12] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[45] murax.system_cpu.debug_bus_cmd_payload_data[13] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[46] murax.system_cpu.debug_bus_cmd_payload_data[14] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[47] murax.system_cpu.debug_bus_cmd_payload_data[15] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[48] murax.system_cpu.debug_bus_cmd_payload_data[16] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[49] murax.system_cpu.debug_bus_cmd_payload_data[17] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[50] murax.system_cpu.debug_bus_cmd_payload_data[18] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[51] murax.system_cpu.debug_bus_cmd_payload_data[19] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[52] murax.system_cpu.debug_bus_cmd_payload_data[20] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[53] murax.system_cpu.debug_bus_cmd_payload_data[21] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[54] murax.system_cpu.debug_bus_cmd_payload_data[22] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[55] murax.system_cpu.debug_bus_cmd_payload_data[23] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[56] murax.system_cpu.debug_bus_cmd_payload_data[24] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[57] murax.system_cpu.debug_bus_cmd_payload_data[25] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[58] murax.system_cpu.debug_bus_cmd_payload_data[26] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[59] murax.system_cpu.debug_bus_cmd_payload_data[27] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[60] murax.system_cpu.debug_bus_cmd_payload_data[28] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[61] murax.system_cpu.debug_bus_cmd_payload_data[29] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[62] murax.system_cpu.debug_bus_cmd_payload_data[30] 1 1 .names murax.systemDebugger_1_.dispatcher_dataShifter[63] murax.system_cpu.debug_bus_cmd_payload_data[31] 1 1 .names murax.systemDebugger_1_._zz_3_ murax.system_cpu.debug_bus_cmd_payload_wr 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[0] murax.system_cpu.debug_bus_rsp_data[0] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[1] murax.system_cpu.debug_bus_rsp_data[1] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[2] murax.system_cpu.debug_bus_rsp_data[2] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[3] murax.system_cpu.debug_bus_rsp_data[3] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[4] murax.system_cpu.debug_bus_rsp_data[4] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[5] murax.system_cpu.debug_bus_rsp_data[5] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[6] murax.system_cpu.debug_bus_rsp_data[6] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[7] murax.system_cpu.debug_bus_rsp_data[7] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[8] murax.system_cpu.debug_bus_rsp_data[8] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[9] murax.system_cpu.debug_bus_rsp_data[9] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[10] murax.system_cpu.debug_bus_rsp_data[10] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[11] murax.system_cpu.debug_bus_rsp_data[11] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[12] murax.system_cpu.debug_bus_rsp_data[12] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[13] murax.system_cpu.debug_bus_rsp_data[13] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[14] murax.system_cpu.debug_bus_rsp_data[14] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[15] murax.system_cpu.debug_bus_rsp_data[15] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[16] murax.system_cpu.debug_bus_rsp_data[16] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[17] murax.system_cpu.debug_bus_rsp_data[17] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[18] murax.system_cpu.debug_bus_rsp_data[18] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[19] murax.system_cpu.debug_bus_rsp_data[19] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[20] murax.system_cpu.debug_bus_rsp_data[20] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[21] murax.system_cpu.debug_bus_rsp_data[21] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[22] murax.system_cpu.debug_bus_rsp_data[22] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[23] murax.system_cpu.debug_bus_rsp_data[23] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[24] murax.system_cpu.debug_bus_rsp_data[24] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[25] murax.system_cpu.debug_bus_rsp_data[25] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[26] murax.system_cpu.debug_bus_rsp_data[26] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[27] murax.system_cpu.debug_bus_rsp_data[27] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[28] murax.system_cpu.debug_bus_rsp_data[28] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[29] murax.system_cpu.debug_bus_rsp_data[29] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[30] murax.system_cpu.debug_bus_rsp_data[30] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[31] murax.system_cpu.debug_bus_rsp_data[31] 1 1 .names murax.system_cpu.DebugPlugin_resetIt_regNext murax.system_cpu.debug_resetOut 1 1 .names murax.system_cpu._zz_15_[0] murax.system_cpu.decode_ALU_BITWISE_CTRL[0] 1 1 .names murax.system_cpu._zz_15_[1] murax.system_cpu.decode_ALU_BITWISE_CTRL[1] 1 1 .names murax.system_cpu._zz_117_ murax.system_cpu.decode_ALU_CTRL[0] 1 1 .names murax.system_cpu._zz_237_ murax.system_cpu.decode_ALU_CTRL[1] 1 1 .names murax.system_cpu._zz_304_ murax.system_cpu.decode_BRANCH_CTRL[0] 1 1 .names murax.system_cpu._zz_112_ murax.system_cpu.decode_BRANCH_CTRL[1] 1 1 .names murax.system_cpu._zz_111_[20] murax.system_cpu.decode_BYPASSABLE_EXECUTE_STAGE 1 1 .names murax.system_cpu._zz_9_ murax.system_cpu.decode_ENV_CTRL 1 1 .names $undef murax.system_cpu.decode_INSTRUCTION[0] 1 1 .names $undef murax.system_cpu.decode_INSTRUCTION[1] 1 1 .names murax.system_cpu._zz_116_ murax.system_cpu.decode_INSTRUCTION[2] 1 1 .names murax.system_cpu._zz_99_[3] murax.system_cpu.decode_INSTRUCTION[3] 1 1 .names murax.system_cpu._zz_99_[4] murax.system_cpu.decode_INSTRUCTION[4] 1 1 .names murax.system_cpu._zz_99_[5] murax.system_cpu.decode_INSTRUCTION[5] 1 1 .names murax.system_cpu._zz_99_[6] murax.system_cpu.decode_INSTRUCTION[6] 1 1 .names murax.system_cpu._zz_99_[7] murax.system_cpu.decode_INSTRUCTION[7] 1 1 .names murax.system_cpu._zz_99_[8] murax.system_cpu.decode_INSTRUCTION[8] 1 1 .names murax.system_cpu._zz_99_[9] murax.system_cpu.decode_INSTRUCTION[9] 1 1 .names murax.system_cpu._zz_99_[10] murax.system_cpu.decode_INSTRUCTION[10] 1 1 .names murax.system_cpu._zz_99_[11] murax.system_cpu.decode_INSTRUCTION[11] 1 1 .names murax.system_cpu._zz_217_ murax.system_cpu.decode_INSTRUCTION[12] 1 1 .names murax.system_cpu._zz_99_[13] murax.system_cpu.decode_INSTRUCTION[13] 1 1 .names murax.system_cpu._zz_99_[14] murax.system_cpu.decode_INSTRUCTION[14] 1 1 .names murax.system_cpu._zz_99_[15] murax.system_cpu.decode_INSTRUCTION[15] 1 1 .names murax.system_cpu._zz_99_[16] murax.system_cpu.decode_INSTRUCTION[16] 1 1 .names murax.system_cpu._zz_99_[17] murax.system_cpu.decode_INSTRUCTION[17] 1 1 .names murax.system_cpu._zz_99_[18] murax.system_cpu.decode_INSTRUCTION[18] 1 1 .names murax.system_cpu._zz_99_[19] murax.system_cpu.decode_INSTRUCTION[19] 1 1 .names murax.system_cpu._zz_99_[20] murax.system_cpu.decode_INSTRUCTION[20] 1 1 .names murax.system_cpu._zz_99_[21] murax.system_cpu.decode_INSTRUCTION[21] 1 1 .names murax.system_cpu._zz_99_[22] murax.system_cpu.decode_INSTRUCTION[22] 1 1 .names murax.system_cpu._zz_99_[23] murax.system_cpu.decode_INSTRUCTION[23] 1 1 .names murax.system_cpu._zz_99_[24] murax.system_cpu.decode_INSTRUCTION[24] 1 1 .names murax.system_cpu._zz_99_[25] murax.system_cpu.decode_INSTRUCTION[25] 1 1 .names murax.system_cpu._zz_99_[26] murax.system_cpu.decode_INSTRUCTION[26] 1 1 .names murax.system_cpu._zz_99_[27] murax.system_cpu.decode_INSTRUCTION[27] 1 1 .names murax.system_cpu._zz_99_[28] murax.system_cpu.decode_INSTRUCTION[28] 1 1 .names murax.system_cpu._zz_99_[29] murax.system_cpu.decode_INSTRUCTION[29] 1 1 .names murax.system_cpu._zz_99_[30] murax.system_cpu.decode_INSTRUCTION[30] 1 1 .names murax.system_cpu._zz_128_ murax.system_cpu.decode_INSTRUCTION[31] 1 1 .names $undef murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[0] 1 1 .names $undef murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[2] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[3] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[4] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[5] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[6] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[7] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[8] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[9] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[10] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[11] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[12] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[13] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[14] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[14] 1 1 .names murax.system_cpu._zz_73_[15] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[15] 1 1 .names murax.system_cpu._zz_73_[16] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[16] 1 1 .names murax.system_cpu._zz_73_[17] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[17] 1 1 .names murax.system_cpu._zz_73_[18] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[18] 1 1 .names murax.system_cpu._zz_73_[19] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[19] 1 1 .names murax.system_cpu._zz_73_[20] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[20] 1 1 .names murax.system_cpu._zz_73_[21] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[21] 1 1 .names murax.system_cpu._zz_73_[22] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[22] 1 1 .names murax.system_cpu._zz_73_[23] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[23] 1 1 .names murax.system_cpu._zz_73_[24] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[25] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[26] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[27] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[28] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[29] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[30] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_iBusRsp_inputBeforeStage_payload_rsp_inst[31] murax.system_cpu.decode_INSTRUCTION_ANTICIPATED[31] 1 1 .names murax.system_cpu._zz_111_[12] murax.system_cpu.decode_IS_EBREAK 1 1 .names murax.system_cpu._zz_97_[0] murax.system_cpu.decode_PC[0] 1 1 .names murax.system_cpu._zz_97_[1] murax.system_cpu.decode_PC[1] 1 1 .names murax.system_cpu._zz_97_[2] murax.system_cpu.decode_PC[2] 1 1 .names murax.system_cpu._zz_97_[3] murax.system_cpu.decode_PC[3] 1 1 .names murax.system_cpu._zz_97_[4] murax.system_cpu.decode_PC[4] 1 1 .names murax.system_cpu._zz_97_[5] murax.system_cpu.decode_PC[5] 1 1 .names murax.system_cpu._zz_97_[6] murax.system_cpu.decode_PC[6] 1 1 .names murax.system_cpu._zz_97_[7] murax.system_cpu.decode_PC[7] 1 1 .names murax.system_cpu._zz_97_[8] murax.system_cpu.decode_PC[8] 1 1 .names murax.system_cpu._zz_97_[9] murax.system_cpu.decode_PC[9] 1 1 .names murax.system_cpu._zz_97_[10] murax.system_cpu.decode_PC[10] 1 1 .names murax.system_cpu._zz_97_[11] murax.system_cpu.decode_PC[11] 1 1 .names murax.system_cpu._zz_97_[12] murax.system_cpu.decode_PC[12] 1 1 .names murax.system_cpu._zz_97_[13] murax.system_cpu.decode_PC[13] 1 1 .names murax.system_cpu._zz_97_[14] murax.system_cpu.decode_PC[14] 1 1 .names murax.system_cpu._zz_97_[15] murax.system_cpu.decode_PC[15] 1 1 .names murax.system_cpu._zz_97_[16] murax.system_cpu.decode_PC[16] 1 1 .names murax.system_cpu._zz_97_[17] murax.system_cpu.decode_PC[17] 1 1 .names murax.system_cpu._zz_97_[18] murax.system_cpu.decode_PC[18] 1 1 .names murax.system_cpu._zz_97_[19] murax.system_cpu.decode_PC[19] 1 1 .names murax.system_cpu._zz_97_[20] murax.system_cpu.decode_PC[20] 1 1 .names murax.system_cpu._zz_97_[21] murax.system_cpu.decode_PC[21] 1 1 .names murax.system_cpu._zz_97_[22] murax.system_cpu.decode_PC[22] 1 1 .names murax.system_cpu._zz_97_[23] murax.system_cpu.decode_PC[23] 1 1 .names murax.system_cpu._zz_97_[24] murax.system_cpu.decode_PC[24] 1 1 .names murax.system_cpu._zz_97_[25] murax.system_cpu.decode_PC[25] 1 1 .names murax.system_cpu._zz_97_[26] murax.system_cpu.decode_PC[26] 1 1 .names murax.system_cpu._zz_97_[27] murax.system_cpu.decode_PC[27] 1 1 .names murax.system_cpu._zz_97_[28] murax.system_cpu.decode_PC[28] 1 1 .names murax.system_cpu._zz_97_[29] murax.system_cpu.decode_PC[29] 1 1 .names murax.system_cpu._zz_97_[30] murax.system_cpu.decode_PC[30] 1 1 .names murax.system_cpu._zz_97_[31] murax.system_cpu.decode_PC[31] 1 1 .names murax.system_cpu._zz_152_[0] murax.system_cpu.decode_RS1[0] 1 1 .names murax.system_cpu._zz_152_[1] murax.system_cpu.decode_RS1[1] 1 1 .names murax.system_cpu._zz_152_[2] murax.system_cpu.decode_RS1[2] 1 1 .names murax.system_cpu._zz_152_[3] murax.system_cpu.decode_RS1[3] 1 1 .names murax.system_cpu._zz_152_[4] murax.system_cpu.decode_RS1[4] 1 1 .names murax.system_cpu._zz_152_[5] murax.system_cpu.decode_RS1[5] 1 1 .names murax.system_cpu._zz_152_[6] murax.system_cpu.decode_RS1[6] 1 1 .names murax.system_cpu._zz_152_[7] murax.system_cpu.decode_RS1[7] 1 1 .names murax.system_cpu._zz_152_[8] murax.system_cpu.decode_RS1[8] 1 1 .names murax.system_cpu._zz_152_[9] murax.system_cpu.decode_RS1[9] 1 1 .names murax.system_cpu._zz_152_[10] murax.system_cpu.decode_RS1[10] 1 1 .names murax.system_cpu._zz_152_[11] murax.system_cpu.decode_RS1[11] 1 1 .names murax.system_cpu._zz_152_[12] murax.system_cpu.decode_RS1[12] 1 1 .names murax.system_cpu._zz_152_[13] murax.system_cpu.decode_RS1[13] 1 1 .names murax.system_cpu._zz_152_[14] murax.system_cpu.decode_RS1[14] 1 1 .names murax.system_cpu._zz_152_[15] murax.system_cpu.decode_RS1[15] 1 1 .names murax.system_cpu._zz_152_[16] murax.system_cpu.decode_RS1[16] 1 1 .names murax.system_cpu._zz_152_[17] murax.system_cpu.decode_RS1[17] 1 1 .names murax.system_cpu._zz_152_[18] murax.system_cpu.decode_RS1[18] 1 1 .names murax.system_cpu._zz_152_[19] murax.system_cpu.decode_RS1[19] 1 1 .names murax.system_cpu._zz_152_[20] murax.system_cpu.decode_RS1[20] 1 1 .names murax.system_cpu._zz_152_[21] murax.system_cpu.decode_RS1[21] 1 1 .names murax.system_cpu._zz_152_[22] murax.system_cpu.decode_RS1[22] 1 1 .names murax.system_cpu._zz_152_[23] murax.system_cpu.decode_RS1[23] 1 1 .names murax.system_cpu._zz_152_[24] murax.system_cpu.decode_RS1[24] 1 1 .names murax.system_cpu._zz_152_[25] murax.system_cpu.decode_RS1[25] 1 1 .names murax.system_cpu._zz_152_[26] murax.system_cpu.decode_RS1[26] 1 1 .names murax.system_cpu._zz_152_[27] murax.system_cpu.decode_RS1[27] 1 1 .names murax.system_cpu._zz_152_[28] murax.system_cpu.decode_RS1[28] 1 1 .names murax.system_cpu._zz_152_[29] murax.system_cpu.decode_RS1[29] 1 1 .names murax.system_cpu._zz_152_[30] murax.system_cpu.decode_RS1[30] 1 1 .names murax.system_cpu._zz_152_[31] murax.system_cpu.decode_RS1[31] 1 1 .names murax.system_cpu._zz_111_[11] murax.system_cpu.decode_RS1_USE 1 1 .names murax.system_cpu._zz_153_[0] murax.system_cpu.decode_RS2[0] 1 1 .names murax.system_cpu._zz_153_[1] murax.system_cpu.decode_RS2[1] 1 1 .names murax.system_cpu._zz_153_[2] murax.system_cpu.decode_RS2[2] 1 1 .names murax.system_cpu._zz_153_[3] murax.system_cpu.decode_RS2[3] 1 1 .names murax.system_cpu._zz_153_[4] murax.system_cpu.decode_RS2[4] 1 1 .names murax.system_cpu._zz_153_[5] murax.system_cpu.decode_RS2[5] 1 1 .names murax.system_cpu._zz_153_[6] murax.system_cpu.decode_RS2[6] 1 1 .names murax.system_cpu._zz_153_[7] murax.system_cpu.decode_RS2[7] 1 1 .names murax.system_cpu._zz_153_[8] murax.system_cpu.decode_RS2[8] 1 1 .names murax.system_cpu._zz_153_[9] murax.system_cpu.decode_RS2[9] 1 1 .names murax.system_cpu._zz_153_[10] murax.system_cpu.decode_RS2[10] 1 1 .names murax.system_cpu._zz_153_[11] murax.system_cpu.decode_RS2[11] 1 1 .names murax.system_cpu._zz_153_[12] murax.system_cpu.decode_RS2[12] 1 1 .names murax.system_cpu._zz_153_[13] murax.system_cpu.decode_RS2[13] 1 1 .names murax.system_cpu._zz_153_[14] murax.system_cpu.decode_RS2[14] 1 1 .names murax.system_cpu._zz_153_[15] murax.system_cpu.decode_RS2[15] 1 1 .names murax.system_cpu._zz_153_[16] murax.system_cpu.decode_RS2[16] 1 1 .names murax.system_cpu._zz_153_[17] murax.system_cpu.decode_RS2[17] 1 1 .names murax.system_cpu._zz_153_[18] murax.system_cpu.decode_RS2[18] 1 1 .names murax.system_cpu._zz_153_[19] murax.system_cpu.decode_RS2[19] 1 1 .names murax.system_cpu._zz_153_[20] murax.system_cpu.decode_RS2[20] 1 1 .names murax.system_cpu._zz_153_[21] murax.system_cpu.decode_RS2[21] 1 1 .names murax.system_cpu._zz_153_[22] murax.system_cpu.decode_RS2[22] 1 1 .names murax.system_cpu._zz_153_[23] murax.system_cpu.decode_RS2[23] 1 1 .names murax.system_cpu._zz_153_[24] murax.system_cpu.decode_RS2[24] 1 1 .names murax.system_cpu._zz_153_[25] murax.system_cpu.decode_RS2[25] 1 1 .names murax.system_cpu._zz_153_[26] murax.system_cpu.decode_RS2[26] 1 1 .names murax.system_cpu._zz_153_[27] murax.system_cpu.decode_RS2[27] 1 1 .names murax.system_cpu._zz_153_[28] murax.system_cpu.decode_RS2[28] 1 1 .names murax.system_cpu._zz_153_[29] murax.system_cpu.decode_RS2[29] 1 1 .names murax.system_cpu._zz_153_[30] murax.system_cpu.decode_RS2[30] 1 1 .names murax.system_cpu._zz_153_[31] murax.system_cpu.decode_RS2[31] 1 1 .names murax.system_cpu._zz_111_[4] murax.system_cpu.decode_RS2_USE 1 1 .names murax.system_cpu._zz_73_[15] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress1[0] 1 1 .names murax.system_cpu._zz_73_[16] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress1[1] 1 1 .names murax.system_cpu._zz_73_[17] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress1[2] 1 1 .names murax.system_cpu._zz_73_[18] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress1[3] 1 1 .names murax.system_cpu._zz_73_[19] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress1[4] 1 1 .names murax.system_cpu._zz_73_[20] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress2[0] 1 1 .names murax.system_cpu._zz_73_[21] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress2[1] 1 1 .names murax.system_cpu._zz_73_[22] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress2[2] 1 1 .names murax.system_cpu._zz_73_[23] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress2[3] 1 1 .names murax.system_cpu._zz_73_[24] murax.system_cpu.decode_RegFilePlugin_regFileReadAddress2[4] 1 1 .names murax.system_cpu._zz_152_[0] murax.system_cpu.decode_RegFilePlugin_rs1Data[0] 1 1 .names murax.system_cpu._zz_152_[1] murax.system_cpu.decode_RegFilePlugin_rs1Data[1] 1 1 .names murax.system_cpu._zz_152_[2] murax.system_cpu.decode_RegFilePlugin_rs1Data[2] 1 1 .names murax.system_cpu._zz_152_[3] murax.system_cpu.decode_RegFilePlugin_rs1Data[3] 1 1 .names murax.system_cpu._zz_152_[4] murax.system_cpu.decode_RegFilePlugin_rs1Data[4] 1 1 .names murax.system_cpu._zz_152_[5] murax.system_cpu.decode_RegFilePlugin_rs1Data[5] 1 1 .names murax.system_cpu._zz_152_[6] murax.system_cpu.decode_RegFilePlugin_rs1Data[6] 1 1 .names murax.system_cpu._zz_152_[7] murax.system_cpu.decode_RegFilePlugin_rs1Data[7] 1 1 .names murax.system_cpu._zz_152_[8] murax.system_cpu.decode_RegFilePlugin_rs1Data[8] 1 1 .names murax.system_cpu._zz_152_[9] murax.system_cpu.decode_RegFilePlugin_rs1Data[9] 1 1 .names murax.system_cpu._zz_152_[10] murax.system_cpu.decode_RegFilePlugin_rs1Data[10] 1 1 .names murax.system_cpu._zz_152_[11] murax.system_cpu.decode_RegFilePlugin_rs1Data[11] 1 1 .names murax.system_cpu._zz_152_[12] murax.system_cpu.decode_RegFilePlugin_rs1Data[12] 1 1 .names murax.system_cpu._zz_152_[13] murax.system_cpu.decode_RegFilePlugin_rs1Data[13] 1 1 .names murax.system_cpu._zz_152_[14] murax.system_cpu.decode_RegFilePlugin_rs1Data[14] 1 1 .names murax.system_cpu._zz_152_[15] murax.system_cpu.decode_RegFilePlugin_rs1Data[15] 1 1 .names murax.system_cpu._zz_152_[16] murax.system_cpu.decode_RegFilePlugin_rs1Data[16] 1 1 .names murax.system_cpu._zz_152_[17] murax.system_cpu.decode_RegFilePlugin_rs1Data[17] 1 1 .names murax.system_cpu._zz_152_[18] murax.system_cpu.decode_RegFilePlugin_rs1Data[18] 1 1 .names murax.system_cpu._zz_152_[19] murax.system_cpu.decode_RegFilePlugin_rs1Data[19] 1 1 .names murax.system_cpu._zz_152_[20] murax.system_cpu.decode_RegFilePlugin_rs1Data[20] 1 1 .names murax.system_cpu._zz_152_[21] murax.system_cpu.decode_RegFilePlugin_rs1Data[21] 1 1 .names murax.system_cpu._zz_152_[22] murax.system_cpu.decode_RegFilePlugin_rs1Data[22] 1 1 .names murax.system_cpu._zz_152_[23] murax.system_cpu.decode_RegFilePlugin_rs1Data[23] 1 1 .names murax.system_cpu._zz_152_[24] murax.system_cpu.decode_RegFilePlugin_rs1Data[24] 1 1 .names murax.system_cpu._zz_152_[25] murax.system_cpu.decode_RegFilePlugin_rs1Data[25] 1 1 .names murax.system_cpu._zz_152_[26] murax.system_cpu.decode_RegFilePlugin_rs1Data[26] 1 1 .names murax.system_cpu._zz_152_[27] murax.system_cpu.decode_RegFilePlugin_rs1Data[27] 1 1 .names murax.system_cpu._zz_152_[28] murax.system_cpu.decode_RegFilePlugin_rs1Data[28] 1 1 .names murax.system_cpu._zz_152_[29] murax.system_cpu.decode_RegFilePlugin_rs1Data[29] 1 1 .names murax.system_cpu._zz_152_[30] murax.system_cpu.decode_RegFilePlugin_rs1Data[30] 1 1 .names murax.system_cpu._zz_152_[31] murax.system_cpu.decode_RegFilePlugin_rs1Data[31] 1 1 .names murax.system_cpu._zz_153_[0] murax.system_cpu.decode_RegFilePlugin_rs2Data[0] 1 1 .names murax.system_cpu._zz_153_[1] murax.system_cpu.decode_RegFilePlugin_rs2Data[1] 1 1 .names murax.system_cpu._zz_153_[2] murax.system_cpu.decode_RegFilePlugin_rs2Data[2] 1 1 .names murax.system_cpu._zz_153_[3] murax.system_cpu.decode_RegFilePlugin_rs2Data[3] 1 1 .names murax.system_cpu._zz_153_[4] murax.system_cpu.decode_RegFilePlugin_rs2Data[4] 1 1 .names murax.system_cpu._zz_153_[5] murax.system_cpu.decode_RegFilePlugin_rs2Data[5] 1 1 .names murax.system_cpu._zz_153_[6] murax.system_cpu.decode_RegFilePlugin_rs2Data[6] 1 1 .names murax.system_cpu._zz_153_[7] murax.system_cpu.decode_RegFilePlugin_rs2Data[7] 1 1 .names murax.system_cpu._zz_153_[8] murax.system_cpu.decode_RegFilePlugin_rs2Data[8] 1 1 .names murax.system_cpu._zz_153_[9] murax.system_cpu.decode_RegFilePlugin_rs2Data[9] 1 1 .names murax.system_cpu._zz_153_[10] murax.system_cpu.decode_RegFilePlugin_rs2Data[10] 1 1 .names murax.system_cpu._zz_153_[11] murax.system_cpu.decode_RegFilePlugin_rs2Data[11] 1 1 .names murax.system_cpu._zz_153_[12] murax.system_cpu.decode_RegFilePlugin_rs2Data[12] 1 1 .names murax.system_cpu._zz_153_[13] murax.system_cpu.decode_RegFilePlugin_rs2Data[13] 1 1 .names murax.system_cpu._zz_153_[14] murax.system_cpu.decode_RegFilePlugin_rs2Data[14] 1 1 .names murax.system_cpu._zz_153_[15] murax.system_cpu.decode_RegFilePlugin_rs2Data[15] 1 1 .names murax.system_cpu._zz_153_[16] murax.system_cpu.decode_RegFilePlugin_rs2Data[16] 1 1 .names murax.system_cpu._zz_153_[17] murax.system_cpu.decode_RegFilePlugin_rs2Data[17] 1 1 .names murax.system_cpu._zz_153_[18] murax.system_cpu.decode_RegFilePlugin_rs2Data[18] 1 1 .names murax.system_cpu._zz_153_[19] murax.system_cpu.decode_RegFilePlugin_rs2Data[19] 1 1 .names murax.system_cpu._zz_153_[20] murax.system_cpu.decode_RegFilePlugin_rs2Data[20] 1 1 .names murax.system_cpu._zz_153_[21] murax.system_cpu.decode_RegFilePlugin_rs2Data[21] 1 1 .names murax.system_cpu._zz_153_[22] murax.system_cpu.decode_RegFilePlugin_rs2Data[22] 1 1 .names murax.system_cpu._zz_153_[23] murax.system_cpu.decode_RegFilePlugin_rs2Data[23] 1 1 .names murax.system_cpu._zz_153_[24] murax.system_cpu.decode_RegFilePlugin_rs2Data[24] 1 1 .names murax.system_cpu._zz_153_[25] murax.system_cpu.decode_RegFilePlugin_rs2Data[25] 1 1 .names murax.system_cpu._zz_153_[26] murax.system_cpu.decode_RegFilePlugin_rs2Data[26] 1 1 .names murax.system_cpu._zz_153_[27] murax.system_cpu.decode_RegFilePlugin_rs2Data[27] 1 1 .names murax.system_cpu._zz_153_[28] murax.system_cpu.decode_RegFilePlugin_rs2Data[28] 1 1 .names murax.system_cpu._zz_153_[29] murax.system_cpu.decode_RegFilePlugin_rs2Data[29] 1 1 .names murax.system_cpu._zz_153_[30] murax.system_cpu.decode_RegFilePlugin_rs2Data[30] 1 1 .names murax.system_cpu._zz_153_[31] murax.system_cpu.decode_RegFilePlugin_rs2Data[31] 1 1 .names murax.system_cpu._zz_275_ murax.system_cpu.decode_SHIFT_CTRL[0] 1 1 .names murax.system_cpu._zz_273_ murax.system_cpu.decode_SHIFT_CTRL[1] 1 1 .names $undef murax.system_cpu.decode_SRC1[5] 1 1 .names $undef murax.system_cpu.decode_SRC1[6] 1 1 .names $undef murax.system_cpu.decode_SRC1[7] 1 1 .names $undef murax.system_cpu.decode_SRC1[8] 1 1 .names $undef murax.system_cpu.decode_SRC1[9] 1 1 .names $undef murax.system_cpu.decode_SRC1[10] 1 1 .names $undef murax.system_cpu.decode_SRC1[11] 1 1 .names $undef murax.system_cpu.decode_SRC1[12] 1 1 .names $undef murax.system_cpu.decode_SRC1[13] 1 1 .names $undef murax.system_cpu.decode_SRC1[14] 1 1 .names $undef murax.system_cpu.decode_SRC1[15] 1 1 .names $undef murax.system_cpu.decode_SRC1[16] 1 1 .names $undef murax.system_cpu.decode_SRC1[17] 1 1 .names $undef murax.system_cpu.decode_SRC1[18] 1 1 .names $undef murax.system_cpu.decode_SRC1[19] 1 1 .names $undef murax.system_cpu.decode_SRC1[20] 1 1 .names $undef murax.system_cpu.decode_SRC1[21] 1 1 .names $undef murax.system_cpu.decode_SRC1[22] 1 1 .names $undef murax.system_cpu.decode_SRC1[23] 1 1 .names $undef murax.system_cpu.decode_SRC1[24] 1 1 .names $undef murax.system_cpu.decode_SRC1[25] 1 1 .names $undef murax.system_cpu.decode_SRC1[26] 1 1 .names $undef murax.system_cpu.decode_SRC1[27] 1 1 .names $undef murax.system_cpu.decode_SRC1[28] 1 1 .names $undef murax.system_cpu.decode_SRC1[29] 1 1 .names $undef murax.system_cpu.decode_SRC1[30] 1 1 .names $undef murax.system_cpu.decode_SRC1[31] 1 1 .names murax.system_cpu._zz_111_[5] murax.system_cpu.decode_SRC1_CTRL[0] 1 1 .names murax.system_cpu._zz_111_[6] murax.system_cpu.decode_SRC1_CTRL[1] 1 1 .names murax.system_cpu._zz_111_[17] murax.system_cpu.decode_SRC2_CTRL[0] 1 1 .names murax.system_cpu._zz_111_[18] murax.system_cpu.decode_SRC2_CTRL[1] 1 1 .names $undef murax.system_cpu.decode_to_execute_INSTRUCTION[0] 1 1 .names $undef murax.system_cpu.decode_to_execute_INSTRUCTION[1] 1 1 .names $undef murax.system_cpu.decode_to_execute_INSTRUCTION[2] 1 1 .names $undef murax.system_cpu.decode_to_execute_INSTRUCTION[3] 1 1 .names $undef murax.system_cpu.decode_to_execute_INSTRUCTION[4] 1 1 .names murax.system_cpu.dBus_cmd_payload_wr murax.system_cpu.decode_to_execute_INSTRUCTION[5] 1 1 .names $undef murax.system_cpu.decode_to_execute_INSTRUCTION[6] 1 1 .names murax.system_cpu._zz_165_ murax.system_cpu.decode_to_execute_INSTRUCTION[13] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.decode_to_execute_INSTRUCTION[31] 1 1 .names murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[0] murax.system_cpu.execute_ALU_BITWISE_CTRL[0] 1 1 .names murax.system_cpu.decode_to_execute_ALU_BITWISE_CTRL[1] murax.system_cpu.execute_ALU_BITWISE_CTRL[1] 1 1 .names murax.system_cpu.decode_to_execute_ALU_CTRL[0] murax.system_cpu.execute_ALU_CTRL[0] 1 1 .names murax.system_cpu.decode_to_execute_ALU_CTRL[1] murax.system_cpu.execute_ALU_CTRL[1] 1 1 .names $false murax.system_cpu.execute_BRANCH_CALC[0] 1 1 .names $undef murax.system_cpu.execute_BRANCH_CALC[1] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[2] murax.system_cpu.execute_BRANCH_CALC[2] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[3] murax.system_cpu.execute_BRANCH_CALC[3] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[4] murax.system_cpu.execute_BRANCH_CALC[4] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[5] murax.system_cpu.execute_BRANCH_CALC[5] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[6] murax.system_cpu.execute_BRANCH_CALC[6] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[7] murax.system_cpu.execute_BRANCH_CALC[7] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[8] murax.system_cpu.execute_BRANCH_CALC[8] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[9] murax.system_cpu.execute_BRANCH_CALC[9] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[10] murax.system_cpu.execute_BRANCH_CALC[10] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[11] murax.system_cpu.execute_BRANCH_CALC[11] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[12] murax.system_cpu.execute_BRANCH_CALC[12] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[13] murax.system_cpu.execute_BRANCH_CALC[13] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[14] murax.system_cpu.execute_BRANCH_CALC[14] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[15] murax.system_cpu.execute_BRANCH_CALC[15] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[16] murax.system_cpu.execute_BRANCH_CALC[16] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[17] murax.system_cpu.execute_BRANCH_CALC[17] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[18] murax.system_cpu.execute_BRANCH_CALC[18] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[19] murax.system_cpu.execute_BRANCH_CALC[19] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[20] murax.system_cpu.execute_BRANCH_CALC[20] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[21] murax.system_cpu.execute_BRANCH_CALC[21] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[22] murax.system_cpu.execute_BRANCH_CALC[22] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[23] murax.system_cpu.execute_BRANCH_CALC[23] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[24] murax.system_cpu.execute_BRANCH_CALC[24] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[25] murax.system_cpu.execute_BRANCH_CALC[25] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[26] murax.system_cpu.execute_BRANCH_CALC[26] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[27] murax.system_cpu.execute_BRANCH_CALC[27] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[28] murax.system_cpu.execute_BRANCH_CALC[28] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[29] murax.system_cpu.execute_BRANCH_CALC[29] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[30] murax.system_cpu.execute_BRANCH_CALC[30] 1 1 .names murax.system_cpu.execute_BranchPlugin_branchAdder[31] murax.system_cpu.execute_BRANCH_CALC[31] 1 1 .names murax.system_cpu.decode_to_execute_BRANCH_CTRL[0] murax.system_cpu.execute_BRANCH_CTRL[0] 1 1 .names murax.system_cpu.decode_to_execute_BRANCH_CTRL[1] murax.system_cpu.execute_BRANCH_CTRL[1] 1 1 .names $undef murax.system_cpu.execute_BranchPlugin_branchAdder[0] 1 1 .names $undef murax.system_cpu.execute_BranchPlugin_branchAdder[1] 1 1 .names murax.system_cpu._zz_148_[0] murax.system_cpu.execute_BranchPlugin_branch_src2[0] 1 1 .names murax.system_cpu._zz_148_[1] murax.system_cpu.execute_BranchPlugin_branch_src2[1] 1 1 .names murax.system_cpu._zz_148_[2] murax.system_cpu.execute_BranchPlugin_branch_src2[2] 1 1 .names murax.system_cpu._zz_148_[3] murax.system_cpu.execute_BranchPlugin_branch_src2[3] 1 1 .names murax.system_cpu._zz_148_[4] murax.system_cpu.execute_BranchPlugin_branch_src2[4] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[25] murax.system_cpu.execute_BranchPlugin_branch_src2[5] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[26] murax.system_cpu.execute_BranchPlugin_branch_src2[6] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[27] murax.system_cpu.execute_BranchPlugin_branch_src2[7] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[28] murax.system_cpu.execute_BranchPlugin_branch_src2[8] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[29] murax.system_cpu.execute_BranchPlugin_branch_src2[9] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[30] murax.system_cpu.execute_BranchPlugin_branch_src2[10] 1 1 .names murax.system_cpu._zz_148_[11] murax.system_cpu.execute_BranchPlugin_branch_src2[11] 1 1 .names murax.system_cpu._zz_148_[12] murax.system_cpu.execute_BranchPlugin_branch_src2[12] 1 1 .names murax.system_cpu._zz_148_[13] murax.system_cpu.execute_BranchPlugin_branch_src2[13] 1 1 .names murax.system_cpu._zz_148_[14] murax.system_cpu.execute_BranchPlugin_branch_src2[14] 1 1 .names murax.system_cpu._zz_148_[15] murax.system_cpu.execute_BranchPlugin_branch_src2[15] 1 1 .names murax.system_cpu._zz_148_[16] murax.system_cpu.execute_BranchPlugin_branch_src2[16] 1 1 .names murax.system_cpu._zz_148_[17] murax.system_cpu.execute_BranchPlugin_branch_src2[17] 1 1 .names murax.system_cpu._zz_148_[18] murax.system_cpu.execute_BranchPlugin_branch_src2[18] 1 1 .names murax.system_cpu._zz_148_[19] murax.system_cpu.execute_BranchPlugin_branch_src2[19] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[20] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[21] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[22] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[23] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[24] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[25] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[26] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[27] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[28] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[29] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[30] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_BranchPlugin_branch_src2[31] 1 1 .names murax.system_cpu.decode_to_execute_CSR_WRITE_OPCODE murax.system_cpu.execute_CSR_WRITE_OPCODE 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[20] murax.system_cpu.execute_CsrPlugin_csrAddress[0] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[21] murax.system_cpu.execute_CsrPlugin_csrAddress[1] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[22] murax.system_cpu.execute_CsrPlugin_csrAddress[2] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[23] murax.system_cpu.execute_CsrPlugin_csrAddress[3] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[24] murax.system_cpu.execute_CsrPlugin_csrAddress[4] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[25] murax.system_cpu.execute_CsrPlugin_csrAddress[5] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[26] murax.system_cpu.execute_CsrPlugin_csrAddress[6] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[27] murax.system_cpu.execute_CsrPlugin_csrAddress[7] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[28] murax.system_cpu.execute_CsrPlugin_csrAddress[8] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[29] murax.system_cpu.execute_CsrPlugin_csrAddress[9] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[30] murax.system_cpu.execute_CsrPlugin_csrAddress[10] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_CsrPlugin_csrAddress[11] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[0] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[1] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[2] 1 1 .names murax.system_cpu._zz_206_ murax.system_cpu.execute_CsrPlugin_writeData[3] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[4] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[5] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[6] 1 1 .names murax.system_cpu._zz_205_ murax.system_cpu.execute_CsrPlugin_writeData[7] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[8] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[9] 1 1 .names $undef murax.system_cpu.execute_CsrPlugin_writeData[10] 1 1 .names murax.system_cpu._zz_208_ murax.system_cpu.execute_CsrPlugin_writeData[11] 1 1 .names murax.system_cpu.decode_to_execute_DO_EBREAK murax.system_cpu.execute_DO_EBREAK 1 1 .names murax.system_cpu.decode_to_execute_ENV_CTRL murax.system_cpu.execute_ENV_CTRL 1 1 .names $undef murax.system_cpu.execute_INSTRUCTION[0] 1 1 .names $undef murax.system_cpu.execute_INSTRUCTION[1] 1 1 .names $undef murax.system_cpu.execute_INSTRUCTION[2] 1 1 .names $undef murax.system_cpu.execute_INSTRUCTION[3] 1 1 .names $undef murax.system_cpu.execute_INSTRUCTION[4] 1 1 .names murax.system_cpu.dBus_cmd_payload_wr murax.system_cpu.execute_INSTRUCTION[5] 1 1 .names $undef murax.system_cpu.execute_INSTRUCTION[6] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[7] murax.system_cpu.execute_INSTRUCTION[7] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[8] murax.system_cpu.execute_INSTRUCTION[8] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[9] murax.system_cpu.execute_INSTRUCTION[9] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[10] murax.system_cpu.execute_INSTRUCTION[10] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[11] murax.system_cpu.execute_INSTRUCTION[11] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[12] murax.system_cpu.execute_INSTRUCTION[12] 1 1 .names murax.system_cpu._zz_165_ murax.system_cpu.execute_INSTRUCTION[13] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[14] murax.system_cpu.execute_INSTRUCTION[14] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[15] murax.system_cpu.execute_INSTRUCTION[15] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[16] murax.system_cpu.execute_INSTRUCTION[16] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[17] murax.system_cpu.execute_INSTRUCTION[17] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[18] murax.system_cpu.execute_INSTRUCTION[18] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[19] murax.system_cpu.execute_INSTRUCTION[19] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[20] murax.system_cpu.execute_INSTRUCTION[20] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[21] murax.system_cpu.execute_INSTRUCTION[21] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[22] murax.system_cpu.execute_INSTRUCTION[22] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[23] murax.system_cpu.execute_INSTRUCTION[23] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[24] murax.system_cpu.execute_INSTRUCTION[24] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[25] murax.system_cpu.execute_INSTRUCTION[25] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[26] murax.system_cpu.execute_INSTRUCTION[26] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[27] murax.system_cpu.execute_INSTRUCTION[27] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[28] murax.system_cpu.execute_INSTRUCTION[28] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[29] murax.system_cpu.execute_INSTRUCTION[29] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[30] murax.system_cpu.execute_INSTRUCTION[30] 1 1 .names murax.system_cpu._zz_142_ murax.system_cpu.execute_INSTRUCTION[31] 1 1 .names murax.system_cpu.decode_to_execute_IS_CSR murax.system_cpu.execute_IS_CSR 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu.execute_MEMORY_ADDRESS_LOW[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu.execute_MEMORY_ADDRESS_LOW[1] 1 1 .names murax.system_cpu.decode_to_execute_MEMORY_ENABLE murax.system_cpu.execute_MEMORY_ENABLE 1 1 .names murax.system_cpu.decode_to_execute_PC[0] murax.system_cpu.execute_PC[0] 1 1 .names murax.system_cpu.decode_to_execute_PC[1] murax.system_cpu.execute_PC[1] 1 1 .names murax.system_cpu.decode_to_execute_PC[2] murax.system_cpu.execute_PC[2] 1 1 .names murax.system_cpu.decode_to_execute_PC[3] murax.system_cpu.execute_PC[3] 1 1 .names murax.system_cpu.decode_to_execute_PC[4] murax.system_cpu.execute_PC[4] 1 1 .names murax.system_cpu.decode_to_execute_PC[5] murax.system_cpu.execute_PC[5] 1 1 .names murax.system_cpu.decode_to_execute_PC[6] murax.system_cpu.execute_PC[6] 1 1 .names murax.system_cpu.decode_to_execute_PC[7] murax.system_cpu.execute_PC[7] 1 1 .names murax.system_cpu.decode_to_execute_PC[8] murax.system_cpu.execute_PC[8] 1 1 .names murax.system_cpu.decode_to_execute_PC[9] murax.system_cpu.execute_PC[9] 1 1 .names murax.system_cpu.decode_to_execute_PC[10] murax.system_cpu.execute_PC[10] 1 1 .names murax.system_cpu.decode_to_execute_PC[11] murax.system_cpu.execute_PC[11] 1 1 .names murax.system_cpu.decode_to_execute_PC[12] murax.system_cpu.execute_PC[12] 1 1 .names murax.system_cpu.decode_to_execute_PC[13] murax.system_cpu.execute_PC[13] 1 1 .names murax.system_cpu.decode_to_execute_PC[14] murax.system_cpu.execute_PC[14] 1 1 .names murax.system_cpu.decode_to_execute_PC[15] murax.system_cpu.execute_PC[15] 1 1 .names murax.system_cpu.decode_to_execute_PC[16] murax.system_cpu.execute_PC[16] 1 1 .names murax.system_cpu.decode_to_execute_PC[17] murax.system_cpu.execute_PC[17] 1 1 .names murax.system_cpu.decode_to_execute_PC[18] murax.system_cpu.execute_PC[18] 1 1 .names murax.system_cpu.decode_to_execute_PC[19] murax.system_cpu.execute_PC[19] 1 1 .names murax.system_cpu.decode_to_execute_PC[20] murax.system_cpu.execute_PC[20] 1 1 .names murax.system_cpu.decode_to_execute_PC[21] murax.system_cpu.execute_PC[21] 1 1 .names murax.system_cpu.decode_to_execute_PC[22] murax.system_cpu.execute_PC[22] 1 1 .names murax.system_cpu.decode_to_execute_PC[23] murax.system_cpu.execute_PC[23] 1 1 .names murax.system_cpu.decode_to_execute_PC[24] murax.system_cpu.execute_PC[24] 1 1 .names murax.system_cpu.decode_to_execute_PC[25] murax.system_cpu.execute_PC[25] 1 1 .names murax.system_cpu.decode_to_execute_PC[26] murax.system_cpu.execute_PC[26] 1 1 .names murax.system_cpu.decode_to_execute_PC[27] murax.system_cpu.execute_PC[27] 1 1 .names murax.system_cpu.decode_to_execute_PC[28] murax.system_cpu.execute_PC[28] 1 1 .names murax.system_cpu.decode_to_execute_PC[29] murax.system_cpu.execute_PC[29] 1 1 .names murax.system_cpu.decode_to_execute_PC[30] murax.system_cpu.execute_PC[30] 1 1 .names murax.system_cpu.decode_to_execute_PC[31] murax.system_cpu.execute_PC[31] 1 1 .names murax.system_cpu.decode_to_execute_REGFILE_WRITE_VALID murax.system_cpu.execute_REGFILE_WRITE_VALID 1 1 .names murax.system_cpu.decode_to_execute_RS1[0] murax.system_cpu.execute_RS1[0] 1 1 .names murax.system_cpu.decode_to_execute_RS1[1] murax.system_cpu.execute_RS1[1] 1 1 .names murax.system_cpu.decode_to_execute_RS1[2] murax.system_cpu.execute_RS1[2] 1 1 .names murax.system_cpu.decode_to_execute_RS1[3] murax.system_cpu.execute_RS1[3] 1 1 .names murax.system_cpu.decode_to_execute_RS1[4] murax.system_cpu.execute_RS1[4] 1 1 .names murax.system_cpu.decode_to_execute_RS1[5] murax.system_cpu.execute_RS1[5] 1 1 .names murax.system_cpu.decode_to_execute_RS1[6] murax.system_cpu.execute_RS1[6] 1 1 .names murax.system_cpu.decode_to_execute_RS1[7] murax.system_cpu.execute_RS1[7] 1 1 .names murax.system_cpu.decode_to_execute_RS1[8] murax.system_cpu.execute_RS1[8] 1 1 .names murax.system_cpu.decode_to_execute_RS1[9] murax.system_cpu.execute_RS1[9] 1 1 .names murax.system_cpu.decode_to_execute_RS1[10] murax.system_cpu.execute_RS1[10] 1 1 .names murax.system_cpu.decode_to_execute_RS1[11] murax.system_cpu.execute_RS1[11] 1 1 .names murax.system_cpu.decode_to_execute_RS1[12] murax.system_cpu.execute_RS1[12] 1 1 .names murax.system_cpu.decode_to_execute_RS1[13] murax.system_cpu.execute_RS1[13] 1 1 .names murax.system_cpu.decode_to_execute_RS1[14] murax.system_cpu.execute_RS1[14] 1 1 .names murax.system_cpu.decode_to_execute_RS1[15] murax.system_cpu.execute_RS1[15] 1 1 .names murax.system_cpu.decode_to_execute_RS1[16] murax.system_cpu.execute_RS1[16] 1 1 .names murax.system_cpu.decode_to_execute_RS1[17] murax.system_cpu.execute_RS1[17] 1 1 .names murax.system_cpu.decode_to_execute_RS1[18] murax.system_cpu.execute_RS1[18] 1 1 .names murax.system_cpu.decode_to_execute_RS1[19] murax.system_cpu.execute_RS1[19] 1 1 .names murax.system_cpu.decode_to_execute_RS1[20] murax.system_cpu.execute_RS1[20] 1 1 .names murax.system_cpu.decode_to_execute_RS1[21] murax.system_cpu.execute_RS1[21] 1 1 .names murax.system_cpu.decode_to_execute_RS1[22] murax.system_cpu.execute_RS1[22] 1 1 .names murax.system_cpu.decode_to_execute_RS1[23] murax.system_cpu.execute_RS1[23] 1 1 .names murax.system_cpu.decode_to_execute_RS1[24] murax.system_cpu.execute_RS1[24] 1 1 .names murax.system_cpu.decode_to_execute_RS1[25] murax.system_cpu.execute_RS1[25] 1 1 .names murax.system_cpu.decode_to_execute_RS1[26] murax.system_cpu.execute_RS1[26] 1 1 .names murax.system_cpu.decode_to_execute_RS1[27] murax.system_cpu.execute_RS1[27] 1 1 .names murax.system_cpu.decode_to_execute_RS1[28] murax.system_cpu.execute_RS1[28] 1 1 .names murax.system_cpu.decode_to_execute_RS1[29] murax.system_cpu.execute_RS1[29] 1 1 .names murax.system_cpu.decode_to_execute_RS1[30] murax.system_cpu.execute_RS1[30] 1 1 .names murax.system_cpu.decode_to_execute_RS1[31] murax.system_cpu.execute_RS1[31] 1 1 .names murax.system_cpu.decode_to_execute_RS2[0] murax.system_cpu.execute_RS2[0] 1 1 .names murax.system_cpu.decode_to_execute_RS2[1] murax.system_cpu.execute_RS2[1] 1 1 .names murax.system_cpu.decode_to_execute_RS2[2] murax.system_cpu.execute_RS2[2] 1 1 .names murax.system_cpu.decode_to_execute_RS2[3] murax.system_cpu.execute_RS2[3] 1 1 .names murax.system_cpu.decode_to_execute_RS2[4] murax.system_cpu.execute_RS2[4] 1 1 .names murax.system_cpu.decode_to_execute_RS2[5] murax.system_cpu.execute_RS2[5] 1 1 .names murax.system_cpu.decode_to_execute_RS2[6] murax.system_cpu.execute_RS2[6] 1 1 .names murax.system_cpu.decode_to_execute_RS2[7] murax.system_cpu.execute_RS2[7] 1 1 .names murax.system_cpu.decode_to_execute_RS2[8] murax.system_cpu.execute_RS2[8] 1 1 .names murax.system_cpu.decode_to_execute_RS2[9] murax.system_cpu.execute_RS2[9] 1 1 .names murax.system_cpu.decode_to_execute_RS2[10] murax.system_cpu.execute_RS2[10] 1 1 .names murax.system_cpu.decode_to_execute_RS2[11] murax.system_cpu.execute_RS2[11] 1 1 .names murax.system_cpu.decode_to_execute_RS2[12] murax.system_cpu.execute_RS2[12] 1 1 .names murax.system_cpu.decode_to_execute_RS2[13] murax.system_cpu.execute_RS2[13] 1 1 .names murax.system_cpu.decode_to_execute_RS2[14] murax.system_cpu.execute_RS2[14] 1 1 .names murax.system_cpu.decode_to_execute_RS2[15] murax.system_cpu.execute_RS2[15] 1 1 .names murax.system_cpu.decode_to_execute_RS2[16] murax.system_cpu.execute_RS2[16] 1 1 .names murax.system_cpu.decode_to_execute_RS2[17] murax.system_cpu.execute_RS2[17] 1 1 .names murax.system_cpu.decode_to_execute_RS2[18] murax.system_cpu.execute_RS2[18] 1 1 .names murax.system_cpu.decode_to_execute_RS2[19] murax.system_cpu.execute_RS2[19] 1 1 .names murax.system_cpu.decode_to_execute_RS2[20] murax.system_cpu.execute_RS2[20] 1 1 .names murax.system_cpu.decode_to_execute_RS2[21] murax.system_cpu.execute_RS2[21] 1 1 .names murax.system_cpu.decode_to_execute_RS2[22] murax.system_cpu.execute_RS2[22] 1 1 .names murax.system_cpu.decode_to_execute_RS2[23] murax.system_cpu.execute_RS2[23] 1 1 .names murax.system_cpu.decode_to_execute_RS2[24] murax.system_cpu.execute_RS2[24] 1 1 .names murax.system_cpu.decode_to_execute_RS2[25] murax.system_cpu.execute_RS2[25] 1 1 .names murax.system_cpu.decode_to_execute_RS2[26] murax.system_cpu.execute_RS2[26] 1 1 .names murax.system_cpu.decode_to_execute_RS2[27] murax.system_cpu.execute_RS2[27] 1 1 .names murax.system_cpu.decode_to_execute_RS2[28] murax.system_cpu.execute_RS2[28] 1 1 .names murax.system_cpu.decode_to_execute_RS2[29] murax.system_cpu.execute_RS2[29] 1 1 .names murax.system_cpu.decode_to_execute_RS2[30] murax.system_cpu.execute_RS2[30] 1 1 .names murax.system_cpu.decode_to_execute_RS2[31] murax.system_cpu.execute_RS2[31] 1 1 .names murax.system_cpu.decode_to_execute_SHIFT_CTRL[0] murax.system_cpu.execute_SHIFT_CTRL[0] 1 1 .names murax.system_cpu.decode_to_execute_SHIFT_CTRL[1] murax.system_cpu.execute_SHIFT_CTRL[1] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[0] murax.system_cpu.execute_SRC1[0] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[1] murax.system_cpu.execute_SRC1[1] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[2] murax.system_cpu.execute_SRC1[2] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[3] murax.system_cpu.execute_SRC1[3] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[4] murax.system_cpu.execute_SRC1[4] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[5] murax.system_cpu.execute_SRC1[5] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[6] murax.system_cpu.execute_SRC1[6] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[7] murax.system_cpu.execute_SRC1[7] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[8] murax.system_cpu.execute_SRC1[8] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[9] murax.system_cpu.execute_SRC1[9] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[10] murax.system_cpu.execute_SRC1[10] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[11] murax.system_cpu.execute_SRC1[11] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[12] murax.system_cpu.execute_SRC1[12] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[13] murax.system_cpu.execute_SRC1[13] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[14] murax.system_cpu.execute_SRC1[14] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[15] murax.system_cpu.execute_SRC1[15] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[16] murax.system_cpu.execute_SRC1[16] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[17] murax.system_cpu.execute_SRC1[17] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[18] murax.system_cpu.execute_SRC1[18] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[19] murax.system_cpu.execute_SRC1[19] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[20] murax.system_cpu.execute_SRC1[20] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[21] murax.system_cpu.execute_SRC1[21] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[22] murax.system_cpu.execute_SRC1[22] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[23] murax.system_cpu.execute_SRC1[23] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[24] murax.system_cpu.execute_SRC1[24] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[25] murax.system_cpu.execute_SRC1[25] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[26] murax.system_cpu.execute_SRC1[26] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[27] murax.system_cpu.execute_SRC1[27] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[28] murax.system_cpu.execute_SRC1[28] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[29] murax.system_cpu.execute_SRC1[29] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[30] murax.system_cpu.execute_SRC1[30] 1 1 .names murax.system_cpu.decode_to_execute_SRC1[31] murax.system_cpu.execute_SRC1[31] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[0] murax.system_cpu.execute_SRC2[0] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[1] murax.system_cpu.execute_SRC2[1] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[2] murax.system_cpu.execute_SRC2[2] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[3] murax.system_cpu.execute_SRC2[3] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[4] murax.system_cpu.execute_SRC2[4] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[5] murax.system_cpu.execute_SRC2[5] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[6] murax.system_cpu.execute_SRC2[6] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[7] murax.system_cpu.execute_SRC2[7] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[8] murax.system_cpu.execute_SRC2[8] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[9] murax.system_cpu.execute_SRC2[9] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[10] murax.system_cpu.execute_SRC2[10] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[11] murax.system_cpu.execute_SRC2[11] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[12] murax.system_cpu.execute_SRC2[12] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[13] murax.system_cpu.execute_SRC2[13] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[14] murax.system_cpu.execute_SRC2[14] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[15] murax.system_cpu.execute_SRC2[15] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[16] murax.system_cpu.execute_SRC2[16] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[17] murax.system_cpu.execute_SRC2[17] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[18] murax.system_cpu.execute_SRC2[18] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[19] murax.system_cpu.execute_SRC2[19] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[20] murax.system_cpu.execute_SRC2[20] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[21] murax.system_cpu.execute_SRC2[21] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[22] murax.system_cpu.execute_SRC2[22] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[23] murax.system_cpu.execute_SRC2[23] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[24] murax.system_cpu.execute_SRC2[24] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[25] murax.system_cpu.execute_SRC2[25] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[26] murax.system_cpu.execute_SRC2[26] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[27] murax.system_cpu.execute_SRC2[27] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[28] murax.system_cpu.execute_SRC2[28] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[29] murax.system_cpu.execute_SRC2[29] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[30] murax.system_cpu.execute_SRC2[30] 1 1 .names murax.system_cpu.decode_to_execute_SRC2[31] murax.system_cpu.execute_SRC2[31] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu.execute_SRC_ADD[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu.execute_SRC_ADD[1] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[2] murax.system_cpu.execute_SRC_ADD[2] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[3] murax.system_cpu.execute_SRC_ADD[3] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[4] murax.system_cpu.execute_SRC_ADD[4] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[5] murax.system_cpu.execute_SRC_ADD[5] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[6] murax.system_cpu.execute_SRC_ADD[6] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[7] murax.system_cpu.execute_SRC_ADD[7] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[8] murax.system_cpu.execute_SRC_ADD[8] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[9] murax.system_cpu.execute_SRC_ADD[9] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[10] murax.system_cpu.execute_SRC_ADD[10] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[11] murax.system_cpu.execute_SRC_ADD[11] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[12] murax.system_cpu.execute_SRC_ADD[12] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[13] murax.system_cpu.execute_SRC_ADD[13] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[14] murax.system_cpu.execute_SRC_ADD[14] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[15] murax.system_cpu.execute_SRC_ADD[15] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[16] murax.system_cpu.execute_SRC_ADD[16] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[17] murax.system_cpu.execute_SRC_ADD[17] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[18] murax.system_cpu.execute_SRC_ADD[18] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[19] murax.system_cpu.execute_SRC_ADD[19] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[20] murax.system_cpu.execute_SRC_ADD[20] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[21] murax.system_cpu.execute_SRC_ADD[21] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[22] murax.system_cpu.execute_SRC_ADD[22] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[23] murax.system_cpu.execute_SRC_ADD[23] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[24] murax.system_cpu.execute_SRC_ADD[24] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[25] murax.system_cpu.execute_SRC_ADD[25] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[26] murax.system_cpu.execute_SRC_ADD[26] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[27] murax.system_cpu.execute_SRC_ADD[27] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[28] murax.system_cpu.execute_SRC_ADD[28] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[29] murax.system_cpu.execute_SRC_ADD[29] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[30] murax.system_cpu.execute_SRC_ADD[30] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[31] murax.system_cpu.execute_SRC_ADD[31] 1 1 .names murax.system_cpu.decode_to_execute_SRC_LESS_UNSIGNED murax.system_cpu.execute_SRC_LESS_UNSIGNED 1 1 .names murax.system_cpu.decode_to_execute_SRC_USE_SUB_LESS murax.system_cpu.execute_SRC_USE_SUB_LESS 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu.execute_SrcPlugin_addSub[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu.execute_SrcPlugin_addSub[1] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[2] murax.system_cpu.execute_SrcPlugin_addSub[2] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[3] murax.system_cpu.execute_SrcPlugin_addSub[3] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[4] murax.system_cpu.execute_SrcPlugin_addSub[4] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[5] murax.system_cpu.execute_SrcPlugin_addSub[5] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[6] murax.system_cpu.execute_SrcPlugin_addSub[6] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[7] murax.system_cpu.execute_SrcPlugin_addSub[7] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[8] murax.system_cpu.execute_SrcPlugin_addSub[8] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[9] murax.system_cpu.execute_SrcPlugin_addSub[9] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[10] murax.system_cpu.execute_SrcPlugin_addSub[10] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[11] murax.system_cpu.execute_SrcPlugin_addSub[11] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[12] murax.system_cpu.execute_SrcPlugin_addSub[12] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[13] murax.system_cpu.execute_SrcPlugin_addSub[13] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[14] murax.system_cpu.execute_SrcPlugin_addSub[14] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[15] murax.system_cpu.execute_SrcPlugin_addSub[15] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[16] murax.system_cpu.execute_SrcPlugin_addSub[16] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[17] murax.system_cpu.execute_SrcPlugin_addSub[17] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[18] murax.system_cpu.execute_SrcPlugin_addSub[18] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[19] murax.system_cpu.execute_SrcPlugin_addSub[19] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[20] murax.system_cpu.execute_SrcPlugin_addSub[20] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[21] murax.system_cpu.execute_SrcPlugin_addSub[21] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[22] murax.system_cpu.execute_SrcPlugin_addSub[22] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[23] murax.system_cpu.execute_SrcPlugin_addSub[23] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[24] murax.system_cpu.execute_SrcPlugin_addSub[24] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[25] murax.system_cpu.execute_SrcPlugin_addSub[25] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[26] murax.system_cpu.execute_SrcPlugin_addSub[26] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[27] murax.system_cpu.execute_SrcPlugin_addSub[27] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[28] murax.system_cpu.execute_SrcPlugin_addSub[28] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[29] murax.system_cpu.execute_SrcPlugin_addSub[29] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[30] murax.system_cpu.execute_SrcPlugin_addSub[30] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[31] murax.system_cpu.execute_SrcPlugin_addSub[31] 1 1 .names $undef murax.system_cpu.execute_to_memory_BRANCH_CALC[0] 1 1 .names $undef murax.system_cpu.execute_to_memory_BRANCH_CALC[1] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[0] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[1] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[2] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[3] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[4] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[6] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[15] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[16] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[17] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[18] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[19] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[20] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[21] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[22] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[23] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[24] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[25] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[26] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[27] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[30] 1 1 .names $undef murax.system_cpu.execute_to_memory_INSTRUCTION[31] 1 1 .names $false murax.system_cpu.iBus_cmd_payload_pc[0] 1 1 .names $false murax.system_cpu.iBus_cmd_payload_pc[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] murax.system_cpu.iBus_cmd_payload_pc[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] murax.system_cpu.iBus_cmd_payload_pc[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] murax.system_cpu.iBus_cmd_payload_pc[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] murax.system_cpu.iBus_cmd_payload_pc[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] murax.system_cpu.iBus_cmd_payload_pc[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] murax.system_cpu.iBus_cmd_payload_pc[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] murax.system_cpu.iBus_cmd_payload_pc[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] murax.system_cpu.iBus_cmd_payload_pc[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] murax.system_cpu.iBus_cmd_payload_pc[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] murax.system_cpu.iBus_cmd_payload_pc[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] murax.system_cpu.iBus_cmd_payload_pc[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] murax.system_cpu.iBus_cmd_payload_pc[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] murax.system_cpu.iBus_cmd_payload_pc[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] murax.system_cpu.iBus_cmd_payload_pc[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] murax.system_cpu.iBus_cmd_payload_pc[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] murax.system_cpu.iBus_cmd_payload_pc[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] murax.system_cpu.iBus_cmd_payload_pc[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] murax.system_cpu.iBus_cmd_payload_pc[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] murax.system_cpu.iBus_cmd_payload_pc[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] murax.system_cpu.iBus_cmd_payload_pc[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] murax.system_cpu.iBus_cmd_payload_pc[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] murax.system_cpu.iBus_cmd_payload_pc[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] murax.system_cpu.iBus_cmd_payload_pc[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] murax.system_cpu.iBus_cmd_payload_pc[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] murax.system_cpu.iBus_cmd_payload_pc[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] murax.system_cpu.iBus_cmd_payload_pc[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] murax.system_cpu.iBus_cmd_payload_pc[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] murax.system_cpu.iBus_cmd_payload_pc[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] murax.system_cpu.iBus_cmd_payload_pc[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] murax.system_cpu.iBus_cmd_payload_pc[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_cpu.iBus_rsp_payload_inst[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_cpu.iBus_rsp_payload_inst[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_cpu.iBus_rsp_payload_inst[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_cpu.iBus_rsp_payload_inst[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_cpu.iBus_rsp_payload_inst[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_cpu.iBus_rsp_payload_inst[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_cpu.iBus_rsp_payload_inst[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_cpu.iBus_rsp_payload_inst[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_cpu.iBus_rsp_payload_inst[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_cpu.iBus_rsp_payload_inst[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_cpu.iBus_rsp_payload_inst[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_cpu.iBus_rsp_payload_inst[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_cpu.iBus_rsp_payload_inst[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_cpu.iBus_rsp_payload_inst[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_cpu.iBus_rsp_payload_inst[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_cpu.iBus_rsp_payload_inst[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_cpu.iBus_rsp_payload_inst[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_cpu.iBus_rsp_payload_inst[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_cpu.iBus_rsp_payload_inst[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_cpu.iBus_rsp_payload_inst[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_cpu.iBus_rsp_payload_inst[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_cpu.iBus_rsp_payload_inst[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_cpu.iBus_rsp_payload_inst[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_cpu.iBus_rsp_payload_inst[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_cpu.iBus_rsp_payload_inst[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_cpu.iBus_rsp_payload_inst[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_cpu.iBus_rsp_payload_inst[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_cpu.iBus_rsp_payload_inst[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_cpu.iBus_rsp_payload_inst[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_cpu.iBus_rsp_payload_inst[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_cpu.iBus_rsp_payload_inst[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_cpu.iBus_rsp_payload_inst[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_cpu.iBus_rsp_takeWhen_payload_inst[31] 1 1 .names $undef murax.system_cpu.memory_BRANCH_CALC[0] 1 1 .names $undef murax.system_cpu.memory_BRANCH_CALC[1] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[2] murax.system_cpu.memory_BRANCH_CALC[2] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[3] murax.system_cpu.memory_BRANCH_CALC[3] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[4] murax.system_cpu.memory_BRANCH_CALC[4] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[5] murax.system_cpu.memory_BRANCH_CALC[5] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[6] murax.system_cpu.memory_BRANCH_CALC[6] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[7] murax.system_cpu.memory_BRANCH_CALC[7] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[8] murax.system_cpu.memory_BRANCH_CALC[8] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[9] murax.system_cpu.memory_BRANCH_CALC[9] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[10] murax.system_cpu.memory_BRANCH_CALC[10] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[11] murax.system_cpu.memory_BRANCH_CALC[11] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[12] murax.system_cpu.memory_BRANCH_CALC[12] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[13] murax.system_cpu.memory_BRANCH_CALC[13] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[14] murax.system_cpu.memory_BRANCH_CALC[14] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[15] murax.system_cpu.memory_BRANCH_CALC[15] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[16] murax.system_cpu.memory_BRANCH_CALC[16] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[17] murax.system_cpu.memory_BRANCH_CALC[17] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[18] murax.system_cpu.memory_BRANCH_CALC[18] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[19] murax.system_cpu.memory_BRANCH_CALC[19] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[20] murax.system_cpu.memory_BRANCH_CALC[20] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[21] murax.system_cpu.memory_BRANCH_CALC[21] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[22] murax.system_cpu.memory_BRANCH_CALC[22] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[23] murax.system_cpu.memory_BRANCH_CALC[23] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[24] murax.system_cpu.memory_BRANCH_CALC[24] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[25] murax.system_cpu.memory_BRANCH_CALC[25] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[26] murax.system_cpu.memory_BRANCH_CALC[26] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[27] murax.system_cpu.memory_BRANCH_CALC[27] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[28] murax.system_cpu.memory_BRANCH_CALC[28] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[29] murax.system_cpu.memory_BRANCH_CALC[29] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[30] murax.system_cpu.memory_BRANCH_CALC[30] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_CALC[31] murax.system_cpu.memory_BRANCH_CALC[31] 1 1 .names murax.system_cpu.execute_to_memory_BRANCH_DO murax.system_cpu.memory_BRANCH_DO 1 1 .names murax.system_cpu.execute_to_memory_ENV_CTRL murax.system_cpu.memory_ENV_CTRL 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[0] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[1] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[2] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[3] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[4] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[5] murax.system_cpu.memory_INSTRUCTION[5] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[6] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[7] murax.system_cpu.memory_INSTRUCTION[7] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[8] murax.system_cpu.memory_INSTRUCTION[8] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[9] murax.system_cpu.memory_INSTRUCTION[9] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[10] murax.system_cpu.memory_INSTRUCTION[10] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[11] murax.system_cpu.memory_INSTRUCTION[11] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[12] murax.system_cpu.memory_INSTRUCTION[12] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[13] murax.system_cpu.memory_INSTRUCTION[13] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[14] murax.system_cpu.memory_INSTRUCTION[14] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[15] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[16] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[17] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[18] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[19] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[20] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[21] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[22] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[23] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[24] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[25] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[26] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[27] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[28] murax.system_cpu.memory_INSTRUCTION[28] 1 1 .names murax.system_cpu.execute_to_memory_INSTRUCTION[29] murax.system_cpu.memory_INSTRUCTION[29] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[30] 1 1 .names $undef murax.system_cpu.memory_INSTRUCTION[31] 1 1 .names murax.system_cpu.execute_to_memory_MEMORY_ADDRESS_LOW[0] murax.system_cpu.memory_MEMORY_ADDRESS_LOW[0] 1 1 .names murax.system_cpu.execute_to_memory_MEMORY_ADDRESS_LOW[1] murax.system_cpu.memory_MEMORY_ADDRESS_LOW[1] 1 1 .names murax.system_cpu.execute_to_memory_MEMORY_ENABLE murax.system_cpu.memory_MEMORY_ENABLE 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_cpu.memory_MEMORY_READ_DATA[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_cpu.memory_MEMORY_READ_DATA[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_cpu.memory_MEMORY_READ_DATA[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_cpu.memory_MEMORY_READ_DATA[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_cpu.memory_MEMORY_READ_DATA[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_cpu.memory_MEMORY_READ_DATA[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_cpu.memory_MEMORY_READ_DATA[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_cpu.memory_MEMORY_READ_DATA[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_cpu.memory_MEMORY_READ_DATA[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_cpu.memory_MEMORY_READ_DATA[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_cpu.memory_MEMORY_READ_DATA[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_cpu.memory_MEMORY_READ_DATA[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_cpu.memory_MEMORY_READ_DATA[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_cpu.memory_MEMORY_READ_DATA[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_cpu.memory_MEMORY_READ_DATA[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_cpu.memory_MEMORY_READ_DATA[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_cpu.memory_MEMORY_READ_DATA[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_cpu.memory_MEMORY_READ_DATA[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_cpu.memory_MEMORY_READ_DATA[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_cpu.memory_MEMORY_READ_DATA[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_cpu.memory_MEMORY_READ_DATA[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_cpu.memory_MEMORY_READ_DATA[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_cpu.memory_MEMORY_READ_DATA[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_cpu.memory_MEMORY_READ_DATA[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_cpu.memory_MEMORY_READ_DATA[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_cpu.memory_MEMORY_READ_DATA[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_cpu.memory_MEMORY_READ_DATA[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_cpu.memory_MEMORY_READ_DATA[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_cpu.memory_MEMORY_READ_DATA[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_cpu.memory_MEMORY_READ_DATA[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_cpu.memory_MEMORY_READ_DATA[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_cpu.memory_MEMORY_READ_DATA[31] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[0] murax.system_cpu.memory_REGFILE_WRITE_DATA[0] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[1] murax.system_cpu.memory_REGFILE_WRITE_DATA[1] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[2] murax.system_cpu.memory_REGFILE_WRITE_DATA[2] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[3] murax.system_cpu.memory_REGFILE_WRITE_DATA[3] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[4] murax.system_cpu.memory_REGFILE_WRITE_DATA[4] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[5] murax.system_cpu.memory_REGFILE_WRITE_DATA[5] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[6] murax.system_cpu.memory_REGFILE_WRITE_DATA[6] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[7] murax.system_cpu.memory_REGFILE_WRITE_DATA[7] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[8] murax.system_cpu.memory_REGFILE_WRITE_DATA[8] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[9] murax.system_cpu.memory_REGFILE_WRITE_DATA[9] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[10] murax.system_cpu.memory_REGFILE_WRITE_DATA[10] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[11] murax.system_cpu.memory_REGFILE_WRITE_DATA[11] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[12] murax.system_cpu.memory_REGFILE_WRITE_DATA[12] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[13] murax.system_cpu.memory_REGFILE_WRITE_DATA[13] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[14] murax.system_cpu.memory_REGFILE_WRITE_DATA[14] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[15] murax.system_cpu.memory_REGFILE_WRITE_DATA[15] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[16] murax.system_cpu.memory_REGFILE_WRITE_DATA[16] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[17] murax.system_cpu.memory_REGFILE_WRITE_DATA[17] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[18] murax.system_cpu.memory_REGFILE_WRITE_DATA[18] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[19] murax.system_cpu.memory_REGFILE_WRITE_DATA[19] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[20] murax.system_cpu.memory_REGFILE_WRITE_DATA[20] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[21] murax.system_cpu.memory_REGFILE_WRITE_DATA[21] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[22] murax.system_cpu.memory_REGFILE_WRITE_DATA[22] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[23] murax.system_cpu.memory_REGFILE_WRITE_DATA[23] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[24] murax.system_cpu.memory_REGFILE_WRITE_DATA[24] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[25] murax.system_cpu.memory_REGFILE_WRITE_DATA[25] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[26] murax.system_cpu.memory_REGFILE_WRITE_DATA[26] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[27] murax.system_cpu.memory_REGFILE_WRITE_DATA[27] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[28] murax.system_cpu.memory_REGFILE_WRITE_DATA[28] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[29] murax.system_cpu.memory_REGFILE_WRITE_DATA[29] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[30] murax.system_cpu.memory_REGFILE_WRITE_DATA[30] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_DATA[31] murax.system_cpu.memory_REGFILE_WRITE_DATA[31] 1 1 .names murax.system_cpu.execute_to_memory_REGFILE_WRITE_VALID murax.system_cpu.memory_REGFILE_WRITE_VALID 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[0] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[1] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[2] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[3] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[4] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[5] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[6] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[15] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[16] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[17] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[18] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[19] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[20] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[21] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[22] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[23] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[24] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[25] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[26] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[27] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[30] 1 1 .names $undef murax.system_cpu.memory_to_writeBack_INSTRUCTION[31] 1 1 .names io_mainClk murax.system_cpu.toplevel_io_mainClk 1 1 .names murax.resetCtrl_mainClkReset murax.system_cpu.toplevel_resetCtrl_mainClkReset 1 1 .names murax.resetCtrl_systemReset murax.system_cpu.toplevel_resetCtrl_systemReset 1 1 .names murax.system_cpu._zz_105_[0] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[0] 1 1 .names murax.system_cpu._zz_105_[1] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[1] 1 1 .names murax.system_cpu._zz_105_[2] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[2] 1 1 .names murax.system_cpu._zz_105_[3] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[3] 1 1 .names murax.system_cpu._zz_105_[4] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[4] 1 1 .names murax.system_cpu._zz_105_[5] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[5] 1 1 .names murax.system_cpu._zz_105_[6] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[6] 1 1 .names murax.system_cpu._zz_105_[7] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[7] 1 1 .names murax.system_cpu._zz_107_[8] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[8] 1 1 .names murax.system_cpu._zz_107_[9] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[9] 1 1 .names murax.system_cpu._zz_107_[10] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[10] 1 1 .names murax.system_cpu._zz_107_[11] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[11] 1 1 .names murax.system_cpu._zz_107_[12] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[12] 1 1 .names murax.system_cpu._zz_107_[13] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[13] 1 1 .names murax.system_cpu._zz_107_[14] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[14] 1 1 .names murax.system_cpu._zz_107_[15] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[15] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[16] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[16] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[17] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[17] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[18] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[18] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[19] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[19] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[20] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[20] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[21] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[21] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[22] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[22] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[23] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[23] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[24] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[24] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[25] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[25] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[26] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[26] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[27] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[27] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[28] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[28] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[29] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[29] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[30] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[30] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[31] murax.system_cpu.writeBack_DBusSimplePlugin_rspShifted[31] 1 1 .names murax.system_cpu.memory_to_writeBack_ENV_CTRL murax.system_cpu.writeBack_ENV_CTRL 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[0] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[1] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[2] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[3] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[4] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[5] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[6] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] murax.system_cpu.writeBack_INSTRUCTION[7] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] murax.system_cpu.writeBack_INSTRUCTION[8] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] murax.system_cpu.writeBack_INSTRUCTION[9] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] murax.system_cpu.writeBack_INSTRUCTION[10] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] murax.system_cpu.writeBack_INSTRUCTION[11] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[12] murax.system_cpu.writeBack_INSTRUCTION[12] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[13] murax.system_cpu.writeBack_INSTRUCTION[13] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[14] murax.system_cpu.writeBack_INSTRUCTION[14] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[15] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[16] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[17] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[18] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[19] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[20] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[21] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[22] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[23] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[24] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[25] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[26] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[27] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[28] murax.system_cpu.writeBack_INSTRUCTION[28] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[29] murax.system_cpu.writeBack_INSTRUCTION[29] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[30] 1 1 .names $undef murax.system_cpu.writeBack_INSTRUCTION[31] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[0] murax.system_cpu.writeBack_MEMORY_ADDRESS_LOW[0] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_ADDRESS_LOW[1] murax.system_cpu.writeBack_MEMORY_ADDRESS_LOW[1] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_ENABLE murax.system_cpu.writeBack_MEMORY_ENABLE 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[0] murax.system_cpu.writeBack_MEMORY_READ_DATA[0] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[1] murax.system_cpu.writeBack_MEMORY_READ_DATA[1] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[2] murax.system_cpu.writeBack_MEMORY_READ_DATA[2] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[3] murax.system_cpu.writeBack_MEMORY_READ_DATA[3] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[4] murax.system_cpu.writeBack_MEMORY_READ_DATA[4] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[5] murax.system_cpu.writeBack_MEMORY_READ_DATA[5] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[6] murax.system_cpu.writeBack_MEMORY_READ_DATA[6] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[7] murax.system_cpu.writeBack_MEMORY_READ_DATA[7] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[8] murax.system_cpu.writeBack_MEMORY_READ_DATA[8] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[9] murax.system_cpu.writeBack_MEMORY_READ_DATA[9] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[10] murax.system_cpu.writeBack_MEMORY_READ_DATA[10] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[11] murax.system_cpu.writeBack_MEMORY_READ_DATA[11] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[12] murax.system_cpu.writeBack_MEMORY_READ_DATA[12] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[13] murax.system_cpu.writeBack_MEMORY_READ_DATA[13] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[14] murax.system_cpu.writeBack_MEMORY_READ_DATA[14] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[15] murax.system_cpu.writeBack_MEMORY_READ_DATA[15] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[16] murax.system_cpu.writeBack_MEMORY_READ_DATA[16] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[17] murax.system_cpu.writeBack_MEMORY_READ_DATA[17] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[18] murax.system_cpu.writeBack_MEMORY_READ_DATA[18] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[19] murax.system_cpu.writeBack_MEMORY_READ_DATA[19] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[20] murax.system_cpu.writeBack_MEMORY_READ_DATA[20] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[21] murax.system_cpu.writeBack_MEMORY_READ_DATA[21] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[22] murax.system_cpu.writeBack_MEMORY_READ_DATA[22] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[23] murax.system_cpu.writeBack_MEMORY_READ_DATA[23] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[24] murax.system_cpu.writeBack_MEMORY_READ_DATA[24] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[25] murax.system_cpu.writeBack_MEMORY_READ_DATA[25] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[26] murax.system_cpu.writeBack_MEMORY_READ_DATA[26] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[27] murax.system_cpu.writeBack_MEMORY_READ_DATA[27] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[28] murax.system_cpu.writeBack_MEMORY_READ_DATA[28] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[29] murax.system_cpu.writeBack_MEMORY_READ_DATA[29] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[30] murax.system_cpu.writeBack_MEMORY_READ_DATA[30] 1 1 .names murax.system_cpu.memory_to_writeBack_MEMORY_READ_DATA[31] murax.system_cpu.writeBack_MEMORY_READ_DATA[31] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[0] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[0] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[1] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[1] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[2] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[2] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[3] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[3] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[4] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[4] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[5] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[5] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[6] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[6] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[7] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[7] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[8] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[8] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[9] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[9] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[10] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[10] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[11] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[11] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[12] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[12] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[13] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[13] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[14] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[14] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[15] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[15] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[16] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[16] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[17] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[17] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[18] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[18] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[19] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[19] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[20] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[20] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[21] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[21] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[22] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[22] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[23] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[23] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[24] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[24] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[25] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[25] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[26] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[26] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[27] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[27] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[28] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[28] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[29] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[29] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[30] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[30] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_DATA[31] murax.system_cpu.writeBack_REGFILE_WRITE_DATA[31] 1 1 .names murax.system_cpu.memory_to_writeBack_REGFILE_WRITE_VALID murax.system_cpu.writeBack_REGFILE_WRITE_VALID 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[7] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_address[0] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[8] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_address[1] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[9] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_address[2] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[10] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_address[3] 1 1 .names murax.system_cpu.memory_to_writeBack_INSTRUCTION[11] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_address[4] 1 1 .names murax.system_cpu._zz_66_[0] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[0] 1 1 .names murax.system_cpu._zz_66_[1] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[1] 1 1 .names murax.system_cpu._zz_66_[2] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[2] 1 1 .names murax.system_cpu._zz_66_[3] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[3] 1 1 .names murax.system_cpu._zz_66_[4] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[4] 1 1 .names murax.system_cpu._zz_66_[5] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[5] 1 1 .names murax.system_cpu._zz_66_[6] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[6] 1 1 .names murax.system_cpu._zz_66_[7] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[7] 1 1 .names murax.system_cpu._zz_66_[8] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[8] 1 1 .names murax.system_cpu._zz_66_[9] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[9] 1 1 .names murax.system_cpu._zz_66_[10] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[10] 1 1 .names murax.system_cpu._zz_66_[11] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[11] 1 1 .names murax.system_cpu._zz_66_[12] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[12] 1 1 .names murax.system_cpu._zz_66_[13] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[13] 1 1 .names murax.system_cpu._zz_66_[14] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[14] 1 1 .names murax.system_cpu._zz_66_[15] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[15] 1 1 .names murax.system_cpu._zz_66_[16] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[16] 1 1 .names murax.system_cpu._zz_66_[17] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[17] 1 1 .names murax.system_cpu._zz_66_[18] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[18] 1 1 .names murax.system_cpu._zz_66_[19] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[19] 1 1 .names murax.system_cpu._zz_66_[20] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[20] 1 1 .names murax.system_cpu._zz_66_[21] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[21] 1 1 .names murax.system_cpu._zz_66_[22] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[22] 1 1 .names murax.system_cpu._zz_66_[23] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[23] 1 1 .names murax.system_cpu._zz_66_[24] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[24] 1 1 .names murax.system_cpu._zz_66_[25] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[25] 1 1 .names murax.system_cpu._zz_66_[26] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[26] 1 1 .names murax.system_cpu._zz_66_[27] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[27] 1 1 .names murax.system_cpu._zz_66_[28] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[28] 1 1 .names murax.system_cpu._zz_66_[29] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[29] 1 1 .names murax.system_cpu._zz_66_[30] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[30] 1 1 .names murax.system_cpu._zz_66_[31] murax.system_cpu.writeBack_RegFilePlugin_regFileWrite_payload_data[31] 1 1 .names murax.system_cpu.writeBack_arbitration_isValid murax.system_cpu.writeBack_arbitration_isFiring 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[0] murax.system_cpu_dBus_cmd_halfPipe_payload_address[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[1] murax.system_cpu_dBus_cmd_halfPipe_payload_address[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[2] murax.system_cpu_dBus_cmd_halfPipe_payload_address[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[3] murax.system_cpu_dBus_cmd_halfPipe_payload_address[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[4] murax.system_cpu_dBus_cmd_halfPipe_payload_address[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[5] murax.system_cpu_dBus_cmd_halfPipe_payload_address[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[6] murax.system_cpu_dBus_cmd_halfPipe_payload_address[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[7] murax.system_cpu_dBus_cmd_halfPipe_payload_address[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[8] murax.system_cpu_dBus_cmd_halfPipe_payload_address[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[9] murax.system_cpu_dBus_cmd_halfPipe_payload_address[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[10] murax.system_cpu_dBus_cmd_halfPipe_payload_address[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[11] murax.system_cpu_dBus_cmd_halfPipe_payload_address[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[12] murax.system_cpu_dBus_cmd_halfPipe_payload_address[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[13] murax.system_cpu_dBus_cmd_halfPipe_payload_address[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[14] murax.system_cpu_dBus_cmd_halfPipe_payload_address[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[15] murax.system_cpu_dBus_cmd_halfPipe_payload_address[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[16] murax.system_cpu_dBus_cmd_halfPipe_payload_address[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[17] murax.system_cpu_dBus_cmd_halfPipe_payload_address[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[18] murax.system_cpu_dBus_cmd_halfPipe_payload_address[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[19] murax.system_cpu_dBus_cmd_halfPipe_payload_address[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[20] murax.system_cpu_dBus_cmd_halfPipe_payload_address[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[21] murax.system_cpu_dBus_cmd_halfPipe_payload_address[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[22] murax.system_cpu_dBus_cmd_halfPipe_payload_address[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[23] murax.system_cpu_dBus_cmd_halfPipe_payload_address[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[24] murax.system_cpu_dBus_cmd_halfPipe_payload_address[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[25] murax.system_cpu_dBus_cmd_halfPipe_payload_address[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[26] murax.system_cpu_dBus_cmd_halfPipe_payload_address[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[27] murax.system_cpu_dBus_cmd_halfPipe_payload_address[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[28] murax.system_cpu_dBus_cmd_halfPipe_payload_address[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[29] murax.system_cpu_dBus_cmd_halfPipe_payload_address[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[30] murax.system_cpu_dBus_cmd_halfPipe_payload_address[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[31] murax.system_cpu_dBus_cmd_halfPipe_payload_address[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] murax.system_cpu_dBus_cmd_halfPipe_payload_data[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] murax.system_cpu_dBus_cmd_halfPipe_payload_data[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] murax.system_cpu_dBus_cmd_halfPipe_payload_data[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] murax.system_cpu_dBus_cmd_halfPipe_payload_data[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] murax.system_cpu_dBus_cmd_halfPipe_payload_data[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] murax.system_cpu_dBus_cmd_halfPipe_payload_data[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] murax.system_cpu_dBus_cmd_halfPipe_payload_data[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] murax.system_cpu_dBus_cmd_halfPipe_payload_data[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] murax.system_cpu_dBus_cmd_halfPipe_payload_data[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] murax.system_cpu_dBus_cmd_halfPipe_payload_data[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] murax.system_cpu_dBus_cmd_halfPipe_payload_data[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] murax.system_cpu_dBus_cmd_halfPipe_payload_data[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] murax.system_cpu_dBus_cmd_halfPipe_payload_data[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] murax.system_cpu_dBus_cmd_halfPipe_payload_data[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] murax.system_cpu_dBus_cmd_halfPipe_payload_data[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] murax.system_cpu_dBus_cmd_halfPipe_payload_data[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] murax.system_cpu_dBus_cmd_halfPipe_payload_data[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] murax.system_cpu_dBus_cmd_halfPipe_payload_data[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] murax.system_cpu_dBus_cmd_halfPipe_payload_data[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] murax.system_cpu_dBus_cmd_halfPipe_payload_data[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] murax.system_cpu_dBus_cmd_halfPipe_payload_data[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] murax.system_cpu_dBus_cmd_halfPipe_payload_data[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] murax.system_cpu_dBus_cmd_halfPipe_payload_data[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] murax.system_cpu_dBus_cmd_halfPipe_payload_data[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] murax.system_cpu_dBus_cmd_halfPipe_payload_data[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] murax.system_cpu_dBus_cmd_halfPipe_payload_data[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] murax.system_cpu_dBus_cmd_halfPipe_payload_data[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] murax.system_cpu_dBus_cmd_halfPipe_payload_data[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] murax.system_cpu_dBus_cmd_halfPipe_payload_data[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] murax.system_cpu_dBus_cmd_halfPipe_payload_data[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] murax.system_cpu_dBus_cmd_halfPipe_payload_data[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] murax.system_cpu_dBus_cmd_halfPipe_payload_data[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[0] murax.system_cpu_dBus_cmd_halfPipe_payload_size[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[1] murax.system_cpu_dBus_cmd_halfPipe_payload_size[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_wr murax.system_cpu_dBus_cmd_halfPipe_payload_wr 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_valid murax.system_cpu_dBus_cmd_halfPipe_valid 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[0] murax.system_cpu_dBus_cmd_payload_address[0] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[1] murax.system_cpu_dBus_cmd_payload_address[1] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[2] murax.system_cpu_dBus_cmd_payload_address[2] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[3] murax.system_cpu_dBus_cmd_payload_address[3] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[4] murax.system_cpu_dBus_cmd_payload_address[4] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[5] murax.system_cpu_dBus_cmd_payload_address[5] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[6] murax.system_cpu_dBus_cmd_payload_address[6] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[7] murax.system_cpu_dBus_cmd_payload_address[7] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[8] murax.system_cpu_dBus_cmd_payload_address[8] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[9] murax.system_cpu_dBus_cmd_payload_address[9] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[10] murax.system_cpu_dBus_cmd_payload_address[10] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[11] murax.system_cpu_dBus_cmd_payload_address[11] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[12] murax.system_cpu_dBus_cmd_payload_address[12] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[13] murax.system_cpu_dBus_cmd_payload_address[13] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[14] murax.system_cpu_dBus_cmd_payload_address[14] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[15] murax.system_cpu_dBus_cmd_payload_address[15] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[16] murax.system_cpu_dBus_cmd_payload_address[16] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[17] murax.system_cpu_dBus_cmd_payload_address[17] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[18] murax.system_cpu_dBus_cmd_payload_address[18] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[19] murax.system_cpu_dBus_cmd_payload_address[19] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[20] murax.system_cpu_dBus_cmd_payload_address[20] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[21] murax.system_cpu_dBus_cmd_payload_address[21] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[22] murax.system_cpu_dBus_cmd_payload_address[22] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[23] murax.system_cpu_dBus_cmd_payload_address[23] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[24] murax.system_cpu_dBus_cmd_payload_address[24] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[25] murax.system_cpu_dBus_cmd_payload_address[25] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[26] murax.system_cpu_dBus_cmd_payload_address[26] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[27] murax.system_cpu_dBus_cmd_payload_address[27] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[28] murax.system_cpu_dBus_cmd_payload_address[28] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[29] murax.system_cpu_dBus_cmd_payload_address[29] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[30] murax.system_cpu_dBus_cmd_payload_address[30] 1 1 .names murax.system_cpu.execute_SRC_ADD_SUB[31] murax.system_cpu_dBus_cmd_payload_address[31] 1 1 .names murax.system_cpu.decode_to_execute_RS2[0] murax.system_cpu_dBus_cmd_payload_data[0] 1 1 .names murax.system_cpu.decode_to_execute_RS2[1] murax.system_cpu_dBus_cmd_payload_data[1] 1 1 .names murax.system_cpu.decode_to_execute_RS2[2] murax.system_cpu_dBus_cmd_payload_data[2] 1 1 .names murax.system_cpu.decode_to_execute_RS2[3] murax.system_cpu_dBus_cmd_payload_data[3] 1 1 .names murax.system_cpu.decode_to_execute_RS2[4] murax.system_cpu_dBus_cmd_payload_data[4] 1 1 .names murax.system_cpu.decode_to_execute_RS2[5] murax.system_cpu_dBus_cmd_payload_data[5] 1 1 .names murax.system_cpu.decode_to_execute_RS2[6] murax.system_cpu_dBus_cmd_payload_data[6] 1 1 .names murax.system_cpu.decode_to_execute_RS2[7] murax.system_cpu_dBus_cmd_payload_data[7] 1 1 .names murax.system_cpu.decode_to_execute_INSTRUCTION[12] murax.system_cpu_dBus_cmd_payload_size[0] 1 1 .names murax.system_cpu._zz_165_ murax.system_cpu_dBus_cmd_payload_size[1] 1 1 .names murax.system_cpu.dBus_cmd_payload_wr murax.system_cpu_dBus_cmd_payload_wr 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[0] murax.system_cpu_debug_bus_rsp_data[0] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[1] murax.system_cpu_debug_bus_rsp_data[1] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[2] murax.system_cpu_debug_bus_rsp_data[2] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[3] murax.system_cpu_debug_bus_rsp_data[3] 1 1 .names murax.jtagBridge_1_.io_remote_rsp_payload_data[4] murax.system_cpu_debug_bus_rsp_data[4] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[5] murax.system_cpu_debug_bus_rsp_data[5] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[6] murax.system_cpu_debug_bus_rsp_data[6] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[7] murax.system_cpu_debug_bus_rsp_data[7] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[8] murax.system_cpu_debug_bus_rsp_data[8] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[9] murax.system_cpu_debug_bus_rsp_data[9] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[10] murax.system_cpu_debug_bus_rsp_data[10] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[11] murax.system_cpu_debug_bus_rsp_data[11] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[12] murax.system_cpu_debug_bus_rsp_data[12] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[13] murax.system_cpu_debug_bus_rsp_data[13] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[14] murax.system_cpu_debug_bus_rsp_data[14] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[15] murax.system_cpu_debug_bus_rsp_data[15] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[16] murax.system_cpu_debug_bus_rsp_data[16] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[17] murax.system_cpu_debug_bus_rsp_data[17] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[18] murax.system_cpu_debug_bus_rsp_data[18] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[19] murax.system_cpu_debug_bus_rsp_data[19] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[20] murax.system_cpu_debug_bus_rsp_data[20] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[21] murax.system_cpu_debug_bus_rsp_data[21] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[22] murax.system_cpu_debug_bus_rsp_data[22] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[23] murax.system_cpu_debug_bus_rsp_data[23] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[24] murax.system_cpu_debug_bus_rsp_data[24] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[25] murax.system_cpu_debug_bus_rsp_data[25] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[26] murax.system_cpu_debug_bus_rsp_data[26] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[27] murax.system_cpu_debug_bus_rsp_data[27] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[28] murax.system_cpu_debug_bus_rsp_data[28] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[29] murax.system_cpu_debug_bus_rsp_data[29] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[30] murax.system_cpu_debug_bus_rsp_data[30] 1 1 .names murax.system_cpu.DebugPlugin_busReadDataReg[31] murax.system_cpu_debug_bus_rsp_data[31] 1 1 .names murax.system_cpu.DebugPlugin_resetIt_regNext murax.system_cpu_debug_resetOut 1 1 .names $false murax.system_cpu_iBus_cmd_payload_pc[0] 1 1 .names $false murax.system_cpu_iBus_cmd_payload_pc[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] murax.system_cpu_iBus_cmd_payload_pc[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] murax.system_cpu_iBus_cmd_payload_pc[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] murax.system_cpu_iBus_cmd_payload_pc[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] murax.system_cpu_iBus_cmd_payload_pc[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] murax.system_cpu_iBus_cmd_payload_pc[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] murax.system_cpu_iBus_cmd_payload_pc[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] murax.system_cpu_iBus_cmd_payload_pc[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] murax.system_cpu_iBus_cmd_payload_pc[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] murax.system_cpu_iBus_cmd_payload_pc[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] murax.system_cpu_iBus_cmd_payload_pc[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] murax.system_cpu_iBus_cmd_payload_pc[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] murax.system_cpu_iBus_cmd_payload_pc[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] murax.system_cpu_iBus_cmd_payload_pc[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] murax.system_cpu_iBus_cmd_payload_pc[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] murax.system_cpu_iBus_cmd_payload_pc[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] murax.system_cpu_iBus_cmd_payload_pc[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] murax.system_cpu_iBus_cmd_payload_pc[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] murax.system_cpu_iBus_cmd_payload_pc[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] murax.system_cpu_iBus_cmd_payload_pc[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] murax.system_cpu_iBus_cmd_payload_pc[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] murax.system_cpu_iBus_cmd_payload_pc[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] murax.system_cpu_iBus_cmd_payload_pc[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] murax.system_cpu_iBus_cmd_payload_pc[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] murax.system_cpu_iBus_cmd_payload_pc[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] murax.system_cpu_iBus_cmd_payload_pc[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] murax.system_cpu_iBus_cmd_payload_pc[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] murax.system_cpu_iBus_cmd_payload_pc[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] murax.system_cpu_iBus_cmd_payload_pc[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] murax.system_cpu_iBus_cmd_payload_pc[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] murax.system_cpu_iBus_cmd_payload_pc[31] 1 1 .names io_mainClk murax.system_drygascon128.core.clk 1 1 .names murax.system_drygascon128.core.c[32] murax.system_drygascon128.core.core_in[32] 1 1 .names murax.system_drygascon128.core.c[33] murax.system_drygascon128.core.core_in[33] 1 1 .names murax.system_drygascon128.core.c[34] murax.system_drygascon128.core.core_in[34] 1 1 .names murax.system_drygascon128.core.c[35] murax.system_drygascon128.core.core_in[35] 1 1 .names murax.system_drygascon128.core.c[36] murax.system_drygascon128.core.core_in[36] 1 1 .names murax.system_drygascon128.core.c[37] murax.system_drygascon128.core.core_in[37] 1 1 .names murax.system_drygascon128.core.c[38] murax.system_drygascon128.core.core_in[38] 1 1 .names murax.system_drygascon128.core.c[39] murax.system_drygascon128.core.core_in[39] 1 1 .names murax.system_drygascon128.core.c[40] murax.system_drygascon128.core.core_in[40] 1 1 .names murax.system_drygascon128.core.c[41] murax.system_drygascon128.core.core_in[41] 1 1 .names murax.system_drygascon128.core.c[42] murax.system_drygascon128.core.core_in[42] 1 1 .names murax.system_drygascon128.core.c[43] murax.system_drygascon128.core.core_in[43] 1 1 .names murax.system_drygascon128.core.c[44] murax.system_drygascon128.core.core_in[44] 1 1 .names murax.system_drygascon128.core.c[45] murax.system_drygascon128.core.core_in[45] 1 1 .names murax.system_drygascon128.core.c[46] murax.system_drygascon128.core.core_in[46] 1 1 .names murax.system_drygascon128.core.c[47] murax.system_drygascon128.core.core_in[47] 1 1 .names murax.system_drygascon128.core.c[48] murax.system_drygascon128.core.core_in[48] 1 1 .names murax.system_drygascon128.core.c[49] murax.system_drygascon128.core.core_in[49] 1 1 .names murax.system_drygascon128.core.c[50] murax.system_drygascon128.core.core_in[50] 1 1 .names murax.system_drygascon128.core.c[51] murax.system_drygascon128.core.core_in[51] 1 1 .names murax.system_drygascon128.core.c[52] murax.system_drygascon128.core.core_in[52] 1 1 .names murax.system_drygascon128.core.c[53] murax.system_drygascon128.core.core_in[53] 1 1 .names murax.system_drygascon128.core.c[54] murax.system_drygascon128.core.core_in[54] 1 1 .names murax.system_drygascon128.core.c[55] murax.system_drygascon128.core.core_in[55] 1 1 .names murax.system_drygascon128.core.c[56] murax.system_drygascon128.core.core_in[56] 1 1 .names murax.system_drygascon128.core.c[57] murax.system_drygascon128.core.core_in[57] 1 1 .names murax.system_drygascon128.core.c[58] murax.system_drygascon128.core.core_in[58] 1 1 .names murax.system_drygascon128.core.c[59] murax.system_drygascon128.core.core_in[59] 1 1 .names murax.system_drygascon128.core.c[60] murax.system_drygascon128.core.core_in[60] 1 1 .names murax.system_drygascon128.core.c[61] murax.system_drygascon128.core.core_in[61] 1 1 .names murax.system_drygascon128.core.c[62] murax.system_drygascon128.core.core_in[62] 1 1 .names murax.system_drygascon128.core.c[63] murax.system_drygascon128.core.core_in[63] 1 1 .names murax.system_drygascon128.core.c[96] murax.system_drygascon128.core.core_in[96] 1 1 .names murax.system_drygascon128.core.c[97] murax.system_drygascon128.core.core_in[97] 1 1 .names murax.system_drygascon128.core.c[98] murax.system_drygascon128.core.core_in[98] 1 1 .names murax.system_drygascon128.core.c[99] murax.system_drygascon128.core.core_in[99] 1 1 .names murax.system_drygascon128.core.c[100] murax.system_drygascon128.core.core_in[100] 1 1 .names murax.system_drygascon128.core.c[101] murax.system_drygascon128.core.core_in[101] 1 1 .names murax.system_drygascon128.core.c[102] murax.system_drygascon128.core.core_in[102] 1 1 .names murax.system_drygascon128.core.c[103] murax.system_drygascon128.core.core_in[103] 1 1 .names murax.system_drygascon128.core.c[104] murax.system_drygascon128.core.core_in[104] 1 1 .names murax.system_drygascon128.core.c[105] murax.system_drygascon128.core.core_in[105] 1 1 .names murax.system_drygascon128.core.c[106] murax.system_drygascon128.core.core_in[106] 1 1 .names murax.system_drygascon128.core.c[107] murax.system_drygascon128.core.core_in[107] 1 1 .names murax.system_drygascon128.core.c[108] murax.system_drygascon128.core.core_in[108] 1 1 .names murax.system_drygascon128.core.c[109] murax.system_drygascon128.core.core_in[109] 1 1 .names murax.system_drygascon128.core.c[110] murax.system_drygascon128.core.core_in[110] 1 1 .names murax.system_drygascon128.core.c[111] murax.system_drygascon128.core.core_in[111] 1 1 .names murax.system_drygascon128.core.c[112] murax.system_drygascon128.core.core_in[112] 1 1 .names murax.system_drygascon128.core.c[113] murax.system_drygascon128.core.core_in[113] 1 1 .names murax.system_drygascon128.core.c[114] murax.system_drygascon128.core.core_in[114] 1 1 .names murax.system_drygascon128.core.c[115] murax.system_drygascon128.core.core_in[115] 1 1 .names murax.system_drygascon128.core.c[116] murax.system_drygascon128.core.core_in[116] 1 1 .names murax.system_drygascon128.core.c[117] murax.system_drygascon128.core.core_in[117] 1 1 .names murax.system_drygascon128.core.c[118] murax.system_drygascon128.core.core_in[118] 1 1 .names murax.system_drygascon128.core.c[119] murax.system_drygascon128.core.core_in[119] 1 1 .names murax.system_drygascon128.core.c[120] murax.system_drygascon128.core.core_in[120] 1 1 .names murax.system_drygascon128.core.c[121] murax.system_drygascon128.core.core_in[121] 1 1 .names murax.system_drygascon128.core.c[122] murax.system_drygascon128.core.core_in[122] 1 1 .names murax.system_drygascon128.core.c[123] murax.system_drygascon128.core.core_in[123] 1 1 .names murax.system_drygascon128.core.c[124] murax.system_drygascon128.core.core_in[124] 1 1 .names murax.system_drygascon128.core.c[125] murax.system_drygascon128.core.core_in[125] 1 1 .names murax.system_drygascon128.core.c[126] murax.system_drygascon128.core.core_in[126] 1 1 .names murax.system_drygascon128.core.c[127] murax.system_drygascon128.core.core_in[127] 1 1 .names murax.system_drygascon128.core.c[160] murax.system_drygascon128.core.core_in[160] 1 1 .names murax.system_drygascon128.core.c[161] murax.system_drygascon128.core.core_in[161] 1 1 .names murax.system_drygascon128.core.c[162] murax.system_drygascon128.core.core_in[162] 1 1 .names murax.system_drygascon128.core.c[163] murax.system_drygascon128.core.core_in[163] 1 1 .names murax.system_drygascon128.core.c[164] murax.system_drygascon128.core.core_in[164] 1 1 .names murax.system_drygascon128.core.c[165] murax.system_drygascon128.core.core_in[165] 1 1 .names murax.system_drygascon128.core.c[166] murax.system_drygascon128.core.core_in[166] 1 1 .names murax.system_drygascon128.core.c[167] murax.system_drygascon128.core.core_in[167] 1 1 .names murax.system_drygascon128.core.c[168] murax.system_drygascon128.core.core_in[168] 1 1 .names murax.system_drygascon128.core.c[169] murax.system_drygascon128.core.core_in[169] 1 1 .names murax.system_drygascon128.core.c[170] murax.system_drygascon128.core.core_in[170] 1 1 .names murax.system_drygascon128.core.c[171] murax.system_drygascon128.core.core_in[171] 1 1 .names murax.system_drygascon128.core.c[172] murax.system_drygascon128.core.core_in[172] 1 1 .names murax.system_drygascon128.core.c[173] murax.system_drygascon128.core.core_in[173] 1 1 .names murax.system_drygascon128.core.c[174] murax.system_drygascon128.core.core_in[174] 1 1 .names murax.system_drygascon128.core.c[175] murax.system_drygascon128.core.core_in[175] 1 1 .names murax.system_drygascon128.core.c[176] murax.system_drygascon128.core.core_in[176] 1 1 .names murax.system_drygascon128.core.c[177] murax.system_drygascon128.core.core_in[177] 1 1 .names murax.system_drygascon128.core.c[178] murax.system_drygascon128.core.core_in[178] 1 1 .names murax.system_drygascon128.core.c[179] murax.system_drygascon128.core.core_in[179] 1 1 .names murax.system_drygascon128.core.c[180] murax.system_drygascon128.core.core_in[180] 1 1 .names murax.system_drygascon128.core.c[181] murax.system_drygascon128.core.core_in[181] 1 1 .names murax.system_drygascon128.core.c[182] murax.system_drygascon128.core.core_in[182] 1 1 .names murax.system_drygascon128.core.c[183] murax.system_drygascon128.core.core_in[183] 1 1 .names murax.system_drygascon128.core.c[184] murax.system_drygascon128.core.core_in[184] 1 1 .names murax.system_drygascon128.core.c[185] murax.system_drygascon128.core.core_in[185] 1 1 .names murax.system_drygascon128.core.c[186] murax.system_drygascon128.core.core_in[186] 1 1 .names murax.system_drygascon128.core.c[187] murax.system_drygascon128.core.core_in[187] 1 1 .names murax.system_drygascon128.core.c[188] murax.system_drygascon128.core.core_in[188] 1 1 .names murax.system_drygascon128.core.c[189] murax.system_drygascon128.core.core_in[189] 1 1 .names murax.system_drygascon128.core.c[190] murax.system_drygascon128.core.core_in[190] 1 1 .names murax.system_drygascon128.core.c[191] murax.system_drygascon128.core.core_in[191] 1 1 .names murax.system_drygascon128.core.c[224] murax.system_drygascon128.core.core_in[224] 1 1 .names murax.system_drygascon128.core.c[225] murax.system_drygascon128.core.core_in[225] 1 1 .names murax.system_drygascon128.core.c[226] murax.system_drygascon128.core.core_in[226] 1 1 .names murax.system_drygascon128.core.c[227] murax.system_drygascon128.core.core_in[227] 1 1 .names murax.system_drygascon128.core.c[228] murax.system_drygascon128.core.core_in[228] 1 1 .names murax.system_drygascon128.core.c[229] murax.system_drygascon128.core.core_in[229] 1 1 .names murax.system_drygascon128.core.c[230] murax.system_drygascon128.core.core_in[230] 1 1 .names murax.system_drygascon128.core.c[231] murax.system_drygascon128.core.core_in[231] 1 1 .names murax.system_drygascon128.core.c[232] murax.system_drygascon128.core.core_in[232] 1 1 .names murax.system_drygascon128.core.c[233] murax.system_drygascon128.core.core_in[233] 1 1 .names murax.system_drygascon128.core.c[234] murax.system_drygascon128.core.core_in[234] 1 1 .names murax.system_drygascon128.core.c[235] murax.system_drygascon128.core.core_in[235] 1 1 .names murax.system_drygascon128.core.c[236] murax.system_drygascon128.core.core_in[236] 1 1 .names murax.system_drygascon128.core.c[237] murax.system_drygascon128.core.core_in[237] 1 1 .names murax.system_drygascon128.core.c[238] murax.system_drygascon128.core.core_in[238] 1 1 .names murax.system_drygascon128.core.c[239] murax.system_drygascon128.core.core_in[239] 1 1 .names murax.system_drygascon128.core.c[240] murax.system_drygascon128.core.core_in[240] 1 1 .names murax.system_drygascon128.core.c[241] murax.system_drygascon128.core.core_in[241] 1 1 .names murax.system_drygascon128.core.c[242] murax.system_drygascon128.core.core_in[242] 1 1 .names murax.system_drygascon128.core.c[243] murax.system_drygascon128.core.core_in[243] 1 1 .names murax.system_drygascon128.core.c[244] murax.system_drygascon128.core.core_in[244] 1 1 .names murax.system_drygascon128.core.c[245] murax.system_drygascon128.core.core_in[245] 1 1 .names murax.system_drygascon128.core.c[246] murax.system_drygascon128.core.core_in[246] 1 1 .names murax.system_drygascon128.core.c[247] murax.system_drygascon128.core.core_in[247] 1 1 .names murax.system_drygascon128.core.c[248] murax.system_drygascon128.core.core_in[248] 1 1 .names murax.system_drygascon128.core.c[249] murax.system_drygascon128.core.core_in[249] 1 1 .names murax.system_drygascon128.core.c[250] murax.system_drygascon128.core.core_in[250] 1 1 .names murax.system_drygascon128.core.c[251] murax.system_drygascon128.core.core_in[251] 1 1 .names murax.system_drygascon128.core.c[252] murax.system_drygascon128.core.core_in[252] 1 1 .names murax.system_drygascon128.core.c[253] murax.system_drygascon128.core.core_in[253] 1 1 .names murax.system_drygascon128.core.c[254] murax.system_drygascon128.core.core_in[254] 1 1 .names murax.system_drygascon128.core.c[255] murax.system_drygascon128.core.core_in[255] 1 1 .names murax.system_drygascon128.core.c[288] murax.system_drygascon128.core.core_in[288] 1 1 .names murax.system_drygascon128.core.c[289] murax.system_drygascon128.core.core_in[289] 1 1 .names murax.system_drygascon128.core.c[290] murax.system_drygascon128.core.core_in[290] 1 1 .names murax.system_drygascon128.core.c[291] murax.system_drygascon128.core.core_in[291] 1 1 .names murax.system_drygascon128.core.c[292] murax.system_drygascon128.core.core_in[292] 1 1 .names murax.system_drygascon128.core.c[293] murax.system_drygascon128.core.core_in[293] 1 1 .names murax.system_drygascon128.core.c[294] murax.system_drygascon128.core.core_in[294] 1 1 .names murax.system_drygascon128.core.c[295] murax.system_drygascon128.core.core_in[295] 1 1 .names murax.system_drygascon128.core.c[296] murax.system_drygascon128.core.core_in[296] 1 1 .names murax.system_drygascon128.core.c[297] murax.system_drygascon128.core.core_in[297] 1 1 .names murax.system_drygascon128.core.c[298] murax.system_drygascon128.core.core_in[298] 1 1 .names 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murax.system_drygascon128.core.core_in[309] 1 1 .names murax.system_drygascon128.core.c[310] murax.system_drygascon128.core.core_in[310] 1 1 .names murax.system_drygascon128.core.c[311] murax.system_drygascon128.core.core_in[311] 1 1 .names murax.system_drygascon128.core.c[312] murax.system_drygascon128.core.core_in[312] 1 1 .names murax.system_drygascon128.core.c[313] murax.system_drygascon128.core.core_in[313] 1 1 .names murax.system_drygascon128.core.c[314] murax.system_drygascon128.core.core_in[314] 1 1 .names murax.system_drygascon128.core.c[315] murax.system_drygascon128.core.core_in[315] 1 1 .names murax.system_drygascon128.core.c[316] murax.system_drygascon128.core.core_in[316] 1 1 .names murax.system_drygascon128.core.c[317] murax.system_drygascon128.core.core_in[317] 1 1 .names murax.system_drygascon128.core.c[318] murax.system_drygascon128.core.core_in[318] 1 1 .names murax.system_drygascon128.core.c[319] murax.system_drygascon128.core.core_in[319] 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_drygascon128.core.din[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_drygascon128.core.din[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_drygascon128.core.din[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_drygascon128.core.din[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_drygascon128.core.din[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_drygascon128.core.din[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_drygascon128.core.din[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_drygascon128.core.din[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_drygascon128.core.din[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_drygascon128.core.din[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_drygascon128.core.din[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_drygascon128.core.din[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_drygascon128.core.din[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_drygascon128.core.din[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_drygascon128.core.din[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_drygascon128.core.din[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_drygascon128.core.din[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_drygascon128.core.din[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_drygascon128.core.din[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_drygascon128.core.din[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_drygascon128.core.din[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_drygascon128.core.din[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_drygascon128.core.din[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_drygascon128.core.din[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_drygascon128.core.din[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_drygascon128.core.din[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_drygascon128.core.din[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_drygascon128.core.din[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_drygascon128.core.din[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_drygascon128.core.din[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_drygascon128.core.din[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_drygascon128.core.din[31] 1 1 .names murax.system_drygascon128.ds[0] murax.system_drygascon128.core.ds[0] 1 1 .names murax.system_drygascon128.ds[1] murax.system_drygascon128.core.ds[1] 1 1 .names murax.system_drygascon128.ds[2] murax.system_drygascon128.core.ds[2] 1 1 .names murax.system_drygascon128.ds[3] murax.system_drygascon128.core.ds[3] 1 1 .names murax.system_drygascon128.core.c[32] murax.system_drygascon128.core.mixsx32_out[32] 1 1 .names murax.system_drygascon128.core.c[33] murax.system_drygascon128.core.mixsx32_out[33] 1 1 .names murax.system_drygascon128.core.c[34] murax.system_drygascon128.core.mixsx32_out[34] 1 1 .names murax.system_drygascon128.core.c[35] murax.system_drygascon128.core.mixsx32_out[35] 1 1 .names murax.system_drygascon128.core.c[36] murax.system_drygascon128.core.mixsx32_out[36] 1 1 .names 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murax.system_drygascon128.core.mixsx32_out[316] 1 1 .names murax.system_drygascon128.core.c[317] murax.system_drygascon128.core.mixsx32_out[317] 1 1 .names murax.system_drygascon128.core.c[318] murax.system_drygascon128.core.mixsx32_out[318] 1 1 .names murax.system_drygascon128.core.c[319] murax.system_drygascon128.core.mixsx32_out[319] 1 1 .names murax.system_drygascon128.rounds[0] murax.system_drygascon128.core.rounds[0] 1 1 .names murax.system_drygascon128.rounds[1] murax.system_drygascon128.core.rounds[1] 1 1 .names murax.system_drygascon128.rounds[2] murax.system_drygascon128.core.rounds[2] 1 1 .names murax.system_drygascon128.rounds[3] murax.system_drygascon128.core.rounds[3] 1 1 .names murax.resetCtrl_systemReset murax.system_drygascon128.core.rst 1 1 .names murax.system_drygascon128.start murax.system_drygascon128.core.start 1 1 .names murax.system_drygascon128.core.c[0] murax.system_drygascon128.core.u_accumulate.din[0] 1 1 .names murax.system_drygascon128.core.c[1] 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murax.system_drygascon128.core.c[317] murax.system_drygascon128.core.u_mixsx32.out[317] 1 1 .names murax.system_drygascon128.core.c[318] murax.system_drygascon128.core.u_mixsx32.out[318] 1 1 .names murax.system_drygascon128.core.c[319] murax.system_drygascon128.core.u_mixsx32.out[319] 1 1 .names murax.system_drygascon128.core.x[0] murax.system_drygascon128.core.u_mixsx32.x[0] 1 1 .names murax.system_drygascon128.core.x[1] murax.system_drygascon128.core.u_mixsx32.x[1] 1 1 .names murax.system_drygascon128.core.x[2] murax.system_drygascon128.core.u_mixsx32.x[2] 1 1 .names murax.system_drygascon128.core.x[3] murax.system_drygascon128.core.u_mixsx32.x[3] 1 1 .names murax.system_drygascon128.core.x[4] murax.system_drygascon128.core.u_mixsx32.x[4] 1 1 .names murax.system_drygascon128.core.x[5] murax.system_drygascon128.core.u_mixsx32.x[5] 1 1 .names murax.system_drygascon128.core.x[6] murax.system_drygascon128.core.u_mixsx32.x[6] 1 1 .names murax.system_drygascon128.core.x[7] murax.system_drygascon128.core.u_mixsx32.x[7] 1 1 .names murax.system_drygascon128.core.x[8] murax.system_drygascon128.core.u_mixsx32.x[8] 1 1 .names murax.system_drygascon128.core.x[9] murax.system_drygascon128.core.u_mixsx32.x[9] 1 1 .names murax.system_drygascon128.core.x[10] murax.system_drygascon128.core.u_mixsx32.x[10] 1 1 .names murax.system_drygascon128.core.x[11] murax.system_drygascon128.core.u_mixsx32.x[11] 1 1 .names murax.system_drygascon128.core.x[12] murax.system_drygascon128.core.u_mixsx32.x[12] 1 1 .names murax.system_drygascon128.core.x[13] murax.system_drygascon128.core.u_mixsx32.x[13] 1 1 .names murax.system_drygascon128.core.x[14] murax.system_drygascon128.core.u_mixsx32.x[14] 1 1 .names murax.system_drygascon128.core.x[15] murax.system_drygascon128.core.u_mixsx32.x[15] 1 1 .names murax.system_drygascon128.core.x[16] murax.system_drygascon128.core.u_mixsx32.x[16] 1 1 .names murax.system_drygascon128.core.x[17] murax.system_drygascon128.core.u_mixsx32.x[17] 1 1 .names murax.system_drygascon128.core.x[18] murax.system_drygascon128.core.u_mixsx32.x[18] 1 1 .names murax.system_drygascon128.core.x[19] murax.system_drygascon128.core.u_mixsx32.x[19] 1 1 .names murax.system_drygascon128.core.x[20] murax.system_drygascon128.core.u_mixsx32.x[20] 1 1 .names murax.system_drygascon128.core.x[21] murax.system_drygascon128.core.u_mixsx32.x[21] 1 1 .names murax.system_drygascon128.core.x[22] murax.system_drygascon128.core.u_mixsx32.x[22] 1 1 .names murax.system_drygascon128.core.x[23] murax.system_drygascon128.core.u_mixsx32.x[23] 1 1 .names murax.system_drygascon128.core.x[24] murax.system_drygascon128.core.u_mixsx32.x[24] 1 1 .names murax.system_drygascon128.core.x[25] murax.system_drygascon128.core.u_mixsx32.x[25] 1 1 .names murax.system_drygascon128.core.x[26] murax.system_drygascon128.core.u_mixsx32.x[26] 1 1 .names murax.system_drygascon128.core.x[27] murax.system_drygascon128.core.u_mixsx32.x[27] 1 1 .names murax.system_drygascon128.core.x[28] murax.system_drygascon128.core.u_mixsx32.x[28] 1 1 .names murax.system_drygascon128.core.x[29] murax.system_drygascon128.core.u_mixsx32.x[29] 1 1 .names murax.system_drygascon128.core.x[30] murax.system_drygascon128.core.u_mixsx32.x[30] 1 1 .names murax.system_drygascon128.core.x[31] murax.system_drygascon128.core.u_mixsx32.x[31] 1 1 .names murax.system_drygascon128.core.x[32] murax.system_drygascon128.core.u_mixsx32.x[32] 1 1 .names murax.system_drygascon128.core.x[33] murax.system_drygascon128.core.u_mixsx32.x[33] 1 1 .names murax.system_drygascon128.core.x[34] murax.system_drygascon128.core.u_mixsx32.x[34] 1 1 .names murax.system_drygascon128.core.x[35] murax.system_drygascon128.core.u_mixsx32.x[35] 1 1 .names murax.system_drygascon128.core.x[36] murax.system_drygascon128.core.u_mixsx32.x[36] 1 1 .names murax.system_drygascon128.core.x[37] murax.system_drygascon128.core.u_mixsx32.x[37] 1 1 .names murax.system_drygascon128.core.x[38] murax.system_drygascon128.core.u_mixsx32.x[38] 1 1 .names murax.system_drygascon128.core.x[39] murax.system_drygascon128.core.u_mixsx32.x[39] 1 1 .names murax.system_drygascon128.core.x[40] murax.system_drygascon128.core.u_mixsx32.x[40] 1 1 .names murax.system_drygascon128.core.x[41] murax.system_drygascon128.core.u_mixsx32.x[41] 1 1 .names murax.system_drygascon128.core.x[42] murax.system_drygascon128.core.u_mixsx32.x[42] 1 1 .names murax.system_drygascon128.core.x[43] murax.system_drygascon128.core.u_mixsx32.x[43] 1 1 .names murax.system_drygascon128.core.x[44] murax.system_drygascon128.core.u_mixsx32.x[44] 1 1 .names murax.system_drygascon128.core.x[45] murax.system_drygascon128.core.u_mixsx32.x[45] 1 1 .names murax.system_drygascon128.core.x[46] murax.system_drygascon128.core.u_mixsx32.x[46] 1 1 .names murax.system_drygascon128.core.x[47] murax.system_drygascon128.core.u_mixsx32.x[47] 1 1 .names murax.system_drygascon128.core.x[48] murax.system_drygascon128.core.u_mixsx32.x[48] 1 1 .names murax.system_drygascon128.core.x[49] murax.system_drygascon128.core.u_mixsx32.x[49] 1 1 .names murax.system_drygascon128.core.x[50] murax.system_drygascon128.core.u_mixsx32.x[50] 1 1 .names murax.system_drygascon128.core.x[51] murax.system_drygascon128.core.u_mixsx32.x[51] 1 1 .names murax.system_drygascon128.core.x[52] murax.system_drygascon128.core.u_mixsx32.x[52] 1 1 .names murax.system_drygascon128.core.x[53] murax.system_drygascon128.core.u_mixsx32.x[53] 1 1 .names murax.system_drygascon128.core.x[54] murax.system_drygascon128.core.u_mixsx32.x[54] 1 1 .names murax.system_drygascon128.core.x[55] murax.system_drygascon128.core.u_mixsx32.x[55] 1 1 .names murax.system_drygascon128.core.x[56] murax.system_drygascon128.core.u_mixsx32.x[56] 1 1 .names murax.system_drygascon128.core.x[57] murax.system_drygascon128.core.u_mixsx32.x[57] 1 1 .names murax.system_drygascon128.core.x[58] murax.system_drygascon128.core.u_mixsx32.x[58] 1 1 .names murax.system_drygascon128.core.x[59] murax.system_drygascon128.core.u_mixsx32.x[59] 1 1 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murax.system_drygascon128.core.u_mixsx32.x[70] 1 1 .names murax.system_drygascon128.core.x[71] murax.system_drygascon128.core.u_mixsx32.x[71] 1 1 .names murax.system_drygascon128.core.x[72] murax.system_drygascon128.core.u_mixsx32.x[72] 1 1 .names murax.system_drygascon128.core.x[73] murax.system_drygascon128.core.u_mixsx32.x[73] 1 1 .names murax.system_drygascon128.core.x[74] murax.system_drygascon128.core.u_mixsx32.x[74] 1 1 .names murax.system_drygascon128.core.x[75] murax.system_drygascon128.core.u_mixsx32.x[75] 1 1 .names murax.system_drygascon128.core.x[76] murax.system_drygascon128.core.u_mixsx32.x[76] 1 1 .names murax.system_drygascon128.core.x[77] murax.system_drygascon128.core.u_mixsx32.x[77] 1 1 .names murax.system_drygascon128.core.x[78] murax.system_drygascon128.core.u_mixsx32.x[78] 1 1 .names murax.system_drygascon128.core.x[79] murax.system_drygascon128.core.u_mixsx32.x[79] 1 1 .names murax.system_drygascon128.core.x[80] murax.system_drygascon128.core.u_mixsx32.x[80] 1 1 .names murax.system_drygascon128.core.x[81] murax.system_drygascon128.core.u_mixsx32.x[81] 1 1 .names murax.system_drygascon128.core.x[82] murax.system_drygascon128.core.u_mixsx32.x[82] 1 1 .names murax.system_drygascon128.core.x[83] murax.system_drygascon128.core.u_mixsx32.x[83] 1 1 .names murax.system_drygascon128.core.x[84] murax.system_drygascon128.core.u_mixsx32.x[84] 1 1 .names murax.system_drygascon128.core.x[85] murax.system_drygascon128.core.u_mixsx32.x[85] 1 1 .names murax.system_drygascon128.core.x[86] murax.system_drygascon128.core.u_mixsx32.x[86] 1 1 .names murax.system_drygascon128.core.x[87] murax.system_drygascon128.core.u_mixsx32.x[87] 1 1 .names murax.system_drygascon128.core.x[88] murax.system_drygascon128.core.u_mixsx32.x[88] 1 1 .names murax.system_drygascon128.core.x[89] murax.system_drygascon128.core.u_mixsx32.x[89] 1 1 .names murax.system_drygascon128.core.x[90] murax.system_drygascon128.core.u_mixsx32.x[90] 1 1 .names murax.system_drygascon128.core.x[91] murax.system_drygascon128.core.u_mixsx32.x[91] 1 1 .names murax.system_drygascon128.core.x[92] murax.system_drygascon128.core.u_mixsx32.x[92] 1 1 .names murax.system_drygascon128.core.x[93] murax.system_drygascon128.core.u_mixsx32.x[93] 1 1 .names murax.system_drygascon128.core.x[94] murax.system_drygascon128.core.u_mixsx32.x[94] 1 1 .names murax.system_drygascon128.core.x[95] murax.system_drygascon128.core.u_mixsx32.x[95] 1 1 .names murax.system_drygascon128.core.x[96] murax.system_drygascon128.core.u_mixsx32.x[96] 1 1 .names murax.system_drygascon128.core.x[97] murax.system_drygascon128.core.u_mixsx32.x[97] 1 1 .names murax.system_drygascon128.core.x[98] murax.system_drygascon128.core.u_mixsx32.x[98] 1 1 .names murax.system_drygascon128.core.x[99] murax.system_drygascon128.core.u_mixsx32.x[99] 1 1 .names murax.system_drygascon128.core.x[100] murax.system_drygascon128.core.u_mixsx32.x[100] 1 1 .names murax.system_drygascon128.core.x[101] murax.system_drygascon128.core.u_mixsx32.x[101] 1 1 .names murax.system_drygascon128.core.x[102] murax.system_drygascon128.core.u_mixsx32.x[102] 1 1 .names murax.system_drygascon128.core.x[103] murax.system_drygascon128.core.u_mixsx32.x[103] 1 1 .names murax.system_drygascon128.core.x[104] murax.system_drygascon128.core.u_mixsx32.x[104] 1 1 .names murax.system_drygascon128.core.x[105] murax.system_drygascon128.core.u_mixsx32.x[105] 1 1 .names murax.system_drygascon128.core.x[106] murax.system_drygascon128.core.u_mixsx32.x[106] 1 1 .names murax.system_drygascon128.core.x[107] murax.system_drygascon128.core.u_mixsx32.x[107] 1 1 .names murax.system_drygascon128.core.x[108] murax.system_drygascon128.core.u_mixsx32.x[108] 1 1 .names murax.system_drygascon128.core.x[109] murax.system_drygascon128.core.u_mixsx32.x[109] 1 1 .names murax.system_drygascon128.core.x[110] murax.system_drygascon128.core.u_mixsx32.x[110] 1 1 .names murax.system_drygascon128.core.x[111] murax.system_drygascon128.core.u_mixsx32.x[111] 1 1 .names murax.system_drygascon128.core.x[112] murax.system_drygascon128.core.u_mixsx32.x[112] 1 1 .names murax.system_drygascon128.core.x[113] murax.system_drygascon128.core.u_mixsx32.x[113] 1 1 .names murax.system_drygascon128.core.x[114] murax.system_drygascon128.core.u_mixsx32.x[114] 1 1 .names murax.system_drygascon128.core.x[115] murax.system_drygascon128.core.u_mixsx32.x[115] 1 1 .names murax.system_drygascon128.core.x[116] murax.system_drygascon128.core.u_mixsx32.x[116] 1 1 .names murax.system_drygascon128.core.x[117] murax.system_drygascon128.core.u_mixsx32.x[117] 1 1 .names murax.system_drygascon128.core.x[118] murax.system_drygascon128.core.u_mixsx32.x[118] 1 1 .names murax.system_drygascon128.core.x[119] murax.system_drygascon128.core.u_mixsx32.x[119] 1 1 .names murax.system_drygascon128.core.x[120] murax.system_drygascon128.core.u_mixsx32.x[120] 1 1 .names murax.system_drygascon128.core.x[121] murax.system_drygascon128.core.u_mixsx32.x[121] 1 1 .names murax.system_drygascon128.core.x[122] murax.system_drygascon128.core.u_mixsx32.x[122] 1 1 .names murax.system_drygascon128.core.x[123] murax.system_drygascon128.core.u_mixsx32.x[123] 1 1 .names murax.system_drygascon128.core.x[124] murax.system_drygascon128.core.u_mixsx32.x[124] 1 1 .names murax.system_drygascon128.core.x[125] murax.system_drygascon128.core.u_mixsx32.x[125] 1 1 .names murax.system_drygascon128.core.x[126] murax.system_drygascon128.core.u_mixsx32.x[126] 1 1 .names murax.system_drygascon128.core.x[127] murax.system_drygascon128.core.u_mixsx32.x[127] 1 1 .names murax.system_drygascon128.core.dout[0] murax.system_drygascon128.core_dout[0] 1 1 .names murax.system_drygascon128.core.dout[1] murax.system_drygascon128.core_dout[1] 1 1 .names murax.system_drygascon128.core.dout[2] murax.system_drygascon128.core_dout[2] 1 1 .names murax.system_drygascon128.core.dout[3] murax.system_drygascon128.core_dout[3] 1 1 .names murax.system_drygascon128.core.dout[4] murax.system_drygascon128.core_dout[4] 1 1 .names murax.system_drygascon128.core.dout[5] murax.system_drygascon128.core_dout[5] 1 1 .names murax.system_drygascon128.core.dout[6] murax.system_drygascon128.core_dout[6] 1 1 .names murax.system_drygascon128.core.dout[7] murax.system_drygascon128.core_dout[7] 1 1 .names murax.system_drygascon128.core.dout[8] murax.system_drygascon128.core_dout[8] 1 1 .names murax.system_drygascon128.core.dout[9] murax.system_drygascon128.core_dout[9] 1 1 .names murax.system_drygascon128.core.dout[10] murax.system_drygascon128.core_dout[10] 1 1 .names murax.system_drygascon128.core.dout[11] murax.system_drygascon128.core_dout[11] 1 1 .names murax.system_drygascon128.core.dout[12] murax.system_drygascon128.core_dout[12] 1 1 .names murax.system_drygascon128.core.dout[13] murax.system_drygascon128.core_dout[13] 1 1 .names murax.system_drygascon128.core.dout[14] murax.system_drygascon128.core_dout[14] 1 1 .names murax.system_drygascon128.core.dout[15] murax.system_drygascon128.core_dout[15] 1 1 .names murax.system_drygascon128.core.dout[16] murax.system_drygascon128.core_dout[16] 1 1 .names murax.system_drygascon128.core.dout[17] murax.system_drygascon128.core_dout[17] 1 1 .names murax.system_drygascon128.core.dout[18] murax.system_drygascon128.core_dout[18] 1 1 .names murax.system_drygascon128.core.dout[19] murax.system_drygascon128.core_dout[19] 1 1 .names murax.system_drygascon128.core.dout[20] murax.system_drygascon128.core_dout[20] 1 1 .names murax.system_drygascon128.core.dout[21] murax.system_drygascon128.core_dout[21] 1 1 .names murax.system_drygascon128.core.dout[22] murax.system_drygascon128.core_dout[22] 1 1 .names murax.system_drygascon128.core.dout[23] murax.system_drygascon128.core_dout[23] 1 1 .names murax.system_drygascon128.core.dout[24] murax.system_drygascon128.core_dout[24] 1 1 .names murax.system_drygascon128.core.dout[25] murax.system_drygascon128.core_dout[25] 1 1 .names murax.system_drygascon128.core.dout[26] murax.system_drygascon128.core_dout[26] 1 1 .names murax.system_drygascon128.core.dout[27] murax.system_drygascon128.core_dout[27] 1 1 .names murax.system_drygascon128.core.dout[28] murax.system_drygascon128.core_dout[28] 1 1 .names murax.system_drygascon128.core.dout[29] murax.system_drygascon128.core_dout[29] 1 1 .names murax.system_drygascon128.core.dout[30] murax.system_drygascon128.core_dout[30] 1 1 .names murax.system_drygascon128.core.dout[31] murax.system_drygascon128.core_dout[31] 1 1 .names murax.system_drygascon128.core.idle murax.system_drygascon128.core_idle 1 1 .names murax.system_drygascon128.rounds[0] murax.system_drygascon128.ctrl[0] 1 1 .names murax.system_drygascon128.rounds[1] murax.system_drygascon128.ctrl[1] 1 1 .names murax.system_drygascon128.rounds[2] murax.system_drygascon128.ctrl[2] 1 1 .names murax.system_drygascon128.rounds[3] murax.system_drygascon128.ctrl[3] 1 1 .names murax.system_drygascon128.ds[0] murax.system_drygascon128.ctrl[4] 1 1 .names murax.system_drygascon128.ds[1] murax.system_drygascon128.ctrl[5] 1 1 .names murax.system_drygascon128.ds[2] murax.system_drygascon128.ctrl[6] 1 1 .names murax.system_drygascon128.ds[3] murax.system_drygascon128.ctrl[7] 1 1 .names murax.system_drygascon128.start murax.system_drygascon128.ctrl[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.system_drygascon128.io_apb_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.system_drygascon128.io_apb_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.system_drygascon128.io_apb_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.system_drygascon128.io_apb_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.system_drygascon128.io_apb_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.system_drygascon128.io_apb_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.system_drygascon128.io_apb_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.system_drygascon128.io_apb_PADDR[7] 1 1 .names murax.system_apbBridge.state murax.system_drygascon128.io_apb_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_drygascon128.io_apb_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_drygascon128.io_apb_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_drygascon128.io_apb_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_drygascon128.io_apb_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_drygascon128.io_apb_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_drygascon128.io_apb_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_drygascon128.io_apb_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_drygascon128.io_apb_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_drygascon128.io_apb_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_drygascon128.io_apb_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_drygascon128.io_apb_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_drygascon128.io_apb_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_drygascon128.io_apb_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_drygascon128.io_apb_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_drygascon128.io_apb_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_drygascon128.io_apb_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_drygascon128.io_apb_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_drygascon128.io_apb_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_drygascon128.io_apb_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_drygascon128.io_apb_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_drygascon128.io_apb_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_drygascon128.io_apb_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_drygascon128.io_apb_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_drygascon128.io_apb_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_drygascon128.io_apb_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_drygascon128.io_apb_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_drygascon128.io_apb_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_drygascon128.io_apb_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_drygascon128.io_apb_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_drygascon128.io_apb_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_drygascon128.io_apb_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_drygascon128.io_apb_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.system_drygascon128.io_apb_PWRITE 1 1 .names io_mainClk murax.system_drygascon128.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_drygascon128.toplevel_resetCtrl_systemReset 1 1 .names murax.system_cpu.externalInterrupt murax.system_externalInterrupt 1 1 .names io_mainClk murax.system_gpioACtrl.bufferCC_4_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_gpioACtrl.bufferCC_4_.toplevel_resetCtrl_systemReset 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.system_gpioACtrl.io_apb_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.system_gpioACtrl.io_apb_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.system_gpioACtrl.io_apb_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.system_gpioACtrl.io_apb_PADDR[3] 1 1 .names murax.system_apbBridge.state murax.system_gpioACtrl.io_apb_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_gpioACtrl.io_apb_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_gpioACtrl.io_apb_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_gpioACtrl.io_apb_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_gpioACtrl.io_apb_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_gpioACtrl.io_apb_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_gpioACtrl.io_apb_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_gpioACtrl.io_apb_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_gpioACtrl.io_apb_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_gpioACtrl.io_apb_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_gpioACtrl.io_apb_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_gpioACtrl.io_apb_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_gpioACtrl.io_apb_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_gpioACtrl.io_apb_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_gpioACtrl.io_apb_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_gpioACtrl.io_apb_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_gpioACtrl.io_apb_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_gpioACtrl.io_apb_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_gpioACtrl.io_apb_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_gpioACtrl.io_apb_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_gpioACtrl.io_apb_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_gpioACtrl.io_apb_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_gpioACtrl.io_apb_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_gpioACtrl.io_apb_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_gpioACtrl.io_apb_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_gpioACtrl.io_apb_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_gpioACtrl.io_apb_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_gpioACtrl.io_apb_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_gpioACtrl.io_apb_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_gpioACtrl.io_apb_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_gpioACtrl.io_apb_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_gpioACtrl.io_apb_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_gpioACtrl.io_apb_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.system_gpioACtrl.io_apb_PWRITE 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[0] murax.system_gpioACtrl.io_gpio_write[0] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[1] murax.system_gpioACtrl.io_gpio_write[1] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[2] murax.system_gpioACtrl.io_gpio_write[2] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[3] murax.system_gpioACtrl.io_gpio_write[3] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[4] murax.system_gpioACtrl.io_gpio_write[4] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[5] murax.system_gpioACtrl.io_gpio_write[5] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[6] murax.system_gpioACtrl.io_gpio_write[6] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[7] murax.system_gpioACtrl.io_gpio_write[7] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[8] murax.system_gpioACtrl.io_gpio_write[8] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[9] murax.system_gpioACtrl.io_gpio_write[9] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[10] murax.system_gpioACtrl.io_gpio_write[10] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[11] murax.system_gpioACtrl.io_gpio_write[11] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[12] murax.system_gpioACtrl.io_gpio_write[12] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[13] murax.system_gpioACtrl.io_gpio_write[13] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[14] murax.system_gpioACtrl.io_gpio_write[14] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[15] murax.system_gpioACtrl.io_gpio_write[15] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[16] murax.system_gpioACtrl.io_gpio_write[16] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[17] murax.system_gpioACtrl.io_gpio_write[17] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[18] murax.system_gpioACtrl.io_gpio_write[18] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[19] murax.system_gpioACtrl.io_gpio_write[19] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[20] murax.system_gpioACtrl.io_gpio_write[20] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[21] murax.system_gpioACtrl.io_gpio_write[21] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[22] murax.system_gpioACtrl.io_gpio_write[22] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[23] murax.system_gpioACtrl.io_gpio_write[23] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[24] murax.system_gpioACtrl.io_gpio_write[24] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[25] murax.system_gpioACtrl.io_gpio_write[25] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[26] murax.system_gpioACtrl.io_gpio_write[26] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[27] murax.system_gpioACtrl.io_gpio_write[27] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[28] murax.system_gpioACtrl.io_gpio_write[28] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[29] murax.system_gpioACtrl.io_gpio_write[29] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[30] murax.system_gpioACtrl.io_gpio_write[30] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[31] murax.system_gpioACtrl.io_gpio_write[31] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[0] murax.system_gpioACtrl.io_gpio_writeEnable[0] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[1] murax.system_gpioACtrl.io_gpio_writeEnable[1] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[2] murax.system_gpioACtrl.io_gpio_writeEnable[2] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[3] murax.system_gpioACtrl.io_gpio_writeEnable[3] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[4] murax.system_gpioACtrl.io_gpio_writeEnable[4] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[5] murax.system_gpioACtrl.io_gpio_writeEnable[5] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[6] murax.system_gpioACtrl.io_gpio_writeEnable[6] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[7] murax.system_gpioACtrl.io_gpio_writeEnable[7] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[8] murax.system_gpioACtrl.io_gpio_writeEnable[8] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[9] murax.system_gpioACtrl.io_gpio_writeEnable[9] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[10] murax.system_gpioACtrl.io_gpio_writeEnable[10] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[11] murax.system_gpioACtrl.io_gpio_writeEnable[11] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[12] murax.system_gpioACtrl.io_gpio_writeEnable[12] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[13] murax.system_gpioACtrl.io_gpio_writeEnable[13] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[14] murax.system_gpioACtrl.io_gpio_writeEnable[14] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[15] murax.system_gpioACtrl.io_gpio_writeEnable[15] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[16] murax.system_gpioACtrl.io_gpio_writeEnable[16] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[17] murax.system_gpioACtrl.io_gpio_writeEnable[17] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[18] murax.system_gpioACtrl.io_gpio_writeEnable[18] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[19] murax.system_gpioACtrl.io_gpio_writeEnable[19] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[20] murax.system_gpioACtrl.io_gpio_writeEnable[20] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[21] murax.system_gpioACtrl.io_gpio_writeEnable[21] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[22] murax.system_gpioACtrl.io_gpio_writeEnable[22] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[23] murax.system_gpioACtrl.io_gpio_writeEnable[23] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[24] murax.system_gpioACtrl.io_gpio_writeEnable[24] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[25] murax.system_gpioACtrl.io_gpio_writeEnable[25] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[26] murax.system_gpioACtrl.io_gpio_writeEnable[26] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[27] murax.system_gpioACtrl.io_gpio_writeEnable[27] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[28] murax.system_gpioACtrl.io_gpio_writeEnable[28] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[29] murax.system_gpioACtrl.io_gpio_writeEnable[29] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[30] murax.system_gpioACtrl.io_gpio_writeEnable[30] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[31] murax.system_gpioACtrl.io_gpio_writeEnable[31] 1 1 .names io_mainClk murax.system_gpioACtrl.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_gpioACtrl.toplevel_resetCtrl_systemReset 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[0] murax.system_gpioACtrl_io_gpio_write[0] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[1] murax.system_gpioACtrl_io_gpio_write[1] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[2] murax.system_gpioACtrl_io_gpio_write[2] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[3] murax.system_gpioACtrl_io_gpio_write[3] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[4] murax.system_gpioACtrl_io_gpio_write[4] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[5] murax.system_gpioACtrl_io_gpio_write[5] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[6] murax.system_gpioACtrl_io_gpio_write[6] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[7] murax.system_gpioACtrl_io_gpio_write[7] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[8] murax.system_gpioACtrl_io_gpio_write[8] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[9] murax.system_gpioACtrl_io_gpio_write[9] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[10] murax.system_gpioACtrl_io_gpio_write[10] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[11] murax.system_gpioACtrl_io_gpio_write[11] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[12] murax.system_gpioACtrl_io_gpio_write[12] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[13] murax.system_gpioACtrl_io_gpio_write[13] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[14] murax.system_gpioACtrl_io_gpio_write[14] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[15] murax.system_gpioACtrl_io_gpio_write[15] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[16] murax.system_gpioACtrl_io_gpio_write[16] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[17] murax.system_gpioACtrl_io_gpio_write[17] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[18] murax.system_gpioACtrl_io_gpio_write[18] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[19] murax.system_gpioACtrl_io_gpio_write[19] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[20] murax.system_gpioACtrl_io_gpio_write[20] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[21] murax.system_gpioACtrl_io_gpio_write[21] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[22] murax.system_gpioACtrl_io_gpio_write[22] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[23] murax.system_gpioACtrl_io_gpio_write[23] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[24] murax.system_gpioACtrl_io_gpio_write[24] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[25] murax.system_gpioACtrl_io_gpio_write[25] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[26] murax.system_gpioACtrl_io_gpio_write[26] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[27] murax.system_gpioACtrl_io_gpio_write[27] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[28] murax.system_gpioACtrl_io_gpio_write[28] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[29] murax.system_gpioACtrl_io_gpio_write[29] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[30] murax.system_gpioACtrl_io_gpio_write[30] 1 1 .names murax.system_gpioACtrl.io_gpio_write__driver[31] murax.system_gpioACtrl_io_gpio_write[31] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[0] murax.system_gpioACtrl_io_gpio_writeEnable[0] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[1] murax.system_gpioACtrl_io_gpio_writeEnable[1] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[2] murax.system_gpioACtrl_io_gpio_writeEnable[2] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[3] murax.system_gpioACtrl_io_gpio_writeEnable[3] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[4] murax.system_gpioACtrl_io_gpio_writeEnable[4] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[5] murax.system_gpioACtrl_io_gpio_writeEnable[5] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[6] murax.system_gpioACtrl_io_gpio_writeEnable[6] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[7] murax.system_gpioACtrl_io_gpio_writeEnable[7] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[8] murax.system_gpioACtrl_io_gpio_writeEnable[8] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[9] murax.system_gpioACtrl_io_gpio_writeEnable[9] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[10] murax.system_gpioACtrl_io_gpio_writeEnable[10] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[11] murax.system_gpioACtrl_io_gpio_writeEnable[11] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[12] murax.system_gpioACtrl_io_gpio_writeEnable[12] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[13] murax.system_gpioACtrl_io_gpio_writeEnable[13] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[14] murax.system_gpioACtrl_io_gpio_writeEnable[14] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[15] murax.system_gpioACtrl_io_gpio_writeEnable[15] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[16] murax.system_gpioACtrl_io_gpio_writeEnable[16] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[17] murax.system_gpioACtrl_io_gpio_writeEnable[17] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[18] murax.system_gpioACtrl_io_gpio_writeEnable[18] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[19] murax.system_gpioACtrl_io_gpio_writeEnable[19] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[20] murax.system_gpioACtrl_io_gpio_writeEnable[20] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[21] murax.system_gpioACtrl_io_gpio_writeEnable[21] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[22] murax.system_gpioACtrl_io_gpio_writeEnable[22] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[23] murax.system_gpioACtrl_io_gpio_writeEnable[23] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[24] murax.system_gpioACtrl_io_gpio_writeEnable[24] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[25] murax.system_gpioACtrl_io_gpio_writeEnable[25] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[26] murax.system_gpioACtrl_io_gpio_writeEnable[26] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[27] murax.system_gpioACtrl_io_gpio_writeEnable[27] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[28] murax.system_gpioACtrl_io_gpio_writeEnable[28] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[29] murax.system_gpioACtrl_io_gpio_writeEnable[29] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[30] murax.system_gpioACtrl_io_gpio_writeEnable[30] 1 1 .names murax.system_gpioACtrl.io_gpio_writeEnable__driver[31] murax.system_gpioACtrl_io_gpio_writeEnable[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[0] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[1] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[2] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[3] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[4] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[5] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[6] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[7] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[8] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[9] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[10] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[11] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[12] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[13] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[14] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[15] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[16] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[17] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[18] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[19] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[20] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[21] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[22] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[23] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[24] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[25] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[26] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[27] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[28] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[29] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[30] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_address[31] murax.system_mainBusArbiter.io_dBus_cmd_payload_address[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] murax.system_mainBusArbiter.io_dBus_cmd_payload_data[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[0] murax.system_mainBusArbiter.io_dBus_cmd_payload_size[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_size[1] murax.system_mainBusArbiter.io_dBus_cmd_payload_size[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_wr murax.system_mainBusArbiter.io_dBus_cmd_payload_wr 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_valid murax.system_mainBusArbiter.io_dBus_cmd_valid 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_mainBusArbiter.io_dBus_rsp_data[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_mainBusArbiter.io_dBus_rsp_data[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_mainBusArbiter.io_dBus_rsp_data[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_mainBusArbiter.io_dBus_rsp_data[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_mainBusArbiter.io_dBus_rsp_data[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_mainBusArbiter.io_dBus_rsp_data[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_mainBusArbiter.io_dBus_rsp_data[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_mainBusArbiter.io_dBus_rsp_data[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_mainBusArbiter.io_dBus_rsp_data[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_mainBusArbiter.io_dBus_rsp_data[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_mainBusArbiter.io_dBus_rsp_data[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_mainBusArbiter.io_dBus_rsp_data[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_mainBusArbiter.io_dBus_rsp_data[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_mainBusArbiter.io_dBus_rsp_data[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_mainBusArbiter.io_dBus_rsp_data[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_mainBusArbiter.io_dBus_rsp_data[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_mainBusArbiter.io_dBus_rsp_data[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_mainBusArbiter.io_dBus_rsp_data[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_mainBusArbiter.io_dBus_rsp_data[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_mainBusArbiter.io_dBus_rsp_data[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_mainBusArbiter.io_dBus_rsp_data[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_mainBusArbiter.io_dBus_rsp_data[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_mainBusArbiter.io_dBus_rsp_data[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_mainBusArbiter.io_dBus_rsp_data[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_mainBusArbiter.io_dBus_rsp_data[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_mainBusArbiter.io_dBus_rsp_data[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_mainBusArbiter.io_dBus_rsp_data[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_mainBusArbiter.io_dBus_rsp_data[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_mainBusArbiter.io_dBus_rsp_data[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_mainBusArbiter.io_dBus_rsp_data[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_mainBusArbiter.io_dBus_rsp_data[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_mainBusArbiter.io_dBus_rsp_data[31] 1 1 .names $false murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[0] 1 1 .names $false murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[2] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[3] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[4] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[5] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[6] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[7] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[8] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[9] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[10] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[11] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[12] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[13] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[14] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[15] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[16] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[17] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[18] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[19] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[20] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[21] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[22] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[23] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[24] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[25] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[26] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[27] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[28] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[29] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[30] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_fetchPc_pcReg[31] murax.system_mainBusArbiter.io_iBus_cmd_payload_pc[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_mainBusArbiter.io_iBus_rsp_payload_inst[31] 1 1 .names $undef murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[0] 1 1 .names $undef murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[13] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[14] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[15] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[16] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[17] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[18] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[19] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[20] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[21] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[22] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[23] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[24] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[25] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[26] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[27] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[28] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[29] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[30] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[31] murax.system_mainBusArbiter.io_masterBus_cmd_payload_address[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] murax.system_mainBusArbiter.io_masterBus_cmd_payload_data[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write murax.system_mainBusArbiter.io_masterBus_cmd_payload_write 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_mainBusArbiter.io_masterBus_rsp_payload_data[31] 1 1 .names io_mainClk murax.system_mainBusArbiter.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_mainBusArbiter.toplevel_resetCtrl_systemReset 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_mainBusArbiter_io_dBus_rsp_data[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_mainBusArbiter_io_dBus_rsp_data[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_mainBusArbiter_io_dBus_rsp_data[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_mainBusArbiter_io_dBus_rsp_data[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_mainBusArbiter_io_dBus_rsp_data[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_mainBusArbiter_io_dBus_rsp_data[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_mainBusArbiter_io_dBus_rsp_data[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_mainBusArbiter_io_dBus_rsp_data[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_mainBusArbiter_io_dBus_rsp_data[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_mainBusArbiter_io_dBus_rsp_data[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_mainBusArbiter_io_dBus_rsp_data[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_mainBusArbiter_io_dBus_rsp_data[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_mainBusArbiter_io_dBus_rsp_data[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_mainBusArbiter_io_dBus_rsp_data[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_mainBusArbiter_io_dBus_rsp_data[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_mainBusArbiter_io_dBus_rsp_data[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_mainBusArbiter_io_dBus_rsp_data[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_mainBusArbiter_io_dBus_rsp_data[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_mainBusArbiter_io_dBus_rsp_data[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_mainBusArbiter_io_dBus_rsp_data[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_mainBusArbiter_io_dBus_rsp_data[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_mainBusArbiter_io_dBus_rsp_data[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_mainBusArbiter_io_dBus_rsp_data[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_mainBusArbiter_io_dBus_rsp_data[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_mainBusArbiter_io_dBus_rsp_data[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_mainBusArbiter_io_dBus_rsp_data[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_mainBusArbiter_io_dBus_rsp_data[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_mainBusArbiter_io_dBus_rsp_data[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_mainBusArbiter_io_dBus_rsp_data[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_mainBusArbiter_io_dBus_rsp_data[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_mainBusArbiter_io_dBus_rsp_data[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_mainBusArbiter_io_dBus_rsp_data[31] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_mainBusArbiter_io_iBus_rsp_payload_inst[31] 1 1 .names $undef murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[0] 1 1 .names $undef murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[13] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[14] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[15] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[16] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[17] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[18] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[19] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[20] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[21] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[22] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[23] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[24] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[25] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[26] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[27] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[28] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[29] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[30] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[31] murax.system_mainBusArbiter_io_masterBus_cmd_payload_address[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] murax.system_mainBusArbiter_io_masterBus_cmd_payload_data[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write murax.system_mainBusArbiter_io_masterBus_cmd_payload_write 1 1 .names $undef murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[0] 1 1 .names $undef murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[13] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[14] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[15] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[16] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[17] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[18] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[19] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[20] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[21] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[22] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[23] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[24] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[25] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[26] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[27] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[28] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[29] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[30] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[31] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_address[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_data[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write murax.system_mainBusDecoder_logic_masterPipelined_cmd_payload_write 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[0] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[0] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[1] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[1] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[2] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[2] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[3] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[3] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[4] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[4] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[5] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[5] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[6] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[6] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[7] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[7] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[8] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[8] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[9] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[9] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[10] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[10] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[11] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[11] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[12] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[12] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[13] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[13] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[14] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[14] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[15] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[15] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[16] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[16] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[17] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[17] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[18] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[18] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[19] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[19] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[20] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[20] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[21] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[21] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[22] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[22] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[23] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[23] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[24] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[24] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[25] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[25] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[26] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[26] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[27] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[27] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[28] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[28] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[29] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[29] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[30] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[30] 1 1 .names murax.system_cpu.IBusSimplePlugin_rspJoin_rspBuffer_c.io_push_payload_inst[31] murax.system_mainBusDecoder_logic_masterPipelined_rsp_payload_data[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] murax.system_ram._zz_2_[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] murax.system_ram._zz_2_[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] murax.system_ram._zz_2_[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] murax.system_ram._zz_2_[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] murax.system_ram._zz_2_[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] murax.system_ram._zz_2_[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] murax.system_ram._zz_2_[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] murax.system_ram._zz_2_[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] murax.system_ram._zz_2_[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] murax.system_ram._zz_2_[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] murax.system_ram._zz_2_[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[13] murax.system_ram._zz_2_[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[14] murax.system_ram._zz_2_[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[15] murax.system_ram._zz_2_[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[16] murax.system_ram._zz_2_[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[17] murax.system_ram._zz_2_[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[18] murax.system_ram._zz_2_[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[19] murax.system_ram._zz_2_[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[20] murax.system_ram._zz_2_[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[21] murax.system_ram._zz_2_[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[22] murax.system_ram._zz_2_[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[23] murax.system_ram._zz_2_[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[24] murax.system_ram._zz_2_[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[25] murax.system_ram._zz_2_[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[26] murax.system_ram._zz_2_[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[27] murax.system_ram._zz_2_[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[28] murax.system_ram._zz_2_[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[29] murax.system_ram._zz_2_[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[30] murax.system_ram._zz_2_[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[31] murax.system_ram._zz_2_[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] murax.system_ram._zz_3_[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] murax.system_ram._zz_3_[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] murax.system_ram._zz_3_[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] murax.system_ram._zz_3_[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] murax.system_ram._zz_3_[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] murax.system_ram._zz_3_[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] murax.system_ram._zz_3_[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] murax.system_ram._zz_3_[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] murax.system_ram._zz_3_[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] murax.system_ram._zz_3_[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] murax.system_ram._zz_3_[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] murax.system_ram._zz_3_[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] murax.system_ram._zz_3_[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] murax.system_ram._zz_3_[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] murax.system_ram._zz_3_[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] murax.system_ram._zz_3_[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] murax.system_ram._zz_3_[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] murax.system_ram._zz_3_[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] murax.system_ram._zz_3_[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] murax.system_ram._zz_3_[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] murax.system_ram._zz_3_[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] murax.system_ram._zz_3_[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] murax.system_ram._zz_3_[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] murax.system_ram._zz_3_[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] murax.system_ram._zz_3_[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] murax.system_ram._zz_3_[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] murax.system_ram._zz_3_[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] murax.system_ram._zz_3_[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] murax.system_ram._zz_3_[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] murax.system_ram._zz_3_[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] murax.system_ram._zz_3_[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] murax.system_ram._zz_3_[31] 1 1 .names murax.system_ram._zz_6_[0] murax.system_ram._zz_4_[0] 1 1 .names murax.system_ram._zz_6_[1] murax.system_ram._zz_4_[1] 1 1 .names murax.system_ram._zz_6_[2] murax.system_ram._zz_4_[2] 1 1 .names murax.system_ram._zz_6_[3] murax.system_ram._zz_4_[3] 1 1 .names murax.system_ram._zz_6_[4] murax.system_ram._zz_4_[4] 1 1 .names murax.system_ram._zz_6_[5] murax.system_ram._zz_4_[5] 1 1 .names murax.system_ram._zz_6_[6] murax.system_ram._zz_4_[6] 1 1 .names murax.system_ram._zz_6_[7] murax.system_ram._zz_4_[7] 1 1 .names murax.system_ram._zz_7_[0] murax.system_ram._zz_4_[8] 1 1 .names murax.system_ram._zz_7_[1] murax.system_ram._zz_4_[9] 1 1 .names murax.system_ram._zz_7_[2] murax.system_ram._zz_4_[10] 1 1 .names murax.system_ram._zz_7_[3] murax.system_ram._zz_4_[11] 1 1 .names murax.system_ram._zz_7_[4] murax.system_ram._zz_4_[12] 1 1 .names murax.system_ram._zz_7_[5] murax.system_ram._zz_4_[13] 1 1 .names murax.system_ram._zz_7_[6] murax.system_ram._zz_4_[14] 1 1 .names murax.system_ram._zz_7_[7] murax.system_ram._zz_4_[15] 1 1 .names murax.system_ram._zz_8_[0] murax.system_ram._zz_4_[16] 1 1 .names murax.system_ram._zz_8_[1] murax.system_ram._zz_4_[17] 1 1 .names murax.system_ram._zz_8_[2] murax.system_ram._zz_4_[18] 1 1 .names murax.system_ram._zz_8_[3] murax.system_ram._zz_4_[19] 1 1 .names murax.system_ram._zz_8_[4] murax.system_ram._zz_4_[20] 1 1 .names murax.system_ram._zz_8_[5] murax.system_ram._zz_4_[21] 1 1 .names murax.system_ram._zz_8_[6] murax.system_ram._zz_4_[22] 1 1 .names murax.system_ram._zz_8_[7] murax.system_ram._zz_4_[23] 1 1 .names murax.system_ram._zz_9_[0] murax.system_ram._zz_4_[24] 1 1 .names murax.system_ram._zz_9_[1] murax.system_ram._zz_4_[25] 1 1 .names murax.system_ram._zz_9_[2] murax.system_ram._zz_4_[26] 1 1 .names murax.system_ram._zz_9_[3] murax.system_ram._zz_4_[27] 1 1 .names murax.system_ram._zz_9_[4] murax.system_ram._zz_4_[28] 1 1 .names murax.system_ram._zz_9_[5] murax.system_ram._zz_4_[29] 1 1 .names murax.system_ram._zz_9_[6] murax.system_ram._zz_4_[30] 1 1 .names murax.system_ram._zz_9_[7] murax.system_ram._zz_4_[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] murax.system_ram._zz_5_[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] murax.system_ram._zz_5_[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] murax.system_ram._zz_5_[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] murax.system_ram._zz_5_[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] murax.system_ram._zz_5_[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] murax.system_ram._zz_5_[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] murax.system_ram._zz_5_[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] murax.system_ram._zz_5_[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] murax.system_ram._zz_5_[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] murax.system_ram._zz_5_[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] murax.system_ram._zz_5_[10] 1 1 .names $undef murax.system_ram.io_bus_cmd_payload_address[0] 1 1 .names $undef murax.system_ram.io_bus_cmd_payload_address[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[2] murax.system_ram.io_bus_cmd_payload_address[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[3] murax.system_ram.io_bus_cmd_payload_address[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[4] murax.system_ram.io_bus_cmd_payload_address[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[5] murax.system_ram.io_bus_cmd_payload_address[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[6] murax.system_ram.io_bus_cmd_payload_address[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[7] murax.system_ram.io_bus_cmd_payload_address[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[8] murax.system_ram.io_bus_cmd_payload_address[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[9] murax.system_ram.io_bus_cmd_payload_address[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[10] murax.system_ram.io_bus_cmd_payload_address[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[11] murax.system_ram.io_bus_cmd_payload_address[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[12] murax.system_ram.io_bus_cmd_payload_address[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[13] murax.system_ram.io_bus_cmd_payload_address[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[14] murax.system_ram.io_bus_cmd_payload_address[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[15] murax.system_ram.io_bus_cmd_payload_address[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[16] murax.system_ram.io_bus_cmd_payload_address[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[17] murax.system_ram.io_bus_cmd_payload_address[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[18] murax.system_ram.io_bus_cmd_payload_address[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[19] murax.system_ram.io_bus_cmd_payload_address[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[20] murax.system_ram.io_bus_cmd_payload_address[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[21] murax.system_ram.io_bus_cmd_payload_address[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[22] murax.system_ram.io_bus_cmd_payload_address[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[23] murax.system_ram.io_bus_cmd_payload_address[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[24] murax.system_ram.io_bus_cmd_payload_address[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[25] murax.system_ram.io_bus_cmd_payload_address[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[26] murax.system_ram.io_bus_cmd_payload_address[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[27] murax.system_ram.io_bus_cmd_payload_address[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[28] murax.system_ram.io_bus_cmd_payload_address[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[29] murax.system_ram.io_bus_cmd_payload_address[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[30] murax.system_ram.io_bus_cmd_payload_address[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_address[31] murax.system_ram.io_bus_cmd_payload_address[31] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[0] murax.system_ram.io_bus_cmd_payload_data[0] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[1] murax.system_ram.io_bus_cmd_payload_data[1] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[2] murax.system_ram.io_bus_cmd_payload_data[2] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[3] murax.system_ram.io_bus_cmd_payload_data[3] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[4] murax.system_ram.io_bus_cmd_payload_data[4] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[5] murax.system_ram.io_bus_cmd_payload_data[5] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[6] murax.system_ram.io_bus_cmd_payload_data[6] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[7] murax.system_ram.io_bus_cmd_payload_data[7] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[8] murax.system_ram.io_bus_cmd_payload_data[8] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[9] murax.system_ram.io_bus_cmd_payload_data[9] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[10] murax.system_ram.io_bus_cmd_payload_data[10] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[11] murax.system_ram.io_bus_cmd_payload_data[11] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[12] murax.system_ram.io_bus_cmd_payload_data[12] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[13] murax.system_ram.io_bus_cmd_payload_data[13] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[14] murax.system_ram.io_bus_cmd_payload_data[14] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[15] murax.system_ram.io_bus_cmd_payload_data[15] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[16] murax.system_ram.io_bus_cmd_payload_data[16] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[17] murax.system_ram.io_bus_cmd_payload_data[17] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[18] murax.system_ram.io_bus_cmd_payload_data[18] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[19] murax.system_ram.io_bus_cmd_payload_data[19] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[20] murax.system_ram.io_bus_cmd_payload_data[20] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[21] murax.system_ram.io_bus_cmd_payload_data[21] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[22] murax.system_ram.io_bus_cmd_payload_data[22] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[23] murax.system_ram.io_bus_cmd_payload_data[23] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[24] murax.system_ram.io_bus_cmd_payload_data[24] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[25] murax.system_ram.io_bus_cmd_payload_data[25] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[26] murax.system_ram.io_bus_cmd_payload_data[26] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[27] murax.system_ram.io_bus_cmd_payload_data[27] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[28] murax.system_ram.io_bus_cmd_payload_data[28] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[29] murax.system_ram.io_bus_cmd_payload_data[29] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[30] murax.system_ram.io_bus_cmd_payload_data[30] 1 1 .names murax.system_cpu_dBus_cmd_halfPipe_regs_payload_data[31] murax.system_ram.io_bus_cmd_payload_data[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_payload_write murax.system_ram.io_bus_cmd_payload_write 1 1 .names murax.system_ram._zz_6_[0] murax.system_ram.io_bus_rsp_payload_data[0] 1 1 .names murax.system_ram._zz_6_[1] murax.system_ram.io_bus_rsp_payload_data[1] 1 1 .names murax.system_ram._zz_6_[2] murax.system_ram.io_bus_rsp_payload_data[2] 1 1 .names murax.system_ram._zz_6_[3] murax.system_ram.io_bus_rsp_payload_data[3] 1 1 .names murax.system_ram._zz_6_[4] murax.system_ram.io_bus_rsp_payload_data[4] 1 1 .names murax.system_ram._zz_6_[5] murax.system_ram.io_bus_rsp_payload_data[5] 1 1 .names murax.system_ram._zz_6_[6] murax.system_ram.io_bus_rsp_payload_data[6] 1 1 .names murax.system_ram._zz_6_[7] murax.system_ram.io_bus_rsp_payload_data[7] 1 1 .names murax.system_ram._zz_7_[0] murax.system_ram.io_bus_rsp_payload_data[8] 1 1 .names murax.system_ram._zz_7_[1] murax.system_ram.io_bus_rsp_payload_data[9] 1 1 .names murax.system_ram._zz_7_[2] murax.system_ram.io_bus_rsp_payload_data[10] 1 1 .names murax.system_ram._zz_7_[3] murax.system_ram.io_bus_rsp_payload_data[11] 1 1 .names murax.system_ram._zz_7_[4] murax.system_ram.io_bus_rsp_payload_data[12] 1 1 .names murax.system_ram._zz_7_[5] murax.system_ram.io_bus_rsp_payload_data[13] 1 1 .names murax.system_ram._zz_7_[6] murax.system_ram.io_bus_rsp_payload_data[14] 1 1 .names murax.system_ram._zz_7_[7] murax.system_ram.io_bus_rsp_payload_data[15] 1 1 .names murax.system_ram._zz_8_[0] murax.system_ram.io_bus_rsp_payload_data[16] 1 1 .names murax.system_ram._zz_8_[1] murax.system_ram.io_bus_rsp_payload_data[17] 1 1 .names murax.system_ram._zz_8_[2] murax.system_ram.io_bus_rsp_payload_data[18] 1 1 .names murax.system_ram._zz_8_[3] murax.system_ram.io_bus_rsp_payload_data[19] 1 1 .names murax.system_ram._zz_8_[4] murax.system_ram.io_bus_rsp_payload_data[20] 1 1 .names murax.system_ram._zz_8_[5] murax.system_ram.io_bus_rsp_payload_data[21] 1 1 .names murax.system_ram._zz_8_[6] murax.system_ram.io_bus_rsp_payload_data[22] 1 1 .names murax.system_ram._zz_8_[7] murax.system_ram.io_bus_rsp_payload_data[23] 1 1 .names murax.system_ram._zz_9_[0] murax.system_ram.io_bus_rsp_payload_data[24] 1 1 .names murax.system_ram._zz_9_[1] murax.system_ram.io_bus_rsp_payload_data[25] 1 1 .names murax.system_ram._zz_9_[2] murax.system_ram.io_bus_rsp_payload_data[26] 1 1 .names murax.system_ram._zz_9_[3] murax.system_ram.io_bus_rsp_payload_data[27] 1 1 .names murax.system_ram._zz_9_[4] murax.system_ram.io_bus_rsp_payload_data[28] 1 1 .names murax.system_ram._zz_9_[5] murax.system_ram.io_bus_rsp_payload_data[29] 1 1 .names murax.system_ram._zz_9_[6] murax.system_ram.io_bus_rsp_payload_data[30] 1 1 .names murax.system_ram._zz_9_[7] murax.system_ram.io_bus_rsp_payload_data[31] 1 1 .names murax.system_ram._zz_1_ murax.system_ram.io_bus_rsp_valid 1 1 .names io_mainClk murax.system_ram.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_ram.toplevel_resetCtrl_systemReset 1 1 .names murax.system_ram._zz_6_[0] murax.system_ram_io_bus_rsp_payload_data[0] 1 1 .names murax.system_ram._zz_6_[1] murax.system_ram_io_bus_rsp_payload_data[1] 1 1 .names murax.system_ram._zz_6_[2] murax.system_ram_io_bus_rsp_payload_data[2] 1 1 .names murax.system_ram._zz_6_[3] murax.system_ram_io_bus_rsp_payload_data[3] 1 1 .names murax.system_ram._zz_6_[4] murax.system_ram_io_bus_rsp_payload_data[4] 1 1 .names murax.system_ram._zz_6_[5] murax.system_ram_io_bus_rsp_payload_data[5] 1 1 .names murax.system_ram._zz_6_[6] murax.system_ram_io_bus_rsp_payload_data[6] 1 1 .names murax.system_ram._zz_6_[7] murax.system_ram_io_bus_rsp_payload_data[7] 1 1 .names murax.system_ram._zz_7_[0] murax.system_ram_io_bus_rsp_payload_data[8] 1 1 .names murax.system_ram._zz_7_[1] murax.system_ram_io_bus_rsp_payload_data[9] 1 1 .names murax.system_ram._zz_7_[2] murax.system_ram_io_bus_rsp_payload_data[10] 1 1 .names murax.system_ram._zz_7_[3] murax.system_ram_io_bus_rsp_payload_data[11] 1 1 .names murax.system_ram._zz_7_[4] murax.system_ram_io_bus_rsp_payload_data[12] 1 1 .names murax.system_ram._zz_7_[5] murax.system_ram_io_bus_rsp_payload_data[13] 1 1 .names murax.system_ram._zz_7_[6] murax.system_ram_io_bus_rsp_payload_data[14] 1 1 .names murax.system_ram._zz_7_[7] murax.system_ram_io_bus_rsp_payload_data[15] 1 1 .names murax.system_ram._zz_8_[0] murax.system_ram_io_bus_rsp_payload_data[16] 1 1 .names murax.system_ram._zz_8_[1] murax.system_ram_io_bus_rsp_payload_data[17] 1 1 .names murax.system_ram._zz_8_[2] murax.system_ram_io_bus_rsp_payload_data[18] 1 1 .names murax.system_ram._zz_8_[3] murax.system_ram_io_bus_rsp_payload_data[19] 1 1 .names murax.system_ram._zz_8_[4] murax.system_ram_io_bus_rsp_payload_data[20] 1 1 .names murax.system_ram._zz_8_[5] murax.system_ram_io_bus_rsp_payload_data[21] 1 1 .names murax.system_ram._zz_8_[6] murax.system_ram_io_bus_rsp_payload_data[22] 1 1 .names murax.system_ram._zz_8_[7] murax.system_ram_io_bus_rsp_payload_data[23] 1 1 .names murax.system_ram._zz_9_[0] murax.system_ram_io_bus_rsp_payload_data[24] 1 1 .names murax.system_ram._zz_9_[1] murax.system_ram_io_bus_rsp_payload_data[25] 1 1 .names murax.system_ram._zz_9_[2] murax.system_ram_io_bus_rsp_payload_data[26] 1 1 .names murax.system_ram._zz_9_[3] murax.system_ram_io_bus_rsp_payload_data[27] 1 1 .names murax.system_ram._zz_9_[4] murax.system_ram_io_bus_rsp_payload_data[28] 1 1 .names murax.system_ram._zz_9_[5] murax.system_ram_io_bus_rsp_payload_data[29] 1 1 .names murax.system_ram._zz_9_[6] murax.system_ram_io_bus_rsp_payload_data[30] 1 1 .names murax.system_ram._zz_9_[7] murax.system_ram_io_bus_rsp_payload_data[31] 1 1 .names murax.system_ram._zz_1_ murax.system_ram_io_bus_rsp_valid 1 1 .names murax.system_timer.interruptCtrl_1__io_masks__driver[0] murax.system_timer.interruptCtrl_1_.io_masks[0] 1 1 .names murax.system_timer.interruptCtrl_1__io_masks__driver[1] murax.system_timer.interruptCtrl_1_.io_masks[1] 1 1 .names io_mainClk murax.system_timer.interruptCtrl_1_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_timer.interruptCtrl_1_.toplevel_resetCtrl_systemReset 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.system_timer.io_apb_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.system_timer.io_apb_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.system_timer.io_apb_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.system_timer.io_apb_PADDR[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[4] murax.system_timer.io_apb_PADDR[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[5] murax.system_timer.io_apb_PADDR[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[6] murax.system_timer.io_apb_PADDR[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[7] murax.system_timer.io_apb_PADDR[7] 1 1 .names murax.system_apbBridge.state murax.system_timer.io_apb_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_timer.io_apb_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_timer.io_apb_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_timer.io_apb_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_timer.io_apb_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_timer.io_apb_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_timer.io_apb_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_timer.io_apb_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_timer.io_apb_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_timer.io_apb_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_timer.io_apb_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_timer.io_apb_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_timer.io_apb_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_timer.io_apb_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_timer.io_apb_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_timer.io_apb_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_timer.io_apb_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_timer.io_apb_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_timer.io_apb_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_timer.io_apb_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_timer.io_apb_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_timer.io_apb_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_timer.io_apb_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_timer.io_apb_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_timer.io_apb_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_timer.io_apb_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_timer.io_apb_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_timer.io_apb_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_timer.io_apb_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_timer.io_apb_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_timer.io_apb_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_timer.io_apb_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_timer.io_apb_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.system_timer.io_apb_PWRITE 1 1 .names murax.system_cpu.timerInterrupt murax.system_timer.io_interrupt 1 1 .names murax.system_timer._zz_1_[0] murax.system_timer.prescaler_1_.io_limit[0] 1 1 .names murax.system_timer._zz_1_[1] murax.system_timer.prescaler_1_.io_limit[1] 1 1 .names murax.system_timer._zz_1_[2] murax.system_timer.prescaler_1_.io_limit[2] 1 1 .names murax.system_timer._zz_1_[3] murax.system_timer.prescaler_1_.io_limit[3] 1 1 .names murax.system_timer._zz_1_[4] murax.system_timer.prescaler_1_.io_limit[4] 1 1 .names murax.system_timer._zz_1_[5] murax.system_timer.prescaler_1_.io_limit[5] 1 1 .names murax.system_timer._zz_1_[6] murax.system_timer.prescaler_1_.io_limit[6] 1 1 .names murax.system_timer._zz_1_[7] murax.system_timer.prescaler_1_.io_limit[7] 1 1 .names murax.system_timer._zz_1_[8] murax.system_timer.prescaler_1_.io_limit[8] 1 1 .names murax.system_timer._zz_1_[9] murax.system_timer.prescaler_1_.io_limit[9] 1 1 .names murax.system_timer._zz_1_[10] murax.system_timer.prescaler_1_.io_limit[10] 1 1 .names murax.system_timer._zz_1_[11] murax.system_timer.prescaler_1_.io_limit[11] 1 1 .names murax.system_timer._zz_1_[12] murax.system_timer.prescaler_1_.io_limit[12] 1 1 .names murax.system_timer._zz_1_[13] murax.system_timer.prescaler_1_.io_limit[13] 1 1 .names murax.system_timer._zz_1_[14] murax.system_timer.prescaler_1_.io_limit[14] 1 1 .names murax.system_timer._zz_1_[15] murax.system_timer.prescaler_1_.io_limit[15] 1 1 .names io_mainClk murax.system_timer.prescaler_1_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_timer.prescaler_1_.toplevel_resetCtrl_systemReset 1 1 .names murax.system_timer.timerA._zz_1_ murax.system_timer.timerA._zz_2_[0] 1 1 .names $false murax.system_timer.timerA._zz_2_[1] 1 1 .names $false murax.system_timer.timerA._zz_2_[2] 1 1 .names $false murax.system_timer.timerA._zz_2_[3] 1 1 .names $false murax.system_timer.timerA._zz_2_[4] 1 1 .names $false murax.system_timer.timerA._zz_2_[5] 1 1 .names $false murax.system_timer.timerA._zz_2_[6] 1 1 .names $false murax.system_timer.timerA._zz_2_[7] 1 1 .names $false murax.system_timer.timerA._zz_2_[8] 1 1 .names $false murax.system_timer.timerA._zz_2_[9] 1 1 .names $false murax.system_timer.timerA._zz_2_[10] 1 1 .names $false murax.system_timer.timerA._zz_2_[11] 1 1 .names $false murax.system_timer.timerA._zz_2_[12] 1 1 .names $false murax.system_timer.timerA._zz_2_[13] 1 1 .names $false murax.system_timer.timerA._zz_2_[14] 1 1 .names $false murax.system_timer.timerA._zz_2_[15] 1 1 .names murax.system_timer._zz_8_ murax.system_timer.timerA.io_clear 1 1 .names murax.system_timer.timerA_io_limit__driver[0] murax.system_timer.timerA.io_limit[0] 1 1 .names murax.system_timer.timerA_io_limit__driver[1] murax.system_timer.timerA.io_limit[1] 1 1 .names murax.system_timer.timerA_io_limit__driver[2] murax.system_timer.timerA.io_limit[2] 1 1 .names murax.system_timer.timerA_io_limit__driver[3] murax.system_timer.timerA.io_limit[3] 1 1 .names murax.system_timer.timerA_io_limit__driver[4] murax.system_timer.timerA.io_limit[4] 1 1 .names murax.system_timer.timerA_io_limit__driver[5] murax.system_timer.timerA.io_limit[5] 1 1 .names murax.system_timer.timerA_io_limit__driver[6] murax.system_timer.timerA.io_limit[6] 1 1 .names murax.system_timer.timerA_io_limit__driver[7] murax.system_timer.timerA.io_limit[7] 1 1 .names murax.system_timer.timerA_io_limit__driver[8] murax.system_timer.timerA.io_limit[8] 1 1 .names murax.system_timer.timerA_io_limit__driver[9] murax.system_timer.timerA.io_limit[9] 1 1 .names murax.system_timer.timerA_io_limit__driver[10] murax.system_timer.timerA.io_limit[10] 1 1 .names murax.system_timer.timerA_io_limit__driver[11] murax.system_timer.timerA.io_limit[11] 1 1 .names murax.system_timer.timerA_io_limit__driver[12] murax.system_timer.timerA.io_limit[12] 1 1 .names murax.system_timer.timerA_io_limit__driver[13] murax.system_timer.timerA.io_limit[13] 1 1 .names murax.system_timer.timerA_io_limit__driver[14] murax.system_timer.timerA.io_limit[14] 1 1 .names murax.system_timer.timerA_io_limit__driver[15] murax.system_timer.timerA.io_limit[15] 1 1 .names murax.system_timer.timerA.counter[0] murax.system_timer.timerA.io_value[0] 1 1 .names murax.system_timer.timerA.counter[1] murax.system_timer.timerA.io_value[1] 1 1 .names murax.system_timer.timerA.counter[2] murax.system_timer.timerA.io_value[2] 1 1 .names murax.system_timer.timerA.counter[3] murax.system_timer.timerA.io_value[3] 1 1 .names murax.system_timer.timerA.counter[4] murax.system_timer.timerA.io_value[4] 1 1 .names murax.system_timer.timerA.counter[5] murax.system_timer.timerA.io_value[5] 1 1 .names murax.system_timer.timerA.counter[6] murax.system_timer.timerA.io_value[6] 1 1 .names murax.system_timer.timerA.counter[7] murax.system_timer.timerA.io_value[7] 1 1 .names murax.system_timer.timerA.counter[8] murax.system_timer.timerA.io_value[8] 1 1 .names murax.system_timer.timerA.counter[9] murax.system_timer.timerA.io_value[9] 1 1 .names murax.system_timer.timerA.counter[10] murax.system_timer.timerA.io_value[10] 1 1 .names murax.system_timer.timerA.counter[11] murax.system_timer.timerA.io_value[11] 1 1 .names murax.system_timer.timerA.counter[12] murax.system_timer.timerA.io_value[12] 1 1 .names murax.system_timer.timerA.counter[13] murax.system_timer.timerA.io_value[13] 1 1 .names murax.system_timer.timerA.counter[14] murax.system_timer.timerA.io_value[14] 1 1 .names murax.system_timer.timerA.counter[15] murax.system_timer.timerA.io_value[15] 1 1 .names io_mainClk murax.system_timer.timerA.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_timer.timerA.toplevel_resetCtrl_systemReset 1 1 .names murax.system_timer.timerA.counter[0] murax.system_timer.timerA_io_value[0] 1 1 .names murax.system_timer.timerA.counter[1] murax.system_timer.timerA_io_value[1] 1 1 .names murax.system_timer.timerA.counter[2] murax.system_timer.timerA_io_value[2] 1 1 .names murax.system_timer.timerA.counter[3] murax.system_timer.timerA_io_value[3] 1 1 .names murax.system_timer.timerA.counter[4] murax.system_timer.timerA_io_value[4] 1 1 .names murax.system_timer.timerA.counter[5] murax.system_timer.timerA_io_value[5] 1 1 .names murax.system_timer.timerA.counter[6] murax.system_timer.timerA_io_value[6] 1 1 .names murax.system_timer.timerA.counter[7] murax.system_timer.timerA_io_value[7] 1 1 .names murax.system_timer.timerA.counter[8] murax.system_timer.timerA_io_value[8] 1 1 .names murax.system_timer.timerA.counter[9] murax.system_timer.timerA_io_value[9] 1 1 .names murax.system_timer.timerA.counter[10] murax.system_timer.timerA_io_value[10] 1 1 .names murax.system_timer.timerA.counter[11] murax.system_timer.timerA_io_value[11] 1 1 .names murax.system_timer.timerA.counter[12] murax.system_timer.timerA_io_value[12] 1 1 .names murax.system_timer.timerA.counter[13] murax.system_timer.timerA_io_value[13] 1 1 .names murax.system_timer.timerA.counter[14] murax.system_timer.timerA_io_value[14] 1 1 .names murax.system_timer.timerA.counter[15] murax.system_timer.timerA_io_value[15] 1 1 .names murax.system_timer.timerB._zz_1_ murax.system_timer.timerB._zz_2_[0] 1 1 .names $false murax.system_timer.timerB._zz_2_[1] 1 1 .names $false murax.system_timer.timerB._zz_2_[2] 1 1 .names $false murax.system_timer.timerB._zz_2_[3] 1 1 .names $false murax.system_timer.timerB._zz_2_[4] 1 1 .names $false murax.system_timer.timerB._zz_2_[5] 1 1 .names $false murax.system_timer.timerB._zz_2_[6] 1 1 .names $false murax.system_timer.timerB._zz_2_[7] 1 1 .names $false murax.system_timer.timerB._zz_2_[8] 1 1 .names $false murax.system_timer.timerB._zz_2_[9] 1 1 .names $false murax.system_timer.timerB._zz_2_[10] 1 1 .names $false murax.system_timer.timerB._zz_2_[11] 1 1 .names $false murax.system_timer.timerB._zz_2_[12] 1 1 .names $false murax.system_timer.timerB._zz_2_[13] 1 1 .names $false murax.system_timer.timerB._zz_2_[14] 1 1 .names $false murax.system_timer.timerB._zz_2_[15] 1 1 .names murax.system_timer._zz_10_ murax.system_timer.timerB.io_clear 1 1 .names murax.system_timer.timerB_io_limit__driver[0] murax.system_timer.timerB.io_limit[0] 1 1 .names murax.system_timer.timerB_io_limit__driver[1] murax.system_timer.timerB.io_limit[1] 1 1 .names murax.system_timer.timerB_io_limit__driver[2] murax.system_timer.timerB.io_limit[2] 1 1 .names murax.system_timer.timerB_io_limit__driver[3] murax.system_timer.timerB.io_limit[3] 1 1 .names murax.system_timer.timerB_io_limit__driver[4] murax.system_timer.timerB.io_limit[4] 1 1 .names murax.system_timer.timerB_io_limit__driver[5] murax.system_timer.timerB.io_limit[5] 1 1 .names murax.system_timer.timerB_io_limit__driver[6] murax.system_timer.timerB.io_limit[6] 1 1 .names murax.system_timer.timerB_io_limit__driver[7] murax.system_timer.timerB.io_limit[7] 1 1 .names murax.system_timer.timerB_io_limit__driver[8] murax.system_timer.timerB.io_limit[8] 1 1 .names murax.system_timer.timerB_io_limit__driver[9] murax.system_timer.timerB.io_limit[9] 1 1 .names murax.system_timer.timerB_io_limit__driver[10] murax.system_timer.timerB.io_limit[10] 1 1 .names murax.system_timer.timerB_io_limit__driver[11] murax.system_timer.timerB.io_limit[11] 1 1 .names murax.system_timer.timerB_io_limit__driver[12] murax.system_timer.timerB.io_limit[12] 1 1 .names murax.system_timer.timerB_io_limit__driver[13] murax.system_timer.timerB.io_limit[13] 1 1 .names murax.system_timer.timerB_io_limit__driver[14] murax.system_timer.timerB.io_limit[14] 1 1 .names murax.system_timer.timerB_io_limit__driver[15] murax.system_timer.timerB.io_limit[15] 1 1 .names murax.system_timer.timerB.counter[0] murax.system_timer.timerB.io_value[0] 1 1 .names murax.system_timer.timerB.counter[1] murax.system_timer.timerB.io_value[1] 1 1 .names murax.system_timer.timerB.counter[2] murax.system_timer.timerB.io_value[2] 1 1 .names murax.system_timer.timerB.counter[3] murax.system_timer.timerB.io_value[3] 1 1 .names murax.system_timer.timerB.counter[4] murax.system_timer.timerB.io_value[4] 1 1 .names murax.system_timer.timerB.counter[5] murax.system_timer.timerB.io_value[5] 1 1 .names murax.system_timer.timerB.counter[6] murax.system_timer.timerB.io_value[6] 1 1 .names murax.system_timer.timerB.counter[7] murax.system_timer.timerB.io_value[7] 1 1 .names murax.system_timer.timerB.counter[8] murax.system_timer.timerB.io_value[8] 1 1 .names murax.system_timer.timerB.counter[9] murax.system_timer.timerB.io_value[9] 1 1 .names murax.system_timer.timerB.counter[10] murax.system_timer.timerB.io_value[10] 1 1 .names murax.system_timer.timerB.counter[11] murax.system_timer.timerB.io_value[11] 1 1 .names murax.system_timer.timerB.counter[12] murax.system_timer.timerB.io_value[12] 1 1 .names murax.system_timer.timerB.counter[13] murax.system_timer.timerB.io_value[13] 1 1 .names murax.system_timer.timerB.counter[14] murax.system_timer.timerB.io_value[14] 1 1 .names murax.system_timer.timerB.counter[15] murax.system_timer.timerB.io_value[15] 1 1 .names io_mainClk murax.system_timer.timerB.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_timer.timerB.toplevel_resetCtrl_systemReset 1 1 .names murax.system_timer.timerB.counter[0] murax.system_timer.timerB_io_value[0] 1 1 .names murax.system_timer.timerB.counter[1] murax.system_timer.timerB_io_value[1] 1 1 .names murax.system_timer.timerB.counter[2] murax.system_timer.timerB_io_value[2] 1 1 .names murax.system_timer.timerB.counter[3] murax.system_timer.timerB_io_value[3] 1 1 .names murax.system_timer.timerB.counter[4] murax.system_timer.timerB_io_value[4] 1 1 .names murax.system_timer.timerB.counter[5] murax.system_timer.timerB_io_value[5] 1 1 .names murax.system_timer.timerB.counter[6] murax.system_timer.timerB_io_value[6] 1 1 .names murax.system_timer.timerB.counter[7] murax.system_timer.timerB_io_value[7] 1 1 .names murax.system_timer.timerB.counter[8] murax.system_timer.timerB_io_value[8] 1 1 .names murax.system_timer.timerB.counter[9] murax.system_timer.timerB_io_value[9] 1 1 .names murax.system_timer.timerB.counter[10] murax.system_timer.timerB_io_value[10] 1 1 .names murax.system_timer.timerB.counter[11] murax.system_timer.timerB_io_value[11] 1 1 .names murax.system_timer.timerB.counter[12] murax.system_timer.timerB_io_value[12] 1 1 .names murax.system_timer.timerB.counter[13] murax.system_timer.timerB_io_value[13] 1 1 .names murax.system_timer.timerB.counter[14] murax.system_timer.timerB_io_value[14] 1 1 .names murax.system_timer.timerB.counter[15] murax.system_timer.timerB_io_value[15] 1 1 .names io_mainClk murax.system_timer.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_timer.toplevel_resetCtrl_systemReset 1 1 .names murax.system_cpu.timerInterrupt murax.system_timerInterrupt 1 1 .names murax.system_cpu.timerInterrupt murax.system_timer_io_interrupt 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_uartCtrl._zz_2_[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_uartCtrl._zz_2_[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_uartCtrl._zz_2_[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_uartCtrl._zz_2_[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_uartCtrl._zz_2_[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_uartCtrl._zz_2_[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_uartCtrl._zz_2_[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_uartCtrl._zz_2_[7] 1 1 .names murax.system_cpu.externalInterrupt murax.system_uartCtrl.bridge_interruptCtrl_interrupt 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_uartCtrl.bridge_write_streamUnbuffered_payload[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_uartCtrl.bridge_write_streamUnbuffered_payload[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_uartCtrl.bridge_write_streamUnbuffered_payload[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_uartCtrl.bridge_write_streamUnbuffered_payload[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_uartCtrl.bridge_write_streamUnbuffered_payload[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_uartCtrl.bridge_write_streamUnbuffered_payload[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_uartCtrl.bridge_write_streamUnbuffered_payload[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_uartCtrl.bridge_write_streamUnbuffered_payload[7] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_4_ 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_5_[0] 1 1 .names $false murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_5_[1] 1 1 .names $false murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_5_[2] 1 1 .names $false murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_5_[3] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_6_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_7_[0] 1 1 .names $false murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_7_[1] 1 1 .names $false murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_7_[2] 1 1 .names $false murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_7_[3] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[0] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_occupancy[0] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[1] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_occupancy[1] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[2] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_occupancy[2] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[3] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_occupancy[3] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[0] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_pop_payload[0] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[1] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_pop_payload[1] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[2] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_pop_payload[2] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[3] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_pop_payload[3] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[4] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_pop_payload[4] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[5] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_pop_payload[5] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[6] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_pop_payload[6] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[7] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_pop_payload[7] 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_payload[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_payload[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_payload[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_payload[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_payload[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_payload[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_payload[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_payload[7] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_6_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popPtr_willIncrement 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_6_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_popping 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushPtr_willIncrement 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_1_ murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_pushing 1 1 .names io_mainClk murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.toplevel_resetCtrl_systemReset 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[0] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_occupancy[0] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[1] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_occupancy[1] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[2] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_occupancy[2] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.logic_ptrDif[3] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_occupancy[3] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_occupancy[4] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_occupancy[4] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[0] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_pop_payload[0] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[1] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_pop_payload[1] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[2] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_pop_payload[2] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[3] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_pop_payload[3] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[4] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_pop_payload[4] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[5] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_pop_payload[5] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[6] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_pop_payload[6] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[7] murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_pop_payload[7] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_ready murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy_io_push_ready 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy.io_push_ready murax.system_uartCtrl.bridge_write_streamUnbuffered_ready 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[0] murax.system_uartCtrl.io_apb_PADDR[0] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[1] murax.system_uartCtrl.io_apb_PADDR[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[2] murax.system_uartCtrl.io_apb_PADDR[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_address[3] murax.system_uartCtrl.io_apb_PADDR[3] 1 1 .names murax.system_apbBridge.state murax.system_uartCtrl.io_apb_PENABLE 1 1 .names murax.system_uartCtrl._zz_6_ murax.system_uartCtrl.io_apb_PWDATA[0] 1 1 .names murax.system_uartCtrl._zz_7_ murax.system_uartCtrl.io_apb_PWDATA[1] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[2] murax.system_uartCtrl.io_apb_PWDATA[2] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[3] murax.system_uartCtrl.io_apb_PWDATA[3] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[4] murax.system_uartCtrl.io_apb_PWDATA[4] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[5] murax.system_uartCtrl.io_apb_PWDATA[5] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[6] murax.system_uartCtrl.io_apb_PWDATA[6] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[7] murax.system_uartCtrl.io_apb_PWDATA[7] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[8] murax.system_uartCtrl.io_apb_PWDATA[8] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[9] murax.system_uartCtrl.io_apb_PWDATA[9] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[10] murax.system_uartCtrl.io_apb_PWDATA[10] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[11] murax.system_uartCtrl.io_apb_PWDATA[11] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[12] murax.system_uartCtrl.io_apb_PWDATA[12] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[13] murax.system_uartCtrl.io_apb_PWDATA[13] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[14] murax.system_uartCtrl.io_apb_PWDATA[14] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[15] murax.system_uartCtrl.io_apb_PWDATA[15] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[16] murax.system_uartCtrl.io_apb_PWDATA[16] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[17] murax.system_uartCtrl.io_apb_PWDATA[17] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[18] murax.system_uartCtrl.io_apb_PWDATA[18] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[19] murax.system_uartCtrl.io_apb_PWDATA[19] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[20] murax.system_uartCtrl.io_apb_PWDATA[20] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[21] murax.system_uartCtrl.io_apb_PWDATA[21] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[22] murax.system_uartCtrl.io_apb_PWDATA[22] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[23] murax.system_uartCtrl.io_apb_PWDATA[23] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[24] murax.system_uartCtrl.io_apb_PWDATA[24] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[25] murax.system_uartCtrl.io_apb_PWDATA[25] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[26] murax.system_uartCtrl.io_apb_PWDATA[26] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[27] murax.system_uartCtrl.io_apb_PWDATA[27] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[28] murax.system_uartCtrl.io_apb_PWDATA[28] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[29] murax.system_uartCtrl.io_apb_PWDATA[29] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[30] murax.system_uartCtrl.io_apb_PWDATA[30] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_data[31] murax.system_uartCtrl.io_apb_PWDATA[31] 1 1 .names murax.system_apbBridge.io_pipelinedMemoryBus_cmd_halfPipe_regs_payload_write murax.system_uartCtrl.io_apb_PWRITE 1 1 .names murax.system_cpu.externalInterrupt murax.system_uartCtrl.io_interrupt 1 1 .names io_B10 murax.system_uartCtrl.io_uart_rxd 1 1 .names murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext murax.system_uartCtrl.io_uart_txd 1 1 .names io_mainClk murax.system_uartCtrl.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_uartCtrl.toplevel_resetCtrl_systemReset 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick murax.system_uartCtrl.uartCtrl_1_.clockDivider_tick 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[0] murax.system_uartCtrl.uartCtrl_1_.io_read_payload[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[1] murax.system_uartCtrl.uartCtrl_1_.io_read_payload[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[2] murax.system_uartCtrl.uartCtrl_1_.io_read_payload[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[3] murax.system_uartCtrl.uartCtrl_1_.io_read_payload[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[4] murax.system_uartCtrl.uartCtrl_1_.io_read_payload[4] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[5] murax.system_uartCtrl.uartCtrl_1_.io_read_payload[5] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[6] murax.system_uartCtrl.uartCtrl_1_.io_read_payload[6] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[7] murax.system_uartCtrl.uartCtrl_1_.io_read_payload[7] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_validReg murax.system_uartCtrl.uartCtrl_1_.io_read_valid 1 1 .names io_B10 murax.system_uartCtrl.uartCtrl_1_.io_uart_rxd 1 1 .names murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext murax.system_uartCtrl.uartCtrl_1_.io_uart_txd 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[0] murax.system_uartCtrl.uartCtrl_1_.io_write_payload[0] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[1] murax.system_uartCtrl.uartCtrl_1_.io_write_payload[1] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[2] murax.system_uartCtrl.uartCtrl_1_.io_write_payload[2] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[3] murax.system_uartCtrl.uartCtrl_1_.io_write_payload[3] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[4] murax.system_uartCtrl.uartCtrl_1_.io_write_payload[4] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[5] murax.system_uartCtrl.uartCtrl_1_.io_write_payload[5] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[6] murax.system_uartCtrl.uartCtrl_1_.io_write_payload[6] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[7] murax.system_uartCtrl.uartCtrl_1_.io_write_payload[7] 1 1 .names io_B10 murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.io_dataIn 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_1 murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.io_dataOut 1 1 .names io_mainClk murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.toplevel_resetCtrl_systemReset 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_1 murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4__io_dataOut 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[0] murax.system_uartCtrl.uartCtrl_1_.rx.io_read_payload[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[1] murax.system_uartCtrl.uartCtrl_1_.rx.io_read_payload[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[2] murax.system_uartCtrl.uartCtrl_1_.rx.io_read_payload[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[3] murax.system_uartCtrl.uartCtrl_1_.rx.io_read_payload[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[4] murax.system_uartCtrl.uartCtrl_1_.rx.io_read_payload[4] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[5] murax.system_uartCtrl.uartCtrl_1_.rx.io_read_payload[5] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[6] murax.system_uartCtrl.uartCtrl_1_.rx.io_read_payload[6] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[7] murax.system_uartCtrl.uartCtrl_1_.rx.io_read_payload[7] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_validReg murax.system_uartCtrl.uartCtrl_1_.rx.io_read_valid 1 1 .names io_B10 murax.system_uartCtrl.uartCtrl_1_.rx.io_rxd 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_1 murax.system_uartCtrl.uartCtrl_1_.rx.sampler_samples_0 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.bufferCC_4_.buffers_1 murax.system_uartCtrl.uartCtrl_1_.rx.sampler_synchroniser 1 1 .names io_mainClk murax.system_uartCtrl.uartCtrl_1_.rx.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_uartCtrl.uartCtrl_1_.rx.toplevel_resetCtrl_systemReset 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[0] murax.system_uartCtrl.uartCtrl_1_.rx_io_read_payload[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[1] murax.system_uartCtrl.uartCtrl_1_.rx_io_read_payload[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[2] murax.system_uartCtrl.uartCtrl_1_.rx_io_read_payload[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[3] murax.system_uartCtrl.uartCtrl_1_.rx_io_read_payload[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[4] murax.system_uartCtrl.uartCtrl_1_.rx_io_read_payload[4] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[5] murax.system_uartCtrl.uartCtrl_1_.rx_io_read_payload[5] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[6] murax.system_uartCtrl.uartCtrl_1_.rx_io_read_payload[6] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[7] murax.system_uartCtrl.uartCtrl_1_.rx_io_read_payload[7] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_validReg murax.system_uartCtrl.uartCtrl_1_.rx_io_read_valid 1 1 .names io_mainClk murax.system_uartCtrl.uartCtrl_1_.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_uartCtrl.uartCtrl_1_.toplevel_resetCtrl_systemReset 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick murax.system_uartCtrl.uartCtrl_1_.tx._zz_2_ 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick murax.system_uartCtrl.uartCtrl_1_.tx._zz_3_[0] 1 1 .names $false murax.system_uartCtrl.uartCtrl_1_.tx._zz_3_[1] 1 1 .names $false murax.system_uartCtrl.uartCtrl_1_.tx._zz_3_[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick murax.system_uartCtrl.uartCtrl_1_.tx.clockDivider_counter_willIncrement 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.io_samplingTick murax.system_uartCtrl.uartCtrl_1_.tx.io_samplingTick 1 1 .names murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext murax.system_uartCtrl.uartCtrl_1_.tx.io_txd 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[0] murax.system_uartCtrl.uartCtrl_1_.tx.io_write_payload[0] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[1] murax.system_uartCtrl.uartCtrl_1_.tx.io_write_payload[1] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[2] murax.system_uartCtrl.uartCtrl_1_.tx.io_write_payload[2] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[3] murax.system_uartCtrl.uartCtrl_1_.tx.io_write_payload[3] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[4] murax.system_uartCtrl.uartCtrl_1_.tx.io_write_payload[4] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[5] murax.system_uartCtrl.uartCtrl_1_.tx.io_write_payload[5] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[6] murax.system_uartCtrl.uartCtrl_1_.tx.io_write_payload[6] 1 1 .names murax.system_uartCtrl.bridge_write_streamUnbuffered_queueWithOccupancy._zz_3_[7] murax.system_uartCtrl.uartCtrl_1_.tx.io_write_payload[7] 1 1 .names io_mainClk murax.system_uartCtrl.uartCtrl_1_.tx.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_uartCtrl.uartCtrl_1_.tx.toplevel_resetCtrl_systemReset 1 1 .names murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext murax.system_uartCtrl.uartCtrl_1_.tx_io_txd 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[0] murax.system_uartCtrl.uartCtrl_1__io_read_payload[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[1] murax.system_uartCtrl.uartCtrl_1__io_read_payload[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[2] murax.system_uartCtrl.uartCtrl_1__io_read_payload[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[3] murax.system_uartCtrl.uartCtrl_1__io_read_payload[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[4] murax.system_uartCtrl.uartCtrl_1__io_read_payload[4] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[5] murax.system_uartCtrl.uartCtrl_1__io_read_payload[5] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[6] murax.system_uartCtrl.uartCtrl_1__io_read_payload[6] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[7] murax.system_uartCtrl.uartCtrl_1__io_read_payload[7] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_4_ 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_5_[0] 1 1 .names $false murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_5_[1] 1 1 .names $false murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_5_[2] 1 1 .names $false murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_5_[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_6_ murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_7_[0] 1 1 .names $false murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_7_[1] 1 1 .names $false murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_7_[2] 1 1 .names $false murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_7_[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[0] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_occupancy[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[1] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_occupancy[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[2] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_occupancy[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[3] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_occupancy[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[0] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_pop_payload[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[1] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_pop_payload[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[2] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_pop_payload[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[3] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_pop_payload[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[4] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_pop_payload[4] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[5] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_pop_payload[5] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[6] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_pop_payload[6] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[7] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_pop_payload[7] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[0] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_payload[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[1] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_payload[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[2] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_payload[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[3] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_payload[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[4] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_payload[4] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[5] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_payload[5] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[6] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_payload[6] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_shifter[7] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_payload[7] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_validReg murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_push_valid 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_6_ murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popPtr_willIncrement 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_6_ murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_popping 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushPtr_willIncrement 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_1_ murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_pushing 1 1 .names io_mainClk murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.toplevel_io_mainClk 1 1 .names murax.resetCtrl_systemReset murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.toplevel_resetCtrl_systemReset 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[0] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_occupancy[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[1] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_occupancy[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[2] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_occupancy[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.logic_ptrDif[3] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_occupancy[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy.io_occupancy[4] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_occupancy[4] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[0] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_pop_payload[0] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[1] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_pop_payload[1] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[2] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_pop_payload[2] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[3] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_pop_payload[3] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[4] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_pop_payload[4] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[5] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_pop_payload[5] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[6] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_pop_payload[6] 1 1 .names murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy._zz_3_[7] murax.system_uartCtrl.uartCtrl_1__io_read_queueWithOccupancy_io_pop_payload[7] 1 1 .names murax.system_uartCtrl.uartCtrl_1_.rx.stateMachine_validReg murax.system_uartCtrl.uartCtrl_1__io_read_valid 1 1 .names murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext murax.system_uartCtrl.uartCtrl_1__io_uart_txd 1 1 .names murax.system_cpu.externalInterrupt murax.system_uartCtrl_io_interrupt 1 1 .names murax.system_uartCtrl.uartCtrl_1_.tx.stateMachine_txd_regNext murax.system_uartCtrl_io_uart_txd 1 1 .end