auxFormat.h 8.4 KB
Newer Older
Zhao Xuefeng committed
1 2 3 4 5 6 7 8 9 10 11 12 13

#include"crypto_aead.h"
#include"api.h"
#include  <string.h>
#include <stdio.h>
#include <stdlib.h>
#define U32BIG(x) (x)
#define U16BIG(x) (x)

typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
typedef unsigned long long u64;
Wentao Zhang committed
14

Wentao Zhang committed
15 16 17 18 19 20
#define puckU32ToThree_1(x){\
x &= 0x49249249;\
x = (x | (x >>  2)) & 0xc30c30c3;\
x = (x | (x >>4)) & 0x0f00f00f;\
x = (x | (x >> 8)) & 0xff0000ff;\
x = (x | (x >> 16)) & 0xfff;\
Zhao Xuefeng committed
21
}
Wentao Zhang committed
22 23 24 25 26 27
#define unpuckU32ToThree_1(x){\
x &= 0xfff;\
x = (x | (x << 16)) & 0xff0000ff;\
x = (x | (x << 8)) & 0x0f00f00f;\
x = (x | (x << 4)) & 0xc30c30c3;\
x = (x | (x << 2)) & 0x49249249;\
Zhao Xuefeng committed
28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111
}
void ROUND384_Three(unsigned int *s, unsigned char  *c,int lunnum);
#define ARC(rci) \
  do { \
    __asm__ __volatile__ ( \
    		"/*add round const   s0 s1 s2 */           \n\t"\
		"ands %[t1], %[rci], #0xc0\n\t" \
	    "eors %[S_0],  %[S_0], %[t1], LSR  #6 \n\t"   /*s[0] ^= (constant7Format[lunNum] >> 6) & 0x3;*/\
        "ands %[t1], %[rci], #0x38\n\t" \
	    "eors %[S_1],  %[S_1], %[t1], LSR  #3 \n\t"   /*s[0] ^= (constant7Format[lunNum] >> 6) & 0x3;*/\
	    "ands %[t1], %[rci], #0x7\n\t" \
	    "eors %[S_3],  %[S_3], %[t1]       \n\t"   /*s[2] ^= constant7Format[lunNum] & 0x7;*/\
    : /* output variables - including inputs that are changed */\
		[t1]  "=r" (t1),    [rci] "+r" (rci), \
		[S_0] "+r" (s[0]), [S_1] "+r" (s[1]), [S_3] "+r" (s[2])\
		: : );\
}while (0)
#define SBOX(S1,S2,S3,S4) \
  do { \
    __asm__ __volatile__ ( \
            "/*sbox   column*/         \n\t"\
   	        "mvns    %[S_0],     %[S_0]            \n\t"\
   	        "ands    %[t1],      %[S_2], %[S_0]        \n\t"\
   	        "eors    %[t1],      %[S_4], %[t1]        \n\t"\
   	        "orrs    %[S_4],     %[S_2], %[S_4]        \n\t"\
   	        "eors    %[S_0],     %[S_6], %[S_0]        \n\t"\
   	        "eors    %[S_4],     %[S_4], %[S_0]        \n\t"\
   	        "eors    %[t2],      %[S_2], %[S_6]        \n\t"\
   	        "eors    %[S_6],     %[S_6], %[t1]        \n\t"\
   	        "ands    %[S_0],     %[t1] , %[S_0]        \n\t"\
   	        "eors    %[S_0],     %[t2] , %[S_0]        \n\t"\
   	        "ands    %[S_2],     %[S_4], %[t2]       \n\t"\
   	        "eors    %[S_2],     %[t1] , %[S_2]        \n\t"\
    : /* output variables - including inputs that are changed */\
		[t1] "=r" (t1), [t2] "=r" (t2),\
		[S_0] "+r" (S1), [S_2] "+r" (S2), [S_4] "+r" (S3), [S_6] "+r" (S4) \
		: : );\
}while (0)
#define SBOX1(S1,S2,S3,S4) \
  do { \
    __asm__ __volatile__ ( \
            "/*sbox   column*/         \n\t"\
			"ROR      %[S_4]  ,   #30     \n\t"\
			"ROR      %[S_6]  ,   #14     \n\t"\
   	        "mvns    %[S_0],     %[S_0]            \n\t"\
   	        "ands    %[t1],      %[S_2], %[S_0]        \n\t"\
   	        "eors    %[t1],      %[S_4], %[t1]        \n\t"\
   	        "orrs    %[S_4],     %[S_2], %[S_4]        \n\t"\
   	        "eors    %[S_0],     %[S_6], %[S_0]        \n\t"\
   	        "eors    %[S_4],     %[S_4], %[S_0]        \n\t"\
   	        "eors    %[t2],      %[S_2], %[S_6]        \n\t"\
   	        "eors    %[S_6],     %[S_6], %[t1]        \n\t"\
   	        "ands    %[S_0],     %[t1] , %[S_0]        \n\t"\
   	        "eors    %[S_0],     %[t2] , %[S_0]        \n\t"\
   	        "ands    %[S_2],     %[S_4], %[t2]       \n\t"\
   	        "eors    %[S_2],     %[t1] , %[S_2]        \n\t"\
    : /* output variables - including inputs that are changed */\
		[t1] "=r" (t1), [t2] "=r" (t2),\
		[S_0] "+r" (S1), [S_2] "+r" (S2), [S_4] "+r" (S3), [S_6] "+r" (S4) \
		: : );\
}while (0)
#define SBOX2(S1,S2,S3,S4) \
  do { \
    __asm__ __volatile__ ( \
            "/*sbox   column*/         \n\t"\
"ROR      %[S_4]  ,   #29     \n\t"\
"ROR      %[S_6]  ,   #14     \n\t"\
   	        "mvns    %[S_0],     %[S_0]            \n\t"\
   	        "ands    %[t1],      %[S_2], %[S_0]        \n\t"\
   	        "eors    %[t1],      %[S_4], %[t1]        \n\t"\
   	        "orrs    %[S_4],     %[S_2], %[S_4]        \n\t"\
   	        "eors    %[S_0],     %[S_6], %[S_0]        \n\t"\
   	        "eors    %[S_4],     %[S_4], %[S_0]        \n\t"\
   	        "eors    %[t2],      %[S_2], %[S_6]        \n\t"\
   	        "eors    %[S_6],     %[S_6], %[t1]        \n\t"\
   	        "ands    %[S_0],     %[t1] , %[S_0]        \n\t"\
   	        "eors    %[S_0],     %[t2] , %[S_0]        \n\t"\
   	        "ands    %[S_2],     %[S_4], %[t2]       \n\t"\
   	        "eors    %[S_2],     %[t1] , %[S_2]        \n\t"\
    : /* output variables - including inputs that are changed */\
		[t1] "=r" (t1), [t2] "=r" (t2),\
		[S_0] "+r" (S1), [S_2] "+r" (S2), [S_4] "+r" (S3), [S_6] "+r" (S4) \
		: : );\
}while (0)
Wentao Zhang committed
112

Zhao Xuefeng committed
113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165
#define SBOX3(S1,S2,S3,S4) \
  do { \
    __asm__ __volatile__ ( \
            "/*sbox   column*/         \n\t"\
			"ROR      %[S_2]  ,   #31     \n\t"\
			"ROR      %[S_4]  ,   #29     \n\t"\
			"ROR      %[S_6]  ,   #13     \n\t"\
   	        "mvns    %[S_0],     %[S_0]            \n\t"\
   	        "ands    %[t1],      %[S_2], %[S_0]        \n\t"\
   	        "eors    %[t1],      %[S_4], %[t1]        \n\t"\
   	        "orrs    %[S_4],     %[S_2], %[S_4]        \n\t"\
   	        "eors    %[S_0],     %[S_6], %[S_0]        \n\t"\
   	        "eors    %[S_4],     %[S_4], %[S_0]        \n\t"\
   	        "eors    %[t2],      %[S_2], %[S_6]        \n\t"\
   	        "eors    %[S_6],     %[S_6], %[t1]        \n\t"\
   	        "ands    %[S_0],     %[t1] , %[S_0]        \n\t"\
   	        "eors    %[S_0],     %[t2] , %[S_0]        \n\t"\
   	        "ands    %[S_2],     %[S_4], %[t2]       \n\t"\
   	        "eors    %[S_2],     %[t1] , %[S_2]        \n\t"\
    : /* output variables - including inputs that are changed */\
		[t1] "=r" (t1), [t2] "=r" (t2),\
		[S_0] "+r" (S1), [S_2] "+r" (S2), [S_4] "+r" (S3), [S_6] "+r" (S4) \
		: : );\
}while (0)
#define  P384_1( s,  round,  lunNum) {\
		u32 t1;\
		ROUND384_Three(s,round,lunNum);\
	    __asm__ __volatile__ ( \
		"/*rotate shift left 1 bit  [w9 w5 w1-> (w1,1) w9 w5] */   \n\t"\
			"mov    %[t1],      %[S_3]       \n\t"\
			"mov    %[S_3],     %[S_4]       \n\t"\
			"mov    %[S_4],     %[S_5]       \n\t"\
			"ROR    %[S_5],     %[t1]   , #31        \n\t"\
		"/*rotate shift left 8 bits [w10 w6 w2-> (w6,3)  (w2,3)  ( w10,2)]*/  \n\t"\
			"mov    %[t1],      %[S_8]       \n\t"\
			"ROR    %[S_8],     %[S_7]  , #29      \n\t"\
			"ROR    %[S_7],     %[S_6]  , #29      \n\t"\
			"ROR    %[S_6],     %[t1]   , #30        \n\t"\
		"/*rotate shift left 55 bit  [w11 w7 w3-> (w3,13)  (w11,14)  ( w7,14)] */   \n\t"\
			"mov    %[t1],      %[S_9]       \n\t"\
			"ROR    %[S_9],     %[S_10] , #14      \n\t"\
			"ROR    %[S_10],    %[S_11] , #14      \n\t"\
			"ROR    %[S_11],    %[t1]   , #13        \n\t"\
	    : /* output variables - including inputs that are changed */\
		 [t1] "=r" (t1),\
		 [S_3] "+r" (s[3]), [S_6] "+r" (s[6]), [S_9] "+r" (s[9]) ,\
		 [S_4] "+r" (s[4]), [S_7] "+r" (s[7]), [S_10] "+r" (s[10]),\
		 [S_5] "+r" (s[5]), [S_8] "+r" (s[8]), [S_11] "+r" (s[11])\
		 : : );\
}
#define  P384_2( s,  round,  lunNum) {\
		u32 t1,rci;\
		ROUND384_Three(s,round,lunNum);\
Wentao Zhang committed
166 167 168 169 170 171
				rci=round[lunNum*3+1];\
		ARC(rci);\
		SBOX1(s[0], s[4], s[8], s[10] );\
		SBOX2(s[1], s[5], s[6], s[11]);\
		SBOX3(s[2], s[3], s[7], s[9]);\
		__asm__ __volatile__ ( \
Zhao Xuefeng committed
172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194
	    "/*rotate shift left 1 bit  [w9 w5 w1-> (w1,1) w9 w5] */   \n\t"\
			"mov    %[t1],      %[S_4]       \n\t"\
			"mov    %[S_4],     %[S_3]       \n\t"\
			"mov    %[S_3],     %[S_5]       \n\t"\
			"ROR    %[S_5],     %[t1]   , #31        \n\t"\
	    "/*rotate shift left 8 bits [w10 w6 w2-> (w6,3)  (w2,3)  ( w10,2)]*/  \n\t"\
			"mov    %[t1],      %[S_8]       \n\t"\
			"ROR    %[S_8],     %[S_6]  , #29      \n\t"\
			"ROR    %[S_6],     %[S_7]  , #30      \n\t"\
			"ROR    %[S_7],     %[t1]   , #29        \n\t"\
	    "/*rotate shift left 55 bit  [w11 w7 w3-> (w3,13)  (w11,14)  ( w7,14)] */   \n\t"\
			"mov    %[t1],      %[S_10]       \n\t"\
			"ROR    %[S_10],     %[S_9] , #14      \n\t"\
			"ROR    %[S_9],    %[S_11] , #14      \n\t"\
			"ROR    %[S_11],    %[t1]   , #13       \n\t"\
	    : /* output variables - including inputs that are changed */\
		 [t1] "=r" (t1),\
		 [S_3] "+r" (s[3]), [S_6] "+r" (s[6]), [S_9] "+r" (s[9]) ,\
		 [S_4] "+r" (s[4]), [S_7] "+r" (s[7]), [S_10] "+r" (s[10]),\
		 [S_5] "+r" (s[5]), [S_8] "+r" (s[8]), [S_11] "+r" (s[11])\
		 : : );\
}