auxFormat.h 5.69 KB
Newer Older
Zhao Xuefeng committed
1

KNOT team committed
2 3
#include"crypto_aead.h"
#include"api.h"
Zhao Xuefeng committed
4
#include  <string.h>
KNOT team committed
5 6 7 8 9 10 11 12
#include <stdio.h>
#include <stdlib.h>
#define U32BIG(x) (x)

typedef unsigned char u8;
typedef unsigned int u32;
typedef unsigned long long u64;

Zhao Xuefeng committed
13 14 15 16
#define aead_RATE (192 / 8)
#define PR0_ROUNDS 76
#define PR_ROUNDS 28
#define PRF_ROUNDS 32
Wentao Zhang committed
17
/*
Zhao Xuefeng committed
18

Wentao Zhang committed
19 20 21 22 23 24 25 26
#define PR0_ROUNDS 76
#define PR_ROUNDS 40
#define PRF_ROUNDS 44

#define PR0_ROUNDS 76
#define PR_ROUNDS 28
#define PRF_ROUNDS 32
 * */
KNOT team committed
27 28 29
#define ARR_SIZE(a) (sizeof((a))/sizeof((a[0])))
#define LOTR32(x,n) (((x)<<(n))|((x)>>(32-(n))))

Wentao Zhang committed
30 31 32
void packU96FormatToThreePacket(u32 * out, u8 * in);
void unpackU96FormatToThreePacket(u8 * out, u32 * in);
void P384(unsigned int *s, unsigned char *round, unsigned char lunNum);
Zhao Xuefeng committed
33

Wentao Zhang committed
34 35 36 37 38 39
#define puckU32ToThree_1(x){\
x &= 0x49249249;\
x = (x | (x >>  2)) & 0xc30c30c3;\
x = (x | (x >>4)) & 0x0f00f00f;\
x = (x | (x >> 8)) & 0xff0000ff;\
x = (x | (x >> 16)) & 0xfff;\
KNOT team committed
40
}
Wentao Zhang committed
41 42 43 44 45 46
#define unpuckU32ToThree_1(x){\
x &= 0xfff;\
x = (x | (x << 16)) & 0xff0000ff;\
x = (x | (x << 8)) & 0x0f00f00f;\
x = (x | (x << 4)) & 0xc30c30c3;\
x = (x | (x << 2)) & 0x49249249;\
KNOT team committed
47
}
Wentao Zhang committed
48

Zhao Xuefeng committed
49
unsigned char  constant7Format[80];
KNOT team committed
50

Zhao Xuefeng committed
51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139
#define P384_ARC_SC1(rci,S2,S3,S4) \
  do { \
    __asm__ __volatile__ ( \
    		"/*add round const   s0 s1 s2 */           \n\t"\
		"ands %[t1], %[rci], #0xc0\n\t" \
	    "eors %[S_0],  %[S_0], %[t1], LSR  #6 \n\t"   /*s[0] ^= (constant7Format[lunNum] >> 6) & 0x3;*/\
        "ands %[t1], %[rci], #0x38\n\t" \
	    "eors %[S_1],  %[S_1], %[t1], LSR  #3 \n\t"   /*s[0] ^= (constant7Format[lunNum] >> 6) & 0x3;*/\
	    "ands %[t1], %[rci], #0x7\n\t" \
	    "eors %[S_3],  %[S_3], %[t1]       \n\t"   /*s[2] ^= constant7Format[lunNum] & 0x7;*/\
        "/*sbox  column*/         \n\t"\
        "mvns    %[S_0],     %[S_0]            \n\t"\
        "ands    %[t1],    %[S_2], %[S_0]        \n\t"\
        "eors    %[t1],    %[S_4], %[t1]        \n\t"\
        "orrs    %[S_4],     %[S_2], %[S_4]        \n\t"\
        "eors    %[S_0],     %[S_6], %[S_0]        \n\t"\
        "eors    %[S_4],     %[S_4], %[S_0]        \n\t"\
        "eors    %[t2],    %[S_2], %[S_6]        \n\t"\
        "eors    %[S_6],     %[S_6], %[t1]        \n\t"\
        "ands    %[S_0],     %[t1],%[S_0]        \n\t"\
        "eors    %[S_0],     %[t2],%[S_0]        \n\t"\
        "ands    %[S_2],     %[S_4], %[t2]       \n\t"\
        "eors    %[S_2],     %[t1], %[S_2]        \n\t"\
    : /* output variables - including inputs that are changed */\
		[t1]  "=r" (t1),   [t2] "=r" (t2),    [rci] "+r" (rci), \
		[S_0] "+r" (s[0]), [S_1] "+r" (s[1]), [S_3] "+r" (s[2]),\
		[S_2] "+r" (S2),   [S_4] "+r" (S3),   [S_6] "+r" (S4) \
		: : );\
}while (0)
#define P384_2SC(S1,S2,S3,S4,S5,S6,S7,S8) \
  do { \
    __asm__ __volatile__ ( \
            "/*sbox   column*/         \n\t"\
   	        "mvns    %[S_0],     %[S_0]            \n\t"\
   	        "ands    %[t1],    %[S_2], %[S_0]        \n\t"\
   	        "eors    %[t1],    %[S_4], %[t1]        \n\t"\
   	        "orrs    %[S_4],     %[S_2], %[S_4]        \n\t"\
   	        "eors    %[S_0],     %[S_6], %[S_0]        \n\t"\
   	        "eors    %[S_4],     %[S_4], %[S_0]        \n\t"\
   	        "eors    %[t2],    %[S_2], %[S_6]        \n\t"\
   	        "eors    %[S_6],     %[S_6], %[t1]        \n\t"\
   	        "ands    %[S_0],     %[t1],%[S_0]        \n\t"\
   	        "eors    %[S_0],     %[t2],%[S_0]        \n\t"\
   	        "ands    %[S_2],     %[S_4], %[t2]       \n\t"\
   	        "eors    %[S_2],     %[t1], %[S_2]        \n\t"\
            "/*sbox   column*/         \n\t"\
   	        "mvns    %[S_1],     %[S_1]            \n\t"\
   	        "ands    %[t1],    %[S_3], %[S_1]        \n\t"\
   	        "eors    %[t1],    %[S_5], %[t1]        \n\t"\
   	        "orrs    %[S_5],     %[S_3], %[S_5]        \n\t"\
   	        "eors    %[S_1],     %[S_7], %[S_1]        \n\t"\
   	        "eors    %[S_5],     %[S_5], %[S_1]        \n\t"\
   	        "eors    %[t2],    %[S_3], %[S_7]        \n\t"\
   	        "eors    %[S_7],     %[S_7], %[t1]        \n\t"\
   	        "ands    %[S_1],     %[t1],%[S_1]        \n\t"\
   	        "eors    %[S_1],     %[t2],%[S_1]        \n\t"\
   	        "ands    %[S_3],     %[S_5], %[t2]       \n\t"\
   	        "eors    %[S_3],     %[t1], %[S_3]        \n\t"\
    : /* output variables - including inputs that are changed */\
		[t1] "=r" (t1), [t2] "=r" (t2),\
		[S_0] "+r" (S1), [S_2] "+r" (S2), [S_4] "+r" (S3), [S_6] "+r" (S4) ,\
		[S_1] "+r" (S5), [S_3] "+r" (S6), [S_5] "+r" (S7), [S_7] "+r" (S8)\
		: : );\
}while (0)
#define P384_SR() \
  do { \
    __asm__ __volatile__ ( \
    "/*rotate shift left 1 bit  [w9 w5 w1-> (w1,1) w9 w5] */   \n\t"\
		"mov    %[t1],      %[S_3]       \n\t"\
		"mov    %[S_3],     %[S_4]       \n\t"\
		"mov    %[S_4],     %[S_5]       \n\t"\
		"ROR    %[S_5],     %[t1]   , #31        \n\t"\
    "/*rotate shift left 8 bits [w10 w6 w2-> (w6,3)  (w2,3)  ( w10,2)]*/  \n\t"\
		"mov    %[t1],      %[S_8]       \n\t"\
		"ROR    %[S_8],     %[S_7]  , #29      \n\t"\
		"ROR    %[S_7],     %[S_6]  , #29      \n\t"\
		"ROR    %[S_6],     %[t1]   , #30        \n\t"\
    "/*rotate shift left 55 bit  [w11 w7 w3-> (w3,13)  (w11,14)  ( w7,14)] */   \n\t"\
		"mov    %[t1],      %[S_9]       \n\t"\
		"ROR    %[S_9],     %[S_10] , #14      \n\t"\
		"ROR    %[S_10],    %[S_11] , #14      \n\t"\
		"ROR    %[S_11],    %[t1]   , #13        \n\t"\
    : /* output variables - including inputs that are changed */\
	 [t1] "=r" (t1),\
	 [S_3] "+r" (s[3]), [S_6] "+r" (s[6]), [S_9] "+r" (s[9]) ,\
	 [S_4] "+r" (s[4]), [S_7] "+r" (s[7]), [S_10] "+r" (s[10]),\
	 [S_5] "+r" (s[5]), [S_8] "+r" (s[8]), [S_11] "+r" (s[11])\
	 : : );\
}while (0)