ace.vhd

-- This work is licensed under a Creative Commons
-- Attribution-NonCommercial-ShareAlike 4.0 International License.
-- http://creativecommons.org/licenses/by-nc-sa/4.0

-- Mark D. Aagaard
-- Riham AlTawy
-- Guang Gong
-- Kalikinkar Mandal
-- Raghvendra Rohit
-- Marat Sattarov
-- http://comsec.uwaterloo.ca


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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.ace_pkg.all;
  
entity ace is
  port
    ( clk       : in  std_logic;
      reset     : in  std_logic;
      i_mode    : in  mode_ty;
      i_dom_sep : in  domsep_ty;
      i_valid   : in  std_logic;
      i_data    : in  word;
      i_padding : in  std_logic;
      o_valid   : out std_logic;
      o_ready   : out std_logic;
      o_data    : out word
      );
end entity;