small changes, mostly because of new compiler version

CMakeCommon/SetCompilerFlags.cmake

@@ -29,7 +29,7 @@ function(SetGNUCompilerFlags compiler_libs)
 	if(DEFINED __TriCore__)
 		set(compiler_libs PARENT_SCOPE)
 		set(common_c_flags "-fno-common -Os -std=c99")
-		set(common_cxx_flags "-fno-common -std=c++0x")
+		set(common_cxx_flags "-fno-common -std=c++03")
 		set(warning_flags "-W -Wall -Wextra")
 		set(target_flags "-DAPPKIT_TC277TFT -DEMBB_DEBUG -fshort-double -mcpu=tc27xx -mversion-info")
 		if (WARNINGS_ARE_ERRORS STREQUAL ON)

TC_Toolchain.cmake

@@ -15,7 +15,7 @@ SET(CMAKE_C_COMPILER   C:/HighTec/toolchains/tricore/v4.9.1.0-infineon-1.1/bin/t
 SET(CMAKE_CXX_COMPILER C:/HighTec/toolchains/tricore/v4.9.1.0-infineon-1.1/bin/tricore-c++.exe)
 
 # target environment 
-SET(CMAKE_FIND_ROOT_PATH  C:/HighTec/toolchains/tricore/v4.6.6.0-infineon-1.1)
+SET(CMAKE_FIND_ROOT_PATH  C:/HighTec/toolchains/tricore/v4.9.1.0-infineon-1.1)
 
 # path to FreeRTOS
 SET(FREE_RTOS_LIB_PATH C:/Data/Projekte/FreeRTOS_AppKit_TC277)

base_c/include/embb/base/c/internal/atomic/compare_and_swap.h

@@ -136,7 +136,7 @@ EMBB_DEFINE_COMPARE_AND_SWAP(4, "")
   register uint64_t e_reg = desired; \
   __asm__ __volatile__ ("dsync\n\t" \
 	  "ld.w %H0, [%3]0\n\t" \
-	  "cmpswap.w [%2]0, %A0\n\t" \
+	  "cmpswap" EMBB_ATOMIC_TC_SIZE_SUFFIX " [%2]0, %A0\n\t" \
 	  "eq %[result], %H0, %L0" \
   : "+d"(e_reg), [result]"=&d" (result) \
   : "a"(pointer_to_value), "a"(expected) \
@@ -147,10 +147,13 @@ EMBB_DEFINE_COMPARE_AND_SWAP(4, "")
 #error "No atomic fetch and store implementation found"
 #endif
 
-//TODO: CAS-byte and CAS-short not needed yet, implement if needed
+/*
+* CAS instruction is only available for word-size. 
+* This macro will fail to build, once swap is needed for byte or halfwords.
+*/
 EMBB_DEFINE_COMPARE_AND_SWAP(1, ".b")
 EMBB_DEFINE_COMPARE_AND_SWAP(2, ".h")
-EMBB_DEFINE_COMPARE_AND_SWAP(4, "")
+EMBB_DEFINE_COMPARE_AND_SWAP(4, ".w")
 
 #else
 #error "Unknown architecture"

base_c/include/embb/base/c/internal/atomic/fetch_and_add.h

@@ -124,21 +124,21 @@ EMBB_DEFINE_FETCH_AND_ADD(4, "")
   EMBB_PLATFORM_INLINE EMBB_CAT2(EMBB_BASE_BASIC_TYPE_SIZE_, EMBB_PARAMETER_SIZE_BYTE) EMBB_CAT2(embb_internal__atomic_fetch_and_add_, EMBB_PARAMETER_SIZE_BYTE) \
   (EMBB_CAT2(EMBB_BASE_BASIC_TYPE_SIZE_, EMBB_PARAMETER_SIZE_BYTE) volatile* pointer_to_value, EMBB_CAT2(EMBB_BASE_BASIC_TYPE_SIZE_, EMBB_PARAMETER_SIZE_BYTE) new_value) { \
 	EMBB_CAT2(EMBB_BASE_BASIC_TYPE_SIZE_, EMBB_PARAMETER_SIZE_BYTE) result; \
-  	register uint64_t e_reg = sizeof(value) == sizeof(uint32_t) ? (uint64_t)value : 0ull; \
+  	register uint64_t e_reg = sizeof(new_value) == sizeof(uint32_t) ? (uint64_t)new_value : 0ull; \
 	register uint32_t add = (uint32_t)pointer_to_value & 0xFFFFFFFC; \
 	uint32_t pos = ((uint32_t)pointer_to_value & 0x3) * 8; \
-	uint32_t width = sizeof(value) == sizeof(uint32_t) ? 31 : sizeof(value) * 8; \
+	uint32_t width = sizeof(new_value) == sizeof(uint32_t) ? 31 : sizeof(new_value) * 8; \
 	register uint64_t e_mask = ((uint64_t)width << 32) | pos; \
 	__asm__ __volatile__ ("dsync\n\t" \
 		"mov.a %[pointer_to_value], %[add]\n\t" \
 		"loop_%=:\tld.w %H0, [%3]0\n\t" \
-		"insert %L0, %L0, %[value], %A1\n\t" \
+		"insert %L0, %L0, %[new_value], %A1\n\t" \
 		"add" EMBB_ATOMIC_TC_SIZE_SUFFIX " %L0, %L0, %H0\n\t" \
 		"cmpswap.w [%3]0, %A0\n\t" \
 		"jne %H0, %L0, loop_%=\n\t" \
-		"extr.u %[result], %H0, %A1" \
+		"extr %[result], %H0, %A1" \
 		: "+d"(e_reg), [e_mask]"+d"(e_mask), [result] "=&d" (result) \
-		: [pointer_to_value]"a"(pointer_to_value), [value] "r" (value), [add] "d" (add) \
+		: [pointer_to_value]"a"(pointer_to_value), [new_value] "r" (new_value), [add] "d" (add) \
 		: "memory"); \
 	return result; \
   }

base_c/include/embb/base/c/internal/atomic/swap.h

@@ -125,7 +125,10 @@ EMBB_DEFINE_SWAP(4, "")
   : "memory"); \
   return new_value; \
   }
-
+/*
+* Swap instruction is only available for word-size. 
+* This macro will fail to build, once swap is needed for byte or halfwords.
+*/
 #else
 #error "No atomic fetch and store implementation found"
 #endif

base_c/src/memory_allocation.c

@@ -191,11 +191,12 @@ void *embb_alloc_aligned(size_t alignment, size_t size) {
   malloc_addr = _aligned_malloc(size, alignment);
 #elif defined EMBB_PLATFORM_COMPILER_GNUC
 #ifdef __TRICORE__
+#error Enable EMBB_DEBUG-Flag for TriCore
 	/*
-	 * The TriCore Toolchain uses obsolete function memalign() for
+	 * The TriCore Toolchain uses function memalign() for
 	 * aligned memory allocation. 
 	 */
-#include <malloc.h> 							// scm3681: rework
+#include <malloc.h> 
 	malloc_addr = memalign(alignment, size);
 #else /* __TRICORE__ */
   /*